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Defines | |
| #define | TIMER0_PRESCALER_DIV_0 0 |
| #define | TIMER0_PRESCALER_DIV_1 1 |
| #define | TIMER0_PRESCALER_DIV_ -3 2 |
| #define | TIMER0_PRESCALER_DIV_64 3 |
| #define | TIMER0_PRESCALER_DIV_256 4 |
| #define | TIMER0_PRESCALER_DIV_1024 5 |
| #define | TIMER0_PRESCALER_DIV_FALL 6 |
| #define | TIMER0_PRESCALER_DIV_RISE 7 |
| #define | TIMER0_PRESCALER_REG_0 0 |
| #define | TIMER0_PRESCALER_REG_1 1 |
| #define | TIMER0_PRESCALER_REG_2 -3 |
| #define | TIMER0_PRESCALER_REG_3 64 |
| #define | TIMER0_PRESCALER_REG_4 256 |
| #define | TIMER0_PRESCALER_REG_5 1024 |
| #define | TIMER0_PRESCALER_REG_6 -1 |
| #define | TIMER0_PRESCALER_REG_7 -2 |
| #define | TIMER0_AVAILABLE |
| #define | SIG_OVERFLOW0_NUM 0 |
| #define | SIG_OVERFLOW_TOTAL_NUM 1 |
| #define | SIG_OUTPUT_COMPARE_TOTAL_NUM 0 |
| #define | PWM_TOTAL_NUM 0 |
| #define | SIG_INPUT_CAPTURE_TOTAL_NUM 0 |
| #define | CAL0_REG OSCCAL |
| #define | CAL1_REG OSCCAL |
| #define | CAL2_REG OSCCAL |
| #define | CAL3_REG OSCCAL |
| #define | CAL4_REG OSCCAL |
| #define | CAL5_REG OSCCAL |
| #define | CAL6_REG OSCCAL |
| #define | CAL7_REG OSCCAL |
| #define | ACIS0_REG ACSR |
| #define | ACIS1_REG ACSR |
| #define | ACIE_REG ACSR |
| #define | ACI_REG ACSR |
| #define | ACO_REG ACSR |
| #define | ACD_REG ACSR |
| #define | DDA0_REG PACR |
| #define | DDA1_REG PACR |
| #define | PA2HC_REG PACR |
| #define | DDA3_REG PACR |
| #define | MCONF0_REG MODCR |
| #define | MCONF1_REG MODCR |
| #define | MCONF2_REG MODCR |
| #define | ONTIM0_REG MODCR |
| #define | ONTIM1_REG MODCR |
| #define | ONTIM2_REG MODCR |
| #define | OTIM3_REG MODCR |
| #define | ONTIM4_REG MODCR |
| #define | PINB0_REG PINB |
| #define | PINB1_REG PINB |
| #define | PINB2_REG PINB |
| #define | PINB3_REG PINB |
| #define | PINB4_REG PINB |
| #define | PINB5_REG PINB |
| #define | PINB6_REG PINB |
| #define | PINB7_REG PINB |
| #define | PINA0_REG PINA |
| #define | PINA1_REG PINA |
| #define | PINA3_REG PINA |
| #define | CS00_REG TCCR0 |
| #define | CS01_REG TCCR0 |
| #define | CS02_REG TCCR0 |
| #define | OOM00_REG TCCR0 |
| #define | OOM01_REG TCCR0 |
| #define | FOV0_REG TCCR0 |
| #define | PORF_REG MCUCS |
| #define | EXTRF_REG MCUCS |
| #define | WDRF_REG MCUCS |
| #define | SM_REG MCUCS |
| #define | SE_REG MCUCS |
| #define | PLUPB_REG MCUCS |
| #define | PORTA0_REG PORTA |
| #define | PORTA1_REG PORTA |
| #define | PORTA2_REG PORTA |
| #define | PORTA3_REG PORTA |
| #define | TCNT00_REG TCNT0 |
| #define | TCNT01_REG TCNT0 |
| #define | TCNT02_REG TCNT0 |
| #define | TCNT03_REG TCNT0 |
| #define | TCNT04_REG TCNT0 |
| #define | TCNT05_REG TCNT0 |
| #define | TCNT06_REG TCNT0 |
| #define | TCNT07_REG TCNT0 |
| #define | TOV0_REG IFR |
| #define | INTF0_REG IFR |
| #define | INTF1_REG IFR |
| #define | PIND0_REG PIND |
| #define | PIND1_REG PIND |
| #define | PIND2_REG PIND |
| #define | PIND3_REG PIND |
| #define | PIND4_REG PIND |
| #define | PIND5_REG PIND |
| #define | PIND6_REG PIND |
| #define | PIND7_REG PIND |
| #define | ISC00_REG ICR |
| #define | ISC01_REG ICR |
| #define | ICS10_REG ICR |
| #define | ICS11_REG ICR |
| #define | TOIE0_REG ICR |
| #define | LLIE_REG ICR |
| #define | INT0_REG ICR |
| #define | INT1_REG ICR |
| #define | C_REG SREG |
| #define | Z_REG SREG |
| #define | N_REG SREG |
| #define | V_REG SREG |
| #define | S_REG SREG |
| #define | H_REG SREG |
| #define | T_REG SREG |
| #define | I_REG SREG |
| #define | PORTD0_REG PORTD |
| #define | PORTD1_REG PORTD |
| #define | PORTD2_REG PORTD |
| #define | PORTD3_REG PORTD |
| #define | PORTD4_REG PORTD |
| #define | PORTD5_REG PORTD |
| #define | PORTD6_REG PORTD |
| #define | PORTD7_REG PORTD |
| #define | DDD0_REG DDRD |
| #define | DDD1_REG DDRD |
| #define | DDD2_REG DDRD |
| #define | DDD3_REG DDRD |
| #define | DDD4_REG DDRD |
| #define | DDD5_REG DDRD |
| #define | DDD6_REG DDRD |
| #define | DDD7_REG DDRD |
| #define | WDP0_REG WDTCR |
| #define | WDP1_REG WDTCR |
| #define | WDP2_REG WDTCR |
| #define | WDE_REG WDTCR |
| #define | WDTOE_REG WDTCR |
| #define | IR_PORT PORTA |
| #define | IR_BIT 2 |
| #define ACD_REG ACSR |
Definition at line 80 of file ATtiny28.h.
| #define ACI_REG ACSR |
Definition at line 78 of file ATtiny28.h.
| #define ACIE_REG ACSR |
Definition at line 77 of file ATtiny28.h.
| #define ACIS0_REG ACSR |
Definition at line 75 of file ATtiny28.h.
| #define ACIS1_REG ACSR |
Definition at line 76 of file ATtiny28.h.
| #define ACO_REG ACSR |
Definition at line 79 of file ATtiny28.h.
| #define C_REG SREG |
Definition at line 171 of file ATtiny28.h.
| #define CAL0_REG OSCCAL |
Definition at line 65 of file ATtiny28.h.
| #define CAL1_REG OSCCAL |
Definition at line 66 of file ATtiny28.h.
| #define CAL2_REG OSCCAL |
Definition at line 67 of file ATtiny28.h.
| #define CAL3_REG OSCCAL |
Definition at line 68 of file ATtiny28.h.
| #define CAL4_REG OSCCAL |
Definition at line 69 of file ATtiny28.h.
| #define CAL5_REG OSCCAL |
Definition at line 70 of file ATtiny28.h.
| #define CAL6_REG OSCCAL |
Definition at line 71 of file ATtiny28.h.
| #define CAL7_REG OSCCAL |
Definition at line 72 of file ATtiny28.h.
| #define CS00_REG TCCR0 |
Definition at line 114 of file ATtiny28.h.
| #define CS01_REG TCCR0 |
Definition at line 115 of file ATtiny28.h.
| #define CS02_REG TCCR0 |
Definition at line 116 of file ATtiny28.h.
| #define DDA0_REG PACR |
Definition at line 83 of file ATtiny28.h.
| #define DDA1_REG PACR |
Definition at line 84 of file ATtiny28.h.
| #define DDA3_REG PACR |
Definition at line 86 of file ATtiny28.h.
| #define DDD0_REG DDRD |
Definition at line 191 of file ATtiny28.h.
| #define DDD1_REG DDRD |
Definition at line 192 of file ATtiny28.h.
| #define DDD2_REG DDRD |
Definition at line 193 of file ATtiny28.h.
| #define DDD3_REG DDRD |
Definition at line 194 of file ATtiny28.h.
| #define DDD4_REG DDRD |
Definition at line 195 of file ATtiny28.h.
| #define DDD5_REG DDRD |
Definition at line 196 of file ATtiny28.h.
| #define DDD6_REG DDRD |
Definition at line 197 of file ATtiny28.h.
| #define DDD7_REG DDRD |
Definition at line 198 of file ATtiny28.h.
| #define EXTRF_REG MCUCS |
Definition at line 123 of file ATtiny28.h.
| #define FOV0_REG TCCR0 |
Definition at line 119 of file ATtiny28.h.
| #define H_REG SREG |
Definition at line 176 of file ATtiny28.h.
| #define I_REG SREG |
Definition at line 178 of file ATtiny28.h.
| #define ICS10_REG ICR |
Definition at line 163 of file ATtiny28.h.
| #define ICS11_REG ICR |
Definition at line 164 of file ATtiny28.h.
| #define INT0_REG ICR |
Definition at line 167 of file ATtiny28.h.
| #define INT1_REG ICR |
Definition at line 168 of file ATtiny28.h.
| #define INTF0_REG IFR |
Definition at line 147 of file ATtiny28.h.
| #define INTF1_REG IFR |
Definition at line 148 of file ATtiny28.h.
| #define IR_BIT 2 |
Definition at line 211 of file ATtiny28.h.
| #define IR_PORT PORTA |
Definition at line 210 of file ATtiny28.h.
| #define ISC00_REG ICR |
Definition at line 161 of file ATtiny28.h.
| #define ISC01_REG ICR |
Definition at line 162 of file ATtiny28.h.
| #define LLIE_REG ICR |
Definition at line 166 of file ATtiny28.h.
| #define MCONF0_REG MODCR |
Definition at line 89 of file ATtiny28.h.
| #define MCONF1_REG MODCR |
Definition at line 90 of file ATtiny28.h.
| #define MCONF2_REG MODCR |
Definition at line 91 of file ATtiny28.h.
| #define N_REG SREG |
Definition at line 173 of file ATtiny28.h.
| #define ONTIM0_REG MODCR |
Definition at line 92 of file ATtiny28.h.
| #define ONTIM1_REG MODCR |
Definition at line 93 of file ATtiny28.h.
| #define ONTIM2_REG MODCR |
Definition at line 94 of file ATtiny28.h.
| #define ONTIM4_REG MODCR |
Definition at line 96 of file ATtiny28.h.
| #define OOM00_REG TCCR0 |
Definition at line 117 of file ATtiny28.h.
| #define OOM01_REG TCCR0 |
Definition at line 118 of file ATtiny28.h.
| #define OTIM3_REG MODCR |
Definition at line 95 of file ATtiny28.h.
| #define PA2HC_REG PACR |
Definition at line 85 of file ATtiny28.h.
| #define PINA0_REG PINA |
Definition at line 109 of file ATtiny28.h.
| #define PINA1_REG PINA |
Definition at line 110 of file ATtiny28.h.
| #define PINA3_REG PINA |
Definition at line 111 of file ATtiny28.h.
| #define PINB0_REG PINB |
Definition at line 99 of file ATtiny28.h.
| #define PINB1_REG PINB |
Definition at line 100 of file ATtiny28.h.
| #define PINB2_REG PINB |
Definition at line 101 of file ATtiny28.h.
| #define PINB3_REG PINB |
Definition at line 102 of file ATtiny28.h.
| #define PINB4_REG PINB |
Definition at line 103 of file ATtiny28.h.
| #define PINB5_REG PINB |
Definition at line 104 of file ATtiny28.h.
| #define PINB6_REG PINB |
Definition at line 105 of file ATtiny28.h.
| #define PINB7_REG PINB |
Definition at line 106 of file ATtiny28.h.
| #define PIND0_REG PIND |
Definition at line 151 of file ATtiny28.h.
| #define PIND1_REG PIND |
Definition at line 152 of file ATtiny28.h.
| #define PIND2_REG PIND |
Definition at line 153 of file ATtiny28.h.
| #define PIND3_REG PIND |
Definition at line 154 of file ATtiny28.h.
| #define PIND4_REG PIND |
Definition at line 155 of file ATtiny28.h.
| #define PIND5_REG PIND |
Definition at line 156 of file ATtiny28.h.
| #define PIND6_REG PIND |
Definition at line 157 of file ATtiny28.h.
| #define PIND7_REG PIND |
Definition at line 158 of file ATtiny28.h.
| #define PLUPB_REG MCUCS |
Definition at line 127 of file ATtiny28.h.
| #define PORF_REG MCUCS |
Definition at line 122 of file ATtiny28.h.
| #define PORTA0_REG PORTA |
Definition at line 130 of file ATtiny28.h.
| #define PORTA1_REG PORTA |
Definition at line 131 of file ATtiny28.h.
| #define PORTA2_REG PORTA |
Definition at line 132 of file ATtiny28.h.
| #define PORTA3_REG PORTA |
Definition at line 133 of file ATtiny28.h.
| #define PORTD0_REG PORTD |
Definition at line 181 of file ATtiny28.h.
| #define PORTD1_REG PORTD |
Definition at line 182 of file ATtiny28.h.
| #define PORTD2_REG PORTD |
Definition at line 183 of file ATtiny28.h.
| #define PORTD3_REG PORTD |
Definition at line 184 of file ATtiny28.h.
| #define PORTD4_REG PORTD |
Definition at line 185 of file ATtiny28.h.
| #define PORTD5_REG PORTD |
Definition at line 186 of file ATtiny28.h.
| #define PORTD6_REG PORTD |
Definition at line 187 of file ATtiny28.h.
| #define PORTD7_REG PORTD |
Definition at line 188 of file ATtiny28.h.
| #define PWM_TOTAL_NUM 0 |
Definition at line 58 of file ATtiny28.h.
| #define S_REG SREG |
Definition at line 175 of file ATtiny28.h.
| #define SE_REG MCUCS |
Definition at line 126 of file ATtiny28.h.
| #define SIG_INPUT_CAPTURE_TOTAL_NUM 0 |
Definition at line 61 of file ATtiny28.h.
| #define SIG_OUTPUT_COMPARE_TOTAL_NUM 0 |
Definition at line 55 of file ATtiny28.h.
| #define SIG_OVERFLOW0_NUM 0 |
Definition at line 51 of file ATtiny28.h.
| #define SIG_OVERFLOW_TOTAL_NUM 1 |
Definition at line 52 of file ATtiny28.h.
| #define SM_REG MCUCS |
Definition at line 125 of file ATtiny28.h.
| #define T_REG SREG |
Definition at line 177 of file ATtiny28.h.
| #define TCNT00_REG TCNT0 |
Definition at line 136 of file ATtiny28.h.
| #define TCNT01_REG TCNT0 |
Definition at line 137 of file ATtiny28.h.
| #define TCNT02_REG TCNT0 |
Definition at line 138 of file ATtiny28.h.
| #define TCNT03_REG TCNT0 |
Definition at line 139 of file ATtiny28.h.
| #define TCNT04_REG TCNT0 |
Definition at line 140 of file ATtiny28.h.
| #define TCNT05_REG TCNT0 |
Definition at line 141 of file ATtiny28.h.
| #define TCNT06_REG TCNT0 |
Definition at line 142 of file ATtiny28.h.
| #define TCNT07_REG TCNT0 |
Definition at line 143 of file ATtiny28.h.
| #define TIMER0_AVAILABLE |
Definition at line 48 of file ATtiny28.h.
| #define TIMER0_PRESCALER_DIV_ -3 2 |
Definition at line 30 of file ATtiny28.h.
| #define TIMER0_PRESCALER_DIV_0 0 |
Definition at line 28 of file ATtiny28.h.
| #define TIMER0_PRESCALER_DIV_1 1 |
Definition at line 29 of file ATtiny28.h.
| #define TIMER0_PRESCALER_DIV_1024 5 |
Definition at line 33 of file ATtiny28.h.
| #define TIMER0_PRESCALER_DIV_256 4 |
Definition at line 32 of file ATtiny28.h.
| #define TIMER0_PRESCALER_DIV_64 3 |
Definition at line 31 of file ATtiny28.h.
| #define TIMER0_PRESCALER_DIV_FALL 6 |
Definition at line 34 of file ATtiny28.h.
| #define TIMER0_PRESCALER_DIV_RISE 7 |
Definition at line 35 of file ATtiny28.h.
| #define TIMER0_PRESCALER_REG_0 0 |
Definition at line 37 of file ATtiny28.h.
| #define TIMER0_PRESCALER_REG_1 1 |
Definition at line 38 of file ATtiny28.h.
| #define TIMER0_PRESCALER_REG_2 -3 |
Definition at line 39 of file ATtiny28.h.
| #define TIMER0_PRESCALER_REG_3 64 |
Definition at line 40 of file ATtiny28.h.
| #define TIMER0_PRESCALER_REG_4 256 |
Definition at line 41 of file ATtiny28.h.
| #define TIMER0_PRESCALER_REG_5 1024 |
Definition at line 42 of file ATtiny28.h.
| #define TIMER0_PRESCALER_REG_6 -1 |
Definition at line 43 of file ATtiny28.h.
| #define TIMER0_PRESCALER_REG_7 -2 |
Definition at line 44 of file ATtiny28.h.
| #define TOIE0_REG ICR |
Definition at line 165 of file ATtiny28.h.
| #define TOV0_REG IFR |
Definition at line 146 of file ATtiny28.h.
| #define V_REG SREG |
Definition at line 174 of file ATtiny28.h.
| #define WDE_REG WDTCR |
Definition at line 204 of file ATtiny28.h.
| #define WDP0_REG WDTCR |
Definition at line 201 of file ATtiny28.h.
| #define WDP1_REG WDTCR |
Definition at line 202 of file ATtiny28.h.
| #define WDP2_REG WDTCR |
Definition at line 203 of file ATtiny28.h.
| #define WDRF_REG MCUCS |
Definition at line 124 of file ATtiny28.h.
| #define WDTOE_REG WDTCR |
Definition at line 205 of file ATtiny28.h.
| #define Z_REG SREG |
Definition at line 172 of file ATtiny28.h.
1.5.6