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Defines | |
| #define | TIMER0_PRESCALER_DIV_0 0 |
| #define | TIMER0_PRESCALER_DIV_1 1 |
| #define | TIMER0_PRESCALER_DIV_8 2 |
| #define | TIMER0_PRESCALER_DIV_64 3 |
| #define | TIMER0_PRESCALER_DIV_256 4 |
| #define | TIMER0_PRESCALER_DIV_1024 5 |
| #define | TIMER0_PRESCALER_DIV_FALL 6 |
| #define | TIMER0_PRESCALER_DIV_RISE 7 |
| #define | TIMER0_PRESCALER_REG_0 0 |
| #define | TIMER0_PRESCALER_REG_1 1 |
| #define | TIMER0_PRESCALER_REG_2 8 |
| #define | TIMER0_PRESCALER_REG_3 64 |
| #define | TIMER0_PRESCALER_REG_4 256 |
| #define | TIMER0_PRESCALER_REG_5 1024 |
| #define | TIMER0_PRESCALER_REG_6 -1 |
| #define | TIMER0_PRESCALER_REG_7 -2 |
| #define | TIMER1_PRESCALER_DIV_0 0 |
| #define | TIMER1_PRESCALER_DIV_ -3 1 |
| #define | TIMER1_PRESCALER_DIV_ -3 2 |
| #define | TIMER1_PRESCALER_DIV_ -3 3 |
| #define | TIMER1_PRESCALER_DIV_ -3 4 |
| #define | TIMER1_PRESCALER_DIV_1 5 |
| #define | TIMER1_PRESCALER_DIV_2 6 |
| #define | TIMER1_PRESCALER_DIV_4 7 |
| #define | TIMER1_PRESCALER_DIV_8 8 |
| #define | TIMER1_PRESCALER_DIV_16 9 |
| #define | TIMER1_PRESCALER_DIV_32 10 |
| #define | TIMER1_PRESCALER_DIV_64 11 |
| #define | TIMER1_PRESCALER_DIV_128 12 |
| #define | TIMER1_PRESCALER_DIV_256 13 |
| #define | TIMER1_PRESCALER_DIV_512 14 |
| #define | TIMER1_PRESCALER_DIV_1024 15 |
| #define | TIMER1_PRESCALER_REG_0 0 |
| #define | TIMER1_PRESCALER_REG_1 -3 |
| #define | TIMER1_PRESCALER_REG_2 -3 |
| #define | TIMER1_PRESCALER_REG_3 -3 |
| #define | TIMER1_PRESCALER_REG_4 -3 |
| #define | TIMER1_PRESCALER_REG_5 1 |
| #define | TIMER1_PRESCALER_REG_6 2 |
| #define | TIMER1_PRESCALER_REG_7 4 |
| #define | TIMER1_PRESCALER_REG_8 8 |
| #define | TIMER1_PRESCALER_REG_9 16 |
| #define | TIMER1_PRESCALER_REG_10 32 |
| #define | TIMER1_PRESCALER_REG_11 64 |
| #define | TIMER1_PRESCALER_REG_12 128 |
| #define | TIMER1_PRESCALER_REG_13 256 |
| #define | TIMER1_PRESCALER_REG_14 512 |
| #define | TIMER1_PRESCALER_REG_15 1024 |
| #define | TIMER0_AVAILABLE |
| #define | TIMER1_AVAILABLE |
| #define | SIG_OVERFLOW0_NUM 0 |
| #define | SIG_OVERFLOW1_NUM 1 |
| #define | SIG_OVERFLOW_TOTAL_NUM 2 |
| #define | SIG_OUTPUT_COMPARE1_NUM 0 |
| #define | SIG_OUTPUT_COMPARE_TOTAL_NUM 1 |
| #define | PWM1_NUM 0 |
| #define | PWM_TOTAL_NUM 1 |
| #define | SIG_INPUT_CAPTURE_TOTAL_NUM 0 |
| #define | WDP0_REG WDTCR |
| #define | WDP1_REG WDTCR |
| #define | WDP2_REG WDTCR |
| #define | WDE_REG WDTCR |
| #define | WDTOE_REG WDTCR |
| #define | PCIE_REG GIMSK |
| #define | INT0_REG GIMSK |
| #define | MUX0_REG ADMUX |
| #define | MUX1_REG ADMUX |
| #define | MUX2_REG ADMUX |
| #define | ADLAR_REG ADMUX |
| #define | REFS0_REG ADMUX |
| #define | REFS1_REG ADMUX |
| #define | CS10_REG TCCR1 |
| #define | CS11_REG TCCR1 |
| #define | CS12_REG TCCR1 |
| #define | CS13_REG TCCR1 |
| #define | COM1A0_REG TCCR1 |
| #define | COM1A1_REG TCCR1 |
| #define | PWM1_REG TCCR1 |
| #define | CTC1_REG TCCR1 |
| #define | CS00_REG TCCR0 |
| #define | CS01_REG TCCR0 |
| #define | CS02_REG TCCR0 |
| #define | C_REG SREG |
| #define | Z_REG SREG |
| #define | N_REG SREG |
| #define | V_REG SREG |
| #define | S_REG SREG |
| #define | H_REG SREG |
| #define | T_REG SREG |
| #define | I_REG SREG |
| #define | DDB0_REG DDRB |
| #define | DDB1_REG DDRB |
| #define | DDB2_REG DDRB |
| #define | DDB3_REG DDRB |
| #define | DDB4_REG DDRB |
| #define | DDB5_REG DDRB |
| #define | EEDR0_REG EEDR |
| #define | EEDR1_REG EEDR |
| #define | EEDR2_REG EEDR |
| #define | EEDR3_REG EEDR |
| #define | EEDR4_REG EEDR |
| #define | EEDR5_REG EEDR |
| #define | EEDR6_REG EEDR |
| #define | EEDR7_REG EEDR |
| #define | OCR1A0_REG OCR1A |
| #define | OCR1A1_REG OCR1A |
| #define | OCR1A2_REG OCR1A |
| #define | OCR1A3_REG OCR1A |
| #define | OCR1A4_REG OCR1A |
| #define | OCR1A5_REG OCR1A |
| #define | OCR1A6_REG OCR1A |
| #define | OCR1A7_REG OCR1A |
| #define | PCIF_REG GIFR |
| #define | INTF0_REG GIFR |
| #define | TOIE0_REG TIMSK |
| #define | TOIE1_REG TIMSK |
| #define | OCIE1A_REG TIMSK |
| #define | PSR0_REG SFIOR |
| #define | PSR1_REG SFIOR |
| #define | FOC1A_REG SFIOR |
| #define | ACIS0_REG ACSR |
| #define | ACIS1_REG ACSR |
| #define | ACIE_REG ACSR |
| #define | ACI_REG ACSR |
| #define | ACO_REG ACSR |
| #define | ACBG_REG ACSR |
| #define | ACD_REG ACSR |
| #define | PORF_REG MCUSR |
| #define | EXTRF_REG MCUSR |
| #define | BORF_REG MCUSR |
| #define | WDRF_REG MCUSR |
| #define | EERE_REG EECR |
| #define | EEWE_REG EECR |
| #define | EEMWE_REG EECR |
| #define | EERIE_REG EECR |
| #define | CAL0_REG OSCCAL |
| #define | CAL1_REG OSCCAL |
| #define | CAL2_REG OSCCAL |
| #define | CAL3_REG OSCCAL |
| #define | CAL4_REG OSCCAL |
| #define | CAL5_REG OSCCAL |
| #define | CAL6_REG OSCCAL |
| #define | CAL7_REG OSCCAL |
| #define | ADCL0_REG ADCL |
| #define | ADCL1_REG ADCL |
| #define | ADCL2_REG ADCL |
| #define | ADCL3_REG ADCL |
| #define | ADCL4_REG ADCL |
| #define | ADCL5_REG ADCL |
| #define | ADCL6_REG ADCL |
| #define | ADCL7_REG ADCL |
| #define | EEAR0_REG EEAR |
| #define | EEAR1_REG EEAR |
| #define | EEAR2_REG EEAR |
| #define | EEAR3_REG EEAR |
| #define | EEAR4_REG EEAR |
| #define | EEAR5_REG EEAR |
| #define | PORTB0_REG PORTB |
| #define | PORTB1_REG PORTB |
| #define | PORTB2_REG PORTB |
| #define | PORTB3_REG PORTB |
| #define | PORTB4_REG PORTB |
| #define | ADCH0_REG ADCH |
| #define | ADCH1_REG ADCH |
| #define | ADCH2_REG ADCH |
| #define | ADCH3_REG ADCH |
| #define | ADCH4_REG ADCH |
| #define | ADCH5_REG ADCH |
| #define | ADCH6_REG ADCH |
| #define | ADCH7_REG ADCH |
| #define | TCNT00_REG TCNT0 |
| #define | TCNT01_REG TCNT0 |
| #define | TCNT02_REG TCNT0 |
| #define | TCNT03_REG TCNT0 |
| #define | TCNT04_REG TCNT0 |
| #define | TCNT05_REG TCNT0 |
| #define | TCNT06_REG TCNT0 |
| #define | TCNT07_REG TCNT0 |
| #define | TCNT1_0_REG TCNT1 |
| #define | TCNT1_1_REG TCNT1 |
| #define | TCNT1_2_REG TCNT1 |
| #define | TCNT1_3_REG TCNT1 |
| #define | TCNT1_4_REG TCNT1 |
| #define | TCNT1_5_REG TCNT1 |
| #define | TCNT1_6_REG TCNT1 |
| #define | TCNT1_7_REG TCNT1 |
| #define | TOV0_REG TIFR |
| #define | TOV1_REG TIFR |
| #define | OCF1A_REG TIFR |
| #define | ADPS0_REG ADCSR |
| #define | ADPS1_REG ADCSR |
| #define | ADPS2_REG ADCSR |
| #define | ADIE_REG ADCSR |
| #define | ADIF_REG ADCSR |
| #define | ADFR_REG ADCSR |
| #define | ADSC_REG ADCSR |
| #define | ADEN_REG ADCSR |
| #define | PINB0_REG PINB |
| #define | PINB1_REG PINB |
| #define | PINB2_REG PINB |
| #define | PINB3_REG PINB |
| #define | PINB4_REG PINB |
| #define | PINB5_REG PINB |
| #define | OCR1B0_REG OCR1B |
| #define | OCR1B1_REG OCR1B |
| #define | OCR1B2_REG OCR1B |
| #define | OCR1B3_REG OCR1B |
| #define | OCR1B4_REG OCR1B |
| #define | OCR1B5_REG OCR1B |
| #define | OCR1B6_REG OCR1B |
| #define | OCR1B7_REG OCR1B |
| #define | ISC00_REG MCUCR |
| #define | ISC01_REG MCUCR |
| #define | SM0_REG MCUCR |
| #define | SM1_REG MCUCR |
| #define | SE_REG MCUCR |
| #define | PUD_REG MCUCR |
| #define | MOSI_PORT PORTB |
| #define | MOSI_BIT 0 |
| #define | AIN0_PORT PORTB |
| #define | AIN0_BIT 0 |
| #define | AREF_PORT PORTB |
| #define | AREF_BIT 0 |
| #define | MISO_PORT PORTB |
| #define | MISO_BIT 1 |
| #define | AIN1_PORT PORTB |
| #define | AIN1_BIT 1 |
| #define | OCP_PORT PORTB |
| #define | OCP_BIT 1 |
| #define | SCK_PORT PORTB |
| #define | SCK_BIT 2 |
| #define | ADC1_PORT PORTB |
| #define | ADC1_BIT 2 |
| #define | T0_PORT PORTB |
| #define | T0_BIT 2 |
| #define | INT0_PORT PORTB |
| #define | INT0_BIT 2 |
| #define | ADC2_PORT PORTB |
| #define | ADC2_BIT 3 |
| #define | ADC3_PORT PORTB |
| #define | ADC3_BIT 4 |
| #define | RESET_PORT PORTB |
| #define | RESET_BIT 5 |
| #define | ADC0_PORT PORTB |
| #define | ADC0_BIT 5 |
| #define ACBG_REG ACSR |
Definition at line 195 of file ATtiny15.h.
| #define ACD_REG ACSR |
Definition at line 196 of file ATtiny15.h.
| #define ACI_REG ACSR |
Definition at line 193 of file ATtiny15.h.
| #define ACIE_REG ACSR |
Definition at line 192 of file ATtiny15.h.
| #define ACIS0_REG ACSR |
Definition at line 190 of file ATtiny15.h.
| #define ACIS1_REG ACSR |
Definition at line 191 of file ATtiny15.h.
| #define ACO_REG ACSR |
Definition at line 194 of file ATtiny15.h.
| #define ADC0_BIT 5 |
Definition at line 349 of file ATtiny15.h.
| #define ADC0_PORT PORTB |
Definition at line 348 of file ATtiny15.h.
| #define ADC1_BIT 2 |
Definition at line 334 of file ATtiny15.h.
| #define ADC1_PORT PORTB |
Definition at line 333 of file ATtiny15.h.
| #define ADC2_BIT 3 |
Definition at line 341 of file ATtiny15.h.
| #define ADC2_PORT PORTB |
Definition at line 340 of file ATtiny15.h.
| #define ADC3_BIT 4 |
Definition at line 344 of file ATtiny15.h.
| #define ADC3_PORT PORTB |
Definition at line 343 of file ATtiny15.h.
| #define ADCH0_REG ADCH |
Definition at line 246 of file ATtiny15.h.
| #define ADCH1_REG ADCH |
Definition at line 247 of file ATtiny15.h.
| #define ADCH2_REG ADCH |
Definition at line 248 of file ATtiny15.h.
| #define ADCH3_REG ADCH |
Definition at line 249 of file ATtiny15.h.
| #define ADCH4_REG ADCH |
Definition at line 250 of file ATtiny15.h.
| #define ADCH5_REG ADCH |
Definition at line 251 of file ATtiny15.h.
| #define ADCH6_REG ADCH |
Definition at line 252 of file ATtiny15.h.
| #define ADCH7_REG ADCH |
Definition at line 253 of file ATtiny15.h.
| #define ADCL0_REG ADCL |
Definition at line 221 of file ATtiny15.h.
| #define ADCL1_REG ADCL |
Definition at line 222 of file ATtiny15.h.
| #define ADCL2_REG ADCL |
Definition at line 223 of file ATtiny15.h.
| #define ADCL3_REG ADCL |
Definition at line 224 of file ATtiny15.h.
| #define ADCL4_REG ADCL |
Definition at line 225 of file ATtiny15.h.
| #define ADCL5_REG ADCL |
Definition at line 226 of file ATtiny15.h.
| #define ADCL6_REG ADCL |
Definition at line 227 of file ATtiny15.h.
| #define ADCL7_REG ADCL |
Definition at line 228 of file ATtiny15.h.
| #define ADEN_REG ADCSR |
Definition at line 288 of file ATtiny15.h.
| #define ADFR_REG ADCSR |
Definition at line 286 of file ATtiny15.h.
| #define ADIE_REG ADCSR |
Definition at line 284 of file ATtiny15.h.
| #define ADIF_REG ADCSR |
Definition at line 285 of file ATtiny15.h.
| #define ADLAR_REG ADMUX |
Definition at line 118 of file ATtiny15.h.
| #define ADPS0_REG ADCSR |
Definition at line 281 of file ATtiny15.h.
| #define ADPS1_REG ADCSR |
Definition at line 282 of file ATtiny15.h.
| #define ADPS2_REG ADCSR |
Definition at line 283 of file ATtiny15.h.
| #define ADSC_REG ADCSR |
Definition at line 287 of file ATtiny15.h.
| #define AIN0_BIT 0 |
Definition at line 320 of file ATtiny15.h.
| #define AIN0_PORT PORTB |
Definition at line 319 of file ATtiny15.h.
| #define AIN1_BIT 1 |
Definition at line 327 of file ATtiny15.h.
| #define AIN1_PORT PORTB |
Definition at line 326 of file ATtiny15.h.
| #define AREF_BIT 0 |
Definition at line 322 of file ATtiny15.h.
| #define AREF_PORT PORTB |
Definition at line 321 of file ATtiny15.h.
| #define BORF_REG MCUSR |
Definition at line 201 of file ATtiny15.h.
| #define C_REG SREG |
Definition at line 138 of file ATtiny15.h.
| #define CAL0_REG OSCCAL |
Definition at line 211 of file ATtiny15.h.
| #define CAL1_REG OSCCAL |
Definition at line 212 of file ATtiny15.h.
| #define CAL2_REG OSCCAL |
Definition at line 213 of file ATtiny15.h.
| #define CAL3_REG OSCCAL |
Definition at line 214 of file ATtiny15.h.
| #define CAL4_REG OSCCAL |
Definition at line 215 of file ATtiny15.h.
| #define CAL5_REG OSCCAL |
Definition at line 216 of file ATtiny15.h.
| #define CAL6_REG OSCCAL |
Definition at line 217 of file ATtiny15.h.
| #define CAL7_REG OSCCAL |
Definition at line 218 of file ATtiny15.h.
| #define COM1A0_REG TCCR1 |
Definition at line 127 of file ATtiny15.h.
| #define COM1A1_REG TCCR1 |
Definition at line 128 of file ATtiny15.h.
| #define CS00_REG TCCR0 |
Definition at line 133 of file ATtiny15.h.
| #define CS01_REG TCCR0 |
Definition at line 134 of file ATtiny15.h.
| #define CS02_REG TCCR0 |
Definition at line 135 of file ATtiny15.h.
| #define CS10_REG TCCR1 |
Definition at line 123 of file ATtiny15.h.
| #define CS11_REG TCCR1 |
Definition at line 124 of file ATtiny15.h.
| #define CS12_REG TCCR1 |
Definition at line 125 of file ATtiny15.h.
| #define CS13_REG TCCR1 |
Definition at line 126 of file ATtiny15.h.
| #define CTC1_REG TCCR1 |
Definition at line 130 of file ATtiny15.h.
| #define DDB0_REG DDRB |
Definition at line 148 of file ATtiny15.h.
| #define DDB1_REG DDRB |
Definition at line 149 of file ATtiny15.h.
| #define DDB2_REG DDRB |
Definition at line 150 of file ATtiny15.h.
| #define DDB3_REG DDRB |
Definition at line 151 of file ATtiny15.h.
| #define DDB4_REG DDRB |
Definition at line 152 of file ATtiny15.h.
| #define DDB5_REG DDRB |
Definition at line 153 of file ATtiny15.h.
| #define EEAR0_REG EEAR |
Definition at line 231 of file ATtiny15.h.
| #define EEAR1_REG EEAR |
Definition at line 232 of file ATtiny15.h.
| #define EEAR2_REG EEAR |
Definition at line 233 of file ATtiny15.h.
| #define EEAR3_REG EEAR |
Definition at line 234 of file ATtiny15.h.
| #define EEAR4_REG EEAR |
Definition at line 235 of file ATtiny15.h.
| #define EEAR5_REG EEAR |
Definition at line 236 of file ATtiny15.h.
| #define EEDR0_REG EEDR |
Definition at line 156 of file ATtiny15.h.
| #define EEDR1_REG EEDR |
Definition at line 157 of file ATtiny15.h.
| #define EEDR2_REG EEDR |
Definition at line 158 of file ATtiny15.h.
| #define EEDR3_REG EEDR |
Definition at line 159 of file ATtiny15.h.
| #define EEDR4_REG EEDR |
Definition at line 160 of file ATtiny15.h.
| #define EEDR5_REG EEDR |
Definition at line 161 of file ATtiny15.h.
| #define EEDR6_REG EEDR |
Definition at line 162 of file ATtiny15.h.
| #define EEDR7_REG EEDR |
Definition at line 163 of file ATtiny15.h.
| #define EEMWE_REG EECR |
Definition at line 207 of file ATtiny15.h.
| #define EERE_REG EECR |
Definition at line 205 of file ATtiny15.h.
| #define EERIE_REG EECR |
Definition at line 208 of file ATtiny15.h.
| #define EEWE_REG EECR |
Definition at line 206 of file ATtiny15.h.
| #define EXTRF_REG MCUSR |
Definition at line 200 of file ATtiny15.h.
| #define FOC1A_REG SFIOR |
Definition at line 187 of file ATtiny15.h.
| #define H_REG SREG |
Definition at line 143 of file ATtiny15.h.
| #define I_REG SREG |
Definition at line 145 of file ATtiny15.h.
| #define INT0_BIT 2 |
Definition at line 338 of file ATtiny15.h.
| #define INT0_PORT PORTB |
Definition at line 337 of file ATtiny15.h.
| #define INT0_REG GIMSK |
Definition at line 112 of file ATtiny15.h.
| #define INTF0_REG GIFR |
Definition at line 177 of file ATtiny15.h.
| #define ISC00_REG MCUCR |
Definition at line 309 of file ATtiny15.h.
| #define ISC01_REG MCUCR |
Definition at line 310 of file ATtiny15.h.
| #define MISO_BIT 1 |
Definition at line 325 of file ATtiny15.h.
| #define MISO_PORT PORTB |
Definition at line 324 of file ATtiny15.h.
| #define MOSI_BIT 0 |
Definition at line 318 of file ATtiny15.h.
| #define MOSI_PORT PORTB |
Definition at line 317 of file ATtiny15.h.
| #define MUX0_REG ADMUX |
Definition at line 115 of file ATtiny15.h.
| #define MUX1_REG ADMUX |
Definition at line 116 of file ATtiny15.h.
| #define MUX2_REG ADMUX |
Definition at line 117 of file ATtiny15.h.
| #define N_REG SREG |
Definition at line 140 of file ATtiny15.h.
| #define OCF1A_REG TIFR |
Definition at line 278 of file ATtiny15.h.
| #define OCIE1A_REG TIMSK |
Definition at line 182 of file ATtiny15.h.
| #define OCP_BIT 1 |
Definition at line 329 of file ATtiny15.h.
| #define OCP_PORT PORTB |
Definition at line 328 of file ATtiny15.h.
| #define OCR1A0_REG OCR1A |
Definition at line 166 of file ATtiny15.h.
| #define OCR1A1_REG OCR1A |
Definition at line 167 of file ATtiny15.h.
| #define OCR1A2_REG OCR1A |
Definition at line 168 of file ATtiny15.h.
| #define OCR1A3_REG OCR1A |
Definition at line 169 of file ATtiny15.h.
| #define OCR1A4_REG OCR1A |
Definition at line 170 of file ATtiny15.h.
| #define OCR1A5_REG OCR1A |
Definition at line 171 of file ATtiny15.h.
| #define OCR1A6_REG OCR1A |
Definition at line 172 of file ATtiny15.h.
| #define OCR1A7_REG OCR1A |
Definition at line 173 of file ATtiny15.h.
| #define OCR1B0_REG OCR1B |
Definition at line 299 of file ATtiny15.h.
| #define OCR1B1_REG OCR1B |
Definition at line 300 of file ATtiny15.h.
| #define OCR1B2_REG OCR1B |
Definition at line 301 of file ATtiny15.h.
| #define OCR1B3_REG OCR1B |
Definition at line 302 of file ATtiny15.h.
| #define OCR1B4_REG OCR1B |
Definition at line 303 of file ATtiny15.h.
| #define OCR1B5_REG OCR1B |
Definition at line 304 of file ATtiny15.h.
| #define OCR1B6_REG OCR1B |
Definition at line 305 of file ATtiny15.h.
| #define OCR1B7_REG OCR1B |
Definition at line 306 of file ATtiny15.h.
| #define PCIE_REG GIMSK |
Definition at line 111 of file ATtiny15.h.
| #define PCIF_REG GIFR |
Definition at line 176 of file ATtiny15.h.
| #define PINB0_REG PINB |
Definition at line 291 of file ATtiny15.h.
| #define PINB1_REG PINB |
Definition at line 292 of file ATtiny15.h.
| #define PINB2_REG PINB |
Definition at line 293 of file ATtiny15.h.
| #define PINB3_REG PINB |
Definition at line 294 of file ATtiny15.h.
| #define PINB4_REG PINB |
Definition at line 295 of file ATtiny15.h.
| #define PINB5_REG PINB |
Definition at line 296 of file ATtiny15.h.
| #define PORF_REG MCUSR |
Definition at line 199 of file ATtiny15.h.
| #define PORTB0_REG PORTB |
Definition at line 239 of file ATtiny15.h.
| #define PORTB1_REG PORTB |
Definition at line 240 of file ATtiny15.h.
| #define PORTB2_REG PORTB |
Definition at line 241 of file ATtiny15.h.
| #define PORTB3_REG PORTB |
Definition at line 242 of file ATtiny15.h.
| #define PORTB4_REG PORTB |
Definition at line 243 of file ATtiny15.h.
| #define PSR0_REG SFIOR |
Definition at line 185 of file ATtiny15.h.
| #define PSR1_REG SFIOR |
Definition at line 186 of file ATtiny15.h.
| #define PUD_REG MCUCR |
Definition at line 314 of file ATtiny15.h.
| #define PWM1_NUM 0 |
Definition at line 96 of file ATtiny15.h.
| #define PWM1_REG TCCR1 |
Definition at line 129 of file ATtiny15.h.
| #define PWM_TOTAL_NUM 1 |
Definition at line 97 of file ATtiny15.h.
| #define REFS0_REG ADMUX |
Definition at line 119 of file ATtiny15.h.
| #define REFS1_REG ADMUX |
Definition at line 120 of file ATtiny15.h.
| #define RESET_BIT 5 |
Definition at line 347 of file ATtiny15.h.
| #define RESET_PORT PORTB |
Definition at line 346 of file ATtiny15.h.
| #define S_REG SREG |
Definition at line 142 of file ATtiny15.h.
| #define SCK_BIT 2 |
Definition at line 332 of file ATtiny15.h.
| #define SCK_PORT PORTB |
Definition at line 331 of file ATtiny15.h.
| #define SE_REG MCUCR |
Definition at line 313 of file ATtiny15.h.
| #define SIG_INPUT_CAPTURE_TOTAL_NUM 0 |
Definition at line 100 of file ATtiny15.h.
| #define SIG_OUTPUT_COMPARE1_NUM 0 |
Definition at line 92 of file ATtiny15.h.
| #define SIG_OUTPUT_COMPARE_TOTAL_NUM 1 |
Definition at line 93 of file ATtiny15.h.
| #define SIG_OVERFLOW0_NUM 0 |
Definition at line 87 of file ATtiny15.h.
| #define SIG_OVERFLOW1_NUM 1 |
Definition at line 88 of file ATtiny15.h.
| #define SIG_OVERFLOW_TOTAL_NUM 2 |
Definition at line 89 of file ATtiny15.h.
| #define SM0_REG MCUCR |
Definition at line 311 of file ATtiny15.h.
| #define SM1_REG MCUCR |
Definition at line 312 of file ATtiny15.h.
| #define T0_BIT 2 |
Definition at line 336 of file ATtiny15.h.
| #define T0_PORT PORTB |
Definition at line 335 of file ATtiny15.h.
| #define T_REG SREG |
Definition at line 144 of file ATtiny15.h.
| #define TCNT00_REG TCNT0 |
Definition at line 256 of file ATtiny15.h.
| #define TCNT01_REG TCNT0 |
Definition at line 257 of file ATtiny15.h.
| #define TCNT02_REG TCNT0 |
Definition at line 258 of file ATtiny15.h.
| #define TCNT03_REG TCNT0 |
Definition at line 259 of file ATtiny15.h.
| #define TCNT04_REG TCNT0 |
Definition at line 260 of file ATtiny15.h.
| #define TCNT05_REG TCNT0 |
Definition at line 261 of file ATtiny15.h.
| #define TCNT06_REG TCNT0 |
Definition at line 262 of file ATtiny15.h.
| #define TCNT07_REG TCNT0 |
Definition at line 263 of file ATtiny15.h.
| #define TCNT1_0_REG TCNT1 |
Definition at line 266 of file ATtiny15.h.
| #define TCNT1_1_REG TCNT1 |
Definition at line 267 of file ATtiny15.h.
| #define TCNT1_2_REG TCNT1 |
Definition at line 268 of file ATtiny15.h.
| #define TCNT1_3_REG TCNT1 |
Definition at line 269 of file ATtiny15.h.
| #define TCNT1_4_REG TCNT1 |
Definition at line 270 of file ATtiny15.h.
| #define TCNT1_5_REG TCNT1 |
Definition at line 271 of file ATtiny15.h.
| #define TCNT1_6_REG TCNT1 |
Definition at line 272 of file ATtiny15.h.
| #define TCNT1_7_REG TCNT1 |
Definition at line 273 of file ATtiny15.h.
| #define TIMER0_AVAILABLE |
Definition at line 83 of file ATtiny15.h.
| #define TIMER0_PRESCALER_DIV_0 0 |
Definition at line 28 of file ATtiny15.h.
| #define TIMER0_PRESCALER_DIV_1 1 |
Definition at line 29 of file ATtiny15.h.
| #define TIMER0_PRESCALER_DIV_1024 5 |
Definition at line 33 of file ATtiny15.h.
| #define TIMER0_PRESCALER_DIV_256 4 |
Definition at line 32 of file ATtiny15.h.
| #define TIMER0_PRESCALER_DIV_64 3 |
Definition at line 31 of file ATtiny15.h.
| #define TIMER0_PRESCALER_DIV_8 2 |
Definition at line 30 of file ATtiny15.h.
| #define TIMER0_PRESCALER_DIV_FALL 6 |
Definition at line 34 of file ATtiny15.h.
| #define TIMER0_PRESCALER_DIV_RISE 7 |
Definition at line 35 of file ATtiny15.h.
| #define TIMER0_PRESCALER_REG_0 0 |
Definition at line 37 of file ATtiny15.h.
| #define TIMER0_PRESCALER_REG_1 1 |
Definition at line 38 of file ATtiny15.h.
| #define TIMER0_PRESCALER_REG_2 8 |
Definition at line 39 of file ATtiny15.h.
| #define TIMER0_PRESCALER_REG_3 64 |
Definition at line 40 of file ATtiny15.h.
| #define TIMER0_PRESCALER_REG_4 256 |
Definition at line 41 of file ATtiny15.h.
| #define TIMER0_PRESCALER_REG_5 1024 |
Definition at line 42 of file ATtiny15.h.
| #define TIMER0_PRESCALER_REG_6 -1 |
Definition at line 43 of file ATtiny15.h.
| #define TIMER0_PRESCALER_REG_7 -2 |
Definition at line 44 of file ATtiny15.h.
| #define TIMER1_AVAILABLE |
Definition at line 84 of file ATtiny15.h.
| #define TIMER1_PRESCALER_DIV_ -3 4 |
Definition at line 51 of file ATtiny15.h.
| #define TIMER1_PRESCALER_DIV_ -3 3 |
Definition at line 51 of file ATtiny15.h.
| #define TIMER1_PRESCALER_DIV_ -3 2 |
Definition at line 51 of file ATtiny15.h.
| #define TIMER1_PRESCALER_DIV_ -3 1 |
Definition at line 51 of file ATtiny15.h.
| #define TIMER1_PRESCALER_DIV_0 0 |
Definition at line 47 of file ATtiny15.h.
| #define TIMER1_PRESCALER_DIV_1 5 |
Definition at line 52 of file ATtiny15.h.
| #define TIMER1_PRESCALER_DIV_1024 15 |
Definition at line 62 of file ATtiny15.h.
| #define TIMER1_PRESCALER_DIV_128 12 |
Definition at line 59 of file ATtiny15.h.
| #define TIMER1_PRESCALER_DIV_16 9 |
Definition at line 56 of file ATtiny15.h.
| #define TIMER1_PRESCALER_DIV_2 6 |
Definition at line 53 of file ATtiny15.h.
| #define TIMER1_PRESCALER_DIV_256 13 |
Definition at line 60 of file ATtiny15.h.
| #define TIMER1_PRESCALER_DIV_32 10 |
Definition at line 57 of file ATtiny15.h.
| #define TIMER1_PRESCALER_DIV_4 7 |
Definition at line 54 of file ATtiny15.h.
| #define TIMER1_PRESCALER_DIV_512 14 |
Definition at line 61 of file ATtiny15.h.
| #define TIMER1_PRESCALER_DIV_64 11 |
Definition at line 58 of file ATtiny15.h.
| #define TIMER1_PRESCALER_DIV_8 8 |
Definition at line 55 of file ATtiny15.h.
| #define TIMER1_PRESCALER_REG_0 0 |
Definition at line 64 of file ATtiny15.h.
| #define TIMER1_PRESCALER_REG_1 -3 |
Definition at line 65 of file ATtiny15.h.
| #define TIMER1_PRESCALER_REG_10 32 |
Definition at line 74 of file ATtiny15.h.
| #define TIMER1_PRESCALER_REG_11 64 |
Definition at line 75 of file ATtiny15.h.
| #define TIMER1_PRESCALER_REG_12 128 |
Definition at line 76 of file ATtiny15.h.
| #define TIMER1_PRESCALER_REG_13 256 |
Definition at line 77 of file ATtiny15.h.
| #define TIMER1_PRESCALER_REG_14 512 |
Definition at line 78 of file ATtiny15.h.
| #define TIMER1_PRESCALER_REG_15 1024 |
Definition at line 79 of file ATtiny15.h.
| #define TIMER1_PRESCALER_REG_2 -3 |
Definition at line 66 of file ATtiny15.h.
| #define TIMER1_PRESCALER_REG_3 -3 |
Definition at line 67 of file ATtiny15.h.
| #define TIMER1_PRESCALER_REG_4 -3 |
Definition at line 68 of file ATtiny15.h.
| #define TIMER1_PRESCALER_REG_5 1 |
Definition at line 69 of file ATtiny15.h.
| #define TIMER1_PRESCALER_REG_6 2 |
Definition at line 70 of file ATtiny15.h.
| #define TIMER1_PRESCALER_REG_7 4 |
Definition at line 71 of file ATtiny15.h.
| #define TIMER1_PRESCALER_REG_8 8 |
Definition at line 72 of file ATtiny15.h.
| #define TIMER1_PRESCALER_REG_9 16 |
Definition at line 73 of file ATtiny15.h.
| #define TOIE0_REG TIMSK |
Definition at line 180 of file ATtiny15.h.
| #define TOIE1_REG TIMSK |
Definition at line 181 of file ATtiny15.h.
| #define TOV0_REG TIFR |
Definition at line 276 of file ATtiny15.h.
| #define TOV1_REG TIFR |
Definition at line 277 of file ATtiny15.h.
| #define V_REG SREG |
Definition at line 141 of file ATtiny15.h.
| #define WDE_REG WDTCR |
Definition at line 107 of file ATtiny15.h.
| #define WDP0_REG WDTCR |
Definition at line 104 of file ATtiny15.h.
| #define WDP1_REG WDTCR |
Definition at line 105 of file ATtiny15.h.
| #define WDP2_REG WDTCR |
Definition at line 106 of file ATtiny15.h.
| #define WDRF_REG MCUSR |
Definition at line 202 of file ATtiny15.h.
| #define WDTOE_REG WDTCR |
Definition at line 108 of file ATtiny15.h.
| #define Z_REG SREG |
Definition at line 139 of file ATtiny15.h.
1.5.6