Go to the source code of this file.
Defines | |
| #define | TIMER0_PRESCALER_DIV_0 0 |
| #define | TIMER0_PRESCALER_DIV_1 1 |
| #define | TIMER0_PRESCALER_DIV_8 2 |
| #define | TIMER0_PRESCALER_DIV_64 3 |
| #define | TIMER0_PRESCALER_DIV_256 4 |
| #define | TIMER0_PRESCALER_DIV_1024 5 |
| #define | TIMER0_PRESCALER_DIV_FALL 6 |
| #define | TIMER0_PRESCALER_DIV_RISE 7 |
| #define | TIMER0_PRESCALER_REG_0 0 |
| #define | TIMER0_PRESCALER_REG_1 1 |
| #define | TIMER0_PRESCALER_REG_2 8 |
| #define | TIMER0_PRESCALER_REG_3 64 |
| #define | TIMER0_PRESCALER_REG_4 256 |
| #define | TIMER0_PRESCALER_REG_5 1024 |
| #define | TIMER0_PRESCALER_REG_6 -1 |
| #define | TIMER0_PRESCALER_REG_7 -2 |
| #define | TIMER0_AVAILABLE |
| #define | SIG_OVERFLOW0_NUM 0 |
| #define | SIG_OVERFLOW_TOTAL_NUM 1 |
| #define | SIG_OUTPUT_COMPARE_TOTAL_NUM 0 |
| #define | PWM_TOTAL_NUM 0 |
| #define | SIG_INPUT_CAPTURE_TOTAL_NUM 0 |
| #define | PCIF_REG GIFR |
| #define | INTF0_REG GIFR |
| #define | TOIE0_REG TIMSK |
| #define | WDP0_REG WDTCR |
| #define | WDP1_REG WDTCR |
| #define | WDP2_REG WDTCR |
| #define | WDE_REG WDTCR |
| #define | WDTOE_REG WDTCR |
| #define | PCIE_REG GIMSK |
| #define | INT0_REG GIMSK |
| #define | CAL0_REG OSCCAL |
| #define | CAL1_REG OSCCAL |
| #define | CAL2_REG OSCCAL |
| #define | CAL3_REG OSCCAL |
| #define | CAL4_REG OSCCAL |
| #define | CAL5_REG OSCCAL |
| #define | CAL6_REG OSCCAL |
| #define | CAL7_REG OSCCAL |
| #define | PINB0_REG PINB |
| #define | PINB1_REG PINB |
| #define | PINB2_REG PINB |
| #define | PINB3_REG PINB |
| #define | PINB4_REG PINB |
| #define | PINB5_REG PINB |
| #define | EEAR0_REG EEAR |
| #define | EEAR1_REG EEAR |
| #define | EEAR2_REG EEAR |
| #define | EEAR3_REG EEAR |
| #define | EEAR4_REG EEAR |
| #define | EEAR5_REG EEAR |
| #define | PORTB0_REG PORTB |
| #define | PORTB1_REG PORTB |
| #define | PORTB2_REG PORTB |
| #define | PORTB3_REG PORTB |
| #define | PORTB4_REG PORTB |
| #define | CS00_REG TCCR0 |
| #define | CS01_REG TCCR0 |
| #define | CS02_REG TCCR0 |
| #define | EERE_REG EECR |
| #define | EEWE_REG EECR |
| #define | EEMWE_REG EECR |
| #define | EERIE_REG EECR |
| #define | ISC00_REG MCUCR |
| #define | ISC01_REG MCUCR |
| #define | SM_REG MCUCR |
| #define | SE_REG MCUCR |
| #define | PUD_REG MCUCR |
| #define | DDB0_REG DDRB |
| #define | DDB1_REG DDRB |
| #define | DDB2_REG DDRB |
| #define | DDB3_REG DDRB |
| #define | DDB4_REG DDRB |
| #define | DDB5_REG DDRB |
| #define | TCNT00_REG TCNT0 |
| #define | TCNT01_REG TCNT0 |
| #define | TCNT02_REG TCNT0 |
| #define | TCNT03_REG TCNT0 |
| #define | TCNT04_REG TCNT0 |
| #define | TCNT05_REG TCNT0 |
| #define | TCNT06_REG TCNT0 |
| #define | TCNT07_REG TCNT0 |
| #define | ACIS0_REG ACSR |
| #define | ACIS1_REG ACSR |
| #define | ACIE_REG ACSR |
| #define | ACI_REG ACSR |
| #define | ACO_REG ACSR |
| #define | AINBG_REG ACSR |
| #define | ACD_REG ACSR |
| #define | EEDR0_REG EEDR |
| #define | EEDR1_REG EEDR |
| #define | EEDR2_REG EEDR |
| #define | EEDR3_REG EEDR |
| #define | EEDR4_REG EEDR |
| #define | EEDR5_REG EEDR |
| #define | EEDR6_REG EEDR |
| #define | EEDR7_REG EEDR |
| #define | C_REG SREG |
| #define | Z_REG SREG |
| #define | N_REG SREG |
| #define | V_REG SREG |
| #define | S_REG SREG |
| #define | H_REG SREG |
| #define | T_REG SREG |
| #define | I_REG SREG |
| #define | TOV0_REG TIFR |
| #define | PORF_REG MCUSR |
| #define | EXTRF_REG MCUSR |
| #define | BORF_REG MCUSR |
| #define | WDRF_REG MCUSR |
| #define | MOSI_PORT PORTB |
| #define | MOSI_BIT 0 |
| #define | MISO_PORT PORTB |
| #define | MISO_BIT 1 |
| #define | INT0_PORT PORTB |
| #define | INT0_BIT 1 |
| #define | SCK_PORT PORTB |
| #define | SCK_BIT 2 |
| #define | T0_PORT PORTB |
| #define | T0_BIT 2 |
| #define | CLOCK_PORT PORTB |
| #define | CLOCK_BIT 3 |
| #define ACD_REG ACSR |
Definition at line 158 of file ATtiny12.h.
| #define ACI_REG ACSR |
Definition at line 155 of file ATtiny12.h.
| #define ACIE_REG ACSR |
Definition at line 154 of file ATtiny12.h.
| #define ACIS0_REG ACSR |
Definition at line 152 of file ATtiny12.h.
| #define ACIS1_REG ACSR |
Definition at line 153 of file ATtiny12.h.
| #define ACO_REG ACSR |
Definition at line 156 of file ATtiny12.h.
| #define AINBG_REG ACSR |
Definition at line 157 of file ATtiny12.h.
| #define BORF_REG MCUSR |
Definition at line 186 of file ATtiny12.h.
| #define C_REG SREG |
Definition at line 171 of file ATtiny12.h.
| #define CAL0_REG OSCCAL |
Definition at line 83 of file ATtiny12.h.
| #define CAL1_REG OSCCAL |
Definition at line 84 of file ATtiny12.h.
| #define CAL2_REG OSCCAL |
Definition at line 85 of file ATtiny12.h.
| #define CAL3_REG OSCCAL |
Definition at line 86 of file ATtiny12.h.
| #define CAL4_REG OSCCAL |
Definition at line 87 of file ATtiny12.h.
| #define CAL5_REG OSCCAL |
Definition at line 88 of file ATtiny12.h.
| #define CAL6_REG OSCCAL |
Definition at line 89 of file ATtiny12.h.
| #define CAL7_REG OSCCAL |
Definition at line 90 of file ATtiny12.h.
| #define CLOCK_BIT 3 |
Definition at line 204 of file ATtiny12.h.
| #define CLOCK_PORT PORTB |
Definition at line 203 of file ATtiny12.h.
| #define CS00_REG TCCR0 |
Definition at line 116 of file ATtiny12.h.
| #define CS01_REG TCCR0 |
Definition at line 117 of file ATtiny12.h.
| #define CS02_REG TCCR0 |
Definition at line 118 of file ATtiny12.h.
| #define DDB0_REG DDRB |
Definition at line 134 of file ATtiny12.h.
| #define DDB1_REG DDRB |
Definition at line 135 of file ATtiny12.h.
| #define DDB2_REG DDRB |
Definition at line 136 of file ATtiny12.h.
| #define DDB3_REG DDRB |
Definition at line 137 of file ATtiny12.h.
| #define DDB4_REG DDRB |
Definition at line 138 of file ATtiny12.h.
| #define DDB5_REG DDRB |
Definition at line 139 of file ATtiny12.h.
| #define EEAR0_REG EEAR |
Definition at line 101 of file ATtiny12.h.
| #define EEAR1_REG EEAR |
Definition at line 102 of file ATtiny12.h.
| #define EEAR2_REG EEAR |
Definition at line 103 of file ATtiny12.h.
| #define EEAR3_REG EEAR |
Definition at line 104 of file ATtiny12.h.
| #define EEAR4_REG EEAR |
Definition at line 105 of file ATtiny12.h.
| #define EEAR5_REG EEAR |
Definition at line 106 of file ATtiny12.h.
| #define EEDR0_REG EEDR |
Definition at line 161 of file ATtiny12.h.
| #define EEDR1_REG EEDR |
Definition at line 162 of file ATtiny12.h.
| #define EEDR2_REG EEDR |
Definition at line 163 of file ATtiny12.h.
| #define EEDR3_REG EEDR |
Definition at line 164 of file ATtiny12.h.
| #define EEDR4_REG EEDR |
Definition at line 165 of file ATtiny12.h.
| #define EEDR5_REG EEDR |
Definition at line 166 of file ATtiny12.h.
| #define EEDR6_REG EEDR |
Definition at line 167 of file ATtiny12.h.
| #define EEDR7_REG EEDR |
Definition at line 168 of file ATtiny12.h.
| #define EEMWE_REG EECR |
Definition at line 123 of file ATtiny12.h.
| #define EERE_REG EECR |
Definition at line 121 of file ATtiny12.h.
| #define EERIE_REG EECR |
Definition at line 124 of file ATtiny12.h.
| #define EEWE_REG EECR |
Definition at line 122 of file ATtiny12.h.
| #define EXTRF_REG MCUSR |
Definition at line 185 of file ATtiny12.h.
| #define H_REG SREG |
Definition at line 176 of file ATtiny12.h.
| #define I_REG SREG |
Definition at line 178 of file ATtiny12.h.
| #define INT0_BIT 1 |
Definition at line 196 of file ATtiny12.h.
| #define INT0_PORT PORTB |
Definition at line 195 of file ATtiny12.h.
| #define INT0_REG GIMSK |
Definition at line 80 of file ATtiny12.h.
| #define INTF0_REG GIFR |
Definition at line 66 of file ATtiny12.h.
| #define ISC00_REG MCUCR |
Definition at line 127 of file ATtiny12.h.
| #define ISC01_REG MCUCR |
Definition at line 128 of file ATtiny12.h.
| #define MISO_BIT 1 |
Definition at line 194 of file ATtiny12.h.
| #define MISO_PORT PORTB |
Definition at line 193 of file ATtiny12.h.
| #define MOSI_BIT 0 |
Definition at line 191 of file ATtiny12.h.
| #define MOSI_PORT PORTB |
Definition at line 190 of file ATtiny12.h.
| #define N_REG SREG |
Definition at line 173 of file ATtiny12.h.
| #define PCIE_REG GIMSK |
Definition at line 79 of file ATtiny12.h.
| #define PCIF_REG GIFR |
Definition at line 65 of file ATtiny12.h.
| #define PINB0_REG PINB |
Definition at line 93 of file ATtiny12.h.
| #define PINB1_REG PINB |
Definition at line 94 of file ATtiny12.h.
| #define PINB2_REG PINB |
Definition at line 95 of file ATtiny12.h.
| #define PINB3_REG PINB |
Definition at line 96 of file ATtiny12.h.
| #define PINB4_REG PINB |
Definition at line 97 of file ATtiny12.h.
| #define PINB5_REG PINB |
Definition at line 98 of file ATtiny12.h.
| #define PORF_REG MCUSR |
Definition at line 184 of file ATtiny12.h.
| #define PORTB0_REG PORTB |
Definition at line 109 of file ATtiny12.h.
| #define PORTB1_REG PORTB |
Definition at line 110 of file ATtiny12.h.
| #define PORTB2_REG PORTB |
Definition at line 111 of file ATtiny12.h.
| #define PORTB3_REG PORTB |
Definition at line 112 of file ATtiny12.h.
| #define PORTB4_REG PORTB |
Definition at line 113 of file ATtiny12.h.
| #define PUD_REG MCUCR |
Definition at line 131 of file ATtiny12.h.
| #define PWM_TOTAL_NUM 0 |
Definition at line 58 of file ATtiny12.h.
| #define S_REG SREG |
Definition at line 175 of file ATtiny12.h.
| #define SCK_BIT 2 |
Definition at line 199 of file ATtiny12.h.
| #define SCK_PORT PORTB |
Definition at line 198 of file ATtiny12.h.
| #define SE_REG MCUCR |
Definition at line 130 of file ATtiny12.h.
| #define SIG_INPUT_CAPTURE_TOTAL_NUM 0 |
Definition at line 61 of file ATtiny12.h.
| #define SIG_OUTPUT_COMPARE_TOTAL_NUM 0 |
Definition at line 55 of file ATtiny12.h.
| #define SIG_OVERFLOW0_NUM 0 |
Definition at line 51 of file ATtiny12.h.
| #define SIG_OVERFLOW_TOTAL_NUM 1 |
Definition at line 52 of file ATtiny12.h.
| #define SM_REG MCUCR |
Definition at line 129 of file ATtiny12.h.
| #define T0_BIT 2 |
Definition at line 201 of file ATtiny12.h.
| #define T0_PORT PORTB |
Definition at line 200 of file ATtiny12.h.
| #define T_REG SREG |
Definition at line 177 of file ATtiny12.h.
| #define TCNT00_REG TCNT0 |
Definition at line 142 of file ATtiny12.h.
| #define TCNT01_REG TCNT0 |
Definition at line 143 of file ATtiny12.h.
| #define TCNT02_REG TCNT0 |
Definition at line 144 of file ATtiny12.h.
| #define TCNT03_REG TCNT0 |
Definition at line 145 of file ATtiny12.h.
| #define TCNT04_REG TCNT0 |
Definition at line 146 of file ATtiny12.h.
| #define TCNT05_REG TCNT0 |
Definition at line 147 of file ATtiny12.h.
| #define TCNT06_REG TCNT0 |
Definition at line 148 of file ATtiny12.h.
| #define TCNT07_REG TCNT0 |
Definition at line 149 of file ATtiny12.h.
| #define TIMER0_AVAILABLE |
Definition at line 48 of file ATtiny12.h.
| #define TIMER0_PRESCALER_DIV_0 0 |
Definition at line 28 of file ATtiny12.h.
| #define TIMER0_PRESCALER_DIV_1 1 |
Definition at line 29 of file ATtiny12.h.
| #define TIMER0_PRESCALER_DIV_1024 5 |
Definition at line 33 of file ATtiny12.h.
| #define TIMER0_PRESCALER_DIV_256 4 |
Definition at line 32 of file ATtiny12.h.
| #define TIMER0_PRESCALER_DIV_64 3 |
Definition at line 31 of file ATtiny12.h.
| #define TIMER0_PRESCALER_DIV_8 2 |
Definition at line 30 of file ATtiny12.h.
| #define TIMER0_PRESCALER_DIV_FALL 6 |
Definition at line 34 of file ATtiny12.h.
| #define TIMER0_PRESCALER_DIV_RISE 7 |
Definition at line 35 of file ATtiny12.h.
| #define TIMER0_PRESCALER_REG_0 0 |
Definition at line 37 of file ATtiny12.h.
| #define TIMER0_PRESCALER_REG_1 1 |
Definition at line 38 of file ATtiny12.h.
| #define TIMER0_PRESCALER_REG_2 8 |
Definition at line 39 of file ATtiny12.h.
| #define TIMER0_PRESCALER_REG_3 64 |
Definition at line 40 of file ATtiny12.h.
| #define TIMER0_PRESCALER_REG_4 256 |
Definition at line 41 of file ATtiny12.h.
| #define TIMER0_PRESCALER_REG_5 1024 |
Definition at line 42 of file ATtiny12.h.
| #define TIMER0_PRESCALER_REG_6 -1 |
Definition at line 43 of file ATtiny12.h.
| #define TIMER0_PRESCALER_REG_7 -2 |
Definition at line 44 of file ATtiny12.h.
| #define TOIE0_REG TIMSK |
Definition at line 69 of file ATtiny12.h.
| #define TOV0_REG TIFR |
Definition at line 181 of file ATtiny12.h.
| #define V_REG SREG |
Definition at line 174 of file ATtiny12.h.
| #define WDE_REG WDTCR |
Definition at line 75 of file ATtiny12.h.
| #define WDP0_REG WDTCR |
Definition at line 72 of file ATtiny12.h.
| #define WDP1_REG WDTCR |
Definition at line 73 of file ATtiny12.h.
| #define WDP2_REG WDTCR |
Definition at line 74 of file ATtiny12.h.
| #define WDRF_REG MCUSR |
Definition at line 187 of file ATtiny12.h.
| #define WDTOE_REG WDTCR |
Definition at line 76 of file ATtiny12.h.
| #define Z_REG SREG |
Definition at line 172 of file ATtiny12.h.
1.5.6