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Defines | |
| #define | TIMER0_PRESCALER_DIV_0 0 |
| #define | TIMER0_PRESCALER_DIV_1 1 |
| #define | TIMER0_PRESCALER_DIV_8 2 |
| #define | TIMER0_PRESCALER_DIV_64 3 |
| #define | TIMER0_PRESCALER_DIV_256 4 |
| #define | TIMER0_PRESCALER_DIV_1024 5 |
| #define | TIMER0_PRESCALER_DIV_FALL 6 |
| #define | TIMER0_PRESCALER_DIV_RISE 7 |
| #define | TIMER0_PRESCALER_REG_0 0 |
| #define | TIMER0_PRESCALER_REG_1 1 |
| #define | TIMER0_PRESCALER_REG_2 8 |
| #define | TIMER0_PRESCALER_REG_3 64 |
| #define | TIMER0_PRESCALER_REG_4 256 |
| #define | TIMER0_PRESCALER_REG_5 1024 |
| #define | TIMER0_PRESCALER_REG_6 -1 |
| #define | TIMER0_PRESCALER_REG_7 -2 |
| #define | TIMER1_PRESCALER_DIV_0 0 |
| #define | TIMER1_PRESCALER_DIV_1 1 |
| #define | TIMER1_PRESCALER_DIV_8 2 |
| #define | TIMER1_PRESCALER_DIV_64 3 |
| #define | TIMER1_PRESCALER_DIV_256 4 |
| #define | TIMER1_PRESCALER_DIV_1024 5 |
| #define | TIMER1_PRESCALER_DIV_FALL 6 |
| #define | TIMER1_PRESCALER_DIV_RISE 7 |
| #define | TIMER1_PRESCALER_REG_0 0 |
| #define | TIMER1_PRESCALER_REG_1 1 |
| #define | TIMER1_PRESCALER_REG_2 8 |
| #define | TIMER1_PRESCALER_REG_3 64 |
| #define | TIMER1_PRESCALER_REG_4 256 |
| #define | TIMER1_PRESCALER_REG_5 1024 |
| #define | TIMER1_PRESCALER_REG_6 -1 |
| #define | TIMER1_PRESCALER_REG_7 -2 |
| #define | TIMER0_AVAILABLE |
| #define | TIMER0A_AVAILABLE |
| #define | TIMER0B_AVAILABLE |
| #define | TIMER1_AVAILABLE |
| #define | TIMER1A_AVAILABLE |
| #define | TIMER1B_AVAILABLE |
| #define | SIG_OVERFLOW0_NUM 0 |
| #define | SIG_OVERFLOW1_NUM 1 |
| #define | SIG_OVERFLOW_TOTAL_NUM 2 |
| #define | SIG_OUTPUT_COMPARE0A_NUM 0 |
| #define | SIG_OUTPUT_COMPARE0B_NUM 1 |
| #define | SIG_OUTPUT_COMPARE1A_NUM 2 |
| #define | SIG_OUTPUT_COMPARE1B_NUM 3 |
| #define | SIG_OUTPUT_COMPARE_TOTAL_NUM 4 |
| #define | PWM0A_NUM 0 |
| #define | PWM0B_NUM 1 |
| #define | PWM1A_NUM 2 |
| #define | PWM1B_NUM 3 |
| #define | PWM_TOTAL_NUM 4 |
| #define | SIG_INPUT_CAPTURE1_NUM 0 |
| #define | SIG_INPUT_CAPTURE_TOTAL_NUM 1 |
| #define | PORTB0_REG PORTB |
| #define | PORTB1_REG PORTB |
| #define | PORTB2_REG PORTB |
| #define | PORTB3_REG PORTB |
| #define | PORTB4_REG PORTB |
| #define | PORTB5_REG PORTB |
| #define | PORTB6_REG PORTB |
| #define | PORTB7_REG PORTB |
| #define | LBT0_REG LINBTR |
| #define | LBT1_REG LINBTR |
| #define | LBT2_REG LINBTR |
| #define | LBT3_REG LINBTR |
| #define | LBT4_REG LINBTR |
| #define | LBT5_REG LINBTR |
| #define | LDISR_REG LINBTR |
| #define | MUX0_REG ADMUX |
| #define | MUX1_REG ADMUX |
| #define | MUX2_REG ADMUX |
| #define | MUX3_REG ADMUX |
| #define | MUX4_REG ADMUX |
| #define | ADLAR_REG ADMUX |
| #define | REFS0_REG ADMUX |
| #define | REFS1_REG ADMUX |
| #define | LID0_REG LINIDR |
| #define | LID1_REG LINIDR |
| #define | LID2_REG LINIDR |
| #define | LID3_REG LINIDR |
| #define | LID4_REG LINIDR |
| #define | LID5_REG LINIDR |
| #define | LP0_REG LINIDR |
| #define | LP1_REG LINIDR |
| #define | WDP0_REG WDTCSR |
| #define | WDP1_REG WDTCSR |
| #define | WDP2_REG WDTCSR |
| #define | WDE_REG WDTCSR |
| #define | WDCE_REG WDTCSR |
| #define | WDP3_REG WDTCSR |
| #define | WDIE_REG WDTCSR |
| #define | WDIF_REG WDTCSR |
| #define | EEDR0_REG EEDR |
| #define | EEDR1_REG EEDR |
| #define | EEDR2_REG EEDR |
| #define | EEDR3_REG EEDR |
| #define | EEDR4_REG EEDR |
| #define | EEDR5_REG EEDR |
| #define | EEDR6_REG EEDR |
| #define | EEDR7_REG EEDR |
| #define | AC0O_REG ACSR |
| #define | AC1O_REG ACSR |
| #define | AC2O_REG ACSR |
| #define | AC3O_REG ACSR |
| #define | AC0IF_REG ACSR |
| #define | AC1IF_REG ACSR |
| #define | AC2IF_REG ACSR |
| #define | AC3IF_REG ACSR |
| #define | LINDX0_REG LINSEL |
| #define | LINDX1_REG LINSEL |
| #define | LINDX2_REG LINSEL |
| #define | LAINC_REG LINSEL |
| #define | LCMD0_REG LINCR |
| #define | LCMD1_REG LINCR |
| #define | LCMD2_REG LINCR |
| #define | LENA_REG LINCR |
| #define | LCONF0_REG LINCR |
| #define | LCONF1_REG LINCR |
| #define | LIN13_REG LINCR |
| #define | LSWRES_REG LINCR |
| #define | SPDR0_REG SPDR |
| #define | SPDR1_REG SPDR |
| #define | SPDR2_REG SPDR |
| #define | SPDR3_REG SPDR |
| #define | SPDR4_REG SPDR |
| #define | SPDR5_REG SPDR |
| #define | SPDR6_REG SPDR |
| #define | SPDR7_REG SPDR |
| #define | SPI2X_REG SPSR |
| #define | WCOL_REG SPSR |
| #define | SPIF_REG SPSR |
| #define | ICR1H0_REG ICR1H |
| #define | ICR1H1_REG ICR1H |
| #define | ICR1H2_REG ICR1H |
| #define | ICR1H3_REG ICR1H |
| #define | ICR1H4_REG ICR1H |
| #define | ICR1H5_REG ICR1H |
| #define | ICR1H6_REG ICR1H |
| #define | ICR1H7_REG ICR1H |
| #define | ICR1L0_REG ICR1L |
| #define | ICR1L1_REG ICR1L |
| #define | ICR1L2_REG ICR1L |
| #define | ICR1L3_REG ICR1L |
| #define | ICR1L4_REG ICR1L |
| #define | ICR1L5_REG ICR1L |
| #define | ICR1L6_REG ICR1L |
| #define | ICR1L7_REG ICR1L |
| #define | AC1M0_REG AC1CON |
| #define | AC1M1_REG AC1CON |
| #define | AC1M2_REG AC1CON |
| #define | AC1ICE_REG AC1CON |
| #define | AC1IS0_REG AC1CON |
| #define | AC1IS1_REG AC1CON |
| #define | AC1IE_REG AC1CON |
| #define | AC1EN_REG AC1CON |
| #define | PRADC_REG PRR |
| #define | PRLIN_REG PRR |
| #define | PRSPI_REG PRR |
| #define | PRTIM0_REG PRR |
| #define | PRTIM1_REG PRR |
| #define | PRPSC_REG PRR |
| #define | PRCAN_REG PRR |
| #define | LDIV0_REG LINBRRL |
| #define | LDIV1_REG LINBRRL |
| #define | LDIV2_REG LINBRRL |
| #define | LDIV3_REG LINBRRL |
| #define | LDIV4_REG LINBRRL |
| #define | LDIV5_REG LINBRRL |
| #define | LDIV6_REG LINBRRL |
| #define | LDIV7_REG LINBRRL |
| #define | LDIV8_REG LINBRRH |
| #define | LDIV9_REG LINBRRH |
| #define | LDIV10_REG LINBRRH |
| #define | LDIV11_REG LINBRRH |
| #define | ERRP_REG CANGSTA |
| #define | BOFF_REG CANGSTA |
| #define | ENFG_REG CANGSTA |
| #define | RXBSY_REG CANGSTA |
| #define | TXBSY_REG CANGSTA |
| #define | OVFG_REG CANGSTA |
| #define | SWRES_REG CANGCON |
| #define | ENASTB_REG CANGCON |
| #define | TEST_REG CANGCON |
| #define | LISTEN_REG CANGCON |
| #define | SYNTTC_REG CANGCON |
| #define | TTC_REG CANGCON |
| #define | OVRQ_REG CANGCON |
| #define | ABRQ_REG CANGCON |
| #define | PORTD0_REG PORTD |
| #define | PORTD1_REG PORTD |
| #define | PORTD2_REG PORTD |
| #define | PORTD3_REG PORTD |
| #define | PORTD4_REG PORTD |
| #define | PORTD5_REG PORTD |
| #define | PORTD6_REG PORTD |
| #define | PORTD7_REG PORTD |
| #define | PORTE0_REG PORTE |
| #define | PORTE1_REG PORTE |
| #define | PORTE2_REG PORTE |
| #define | TCNT1H0_REG TCNT1H |
| #define | TCNT1H1_REG TCNT1H |
| #define | TCNT1H2_REG TCNT1H |
| #define | TCNT1H3_REG TCNT1H |
| #define | TCNT1H4_REG TCNT1H |
| #define | TCNT1H5_REG TCNT1H |
| #define | TCNT1H6_REG TCNT1H |
| #define | TCNT1H7_REG TCNT1H |
| #define | PORTC0_REG PORTC |
| #define | PORTC1_REG PORTC |
| #define | PORTC2_REG PORTC |
| #define | PORTC3_REG PORTC |
| #define | PORTC4_REG PORTC |
| #define | PORTC5_REG PORTC |
| #define | PORTC6_REG PORTC |
| #define | PORTC7_REG PORTC |
| #define | AMP1TS0_REG AMP1CSR |
| #define | AMP1TS1_REG AMP1CSR |
| #define | AMP1TS2_REG AMP1CSR |
| #define | AMPCMP1_REG AMP1CSR |
| #define | AMP1G0_REG AMP1CSR |
| #define | AMP1G1_REG AMP1CSR |
| #define | AMP1IS_REG AMP1CSR |
| #define | AMP1EN_REG AMP1CSR |
| #define | AC2M0_REG AC2CON |
| #define | AC2M1_REG AC2CON |
| #define | AC2M2_REG AC2CON |
| #define | AC2IS0_REG AC2CON |
| #define | AC2IS1_REG AC2CON |
| #define | AC2IE_REG AC2CON |
| #define | AC2EN_REG AC2CON |
| #define | EEAR0_REG EEARL |
| #define | EEAR1_REG EEARL |
| #define | EEAR2_REG EEARL |
| #define | EEAR3_REG EEARL |
| #define | EEAR4_REG EEARL |
| #define | EEAR5_REG EEARL |
| #define | EEAR6_REG EEARL |
| #define | EEAR7_REG EEARL |
| #define | INT0_REG EIMSK |
| #define | INT1_REG EIMSK |
| #define | INT2_REG EIMSK |
| #define | INT3_REG EIMSK |
| #define | ISC00_REG EICRA |
| #define | ISC01_REG EICRA |
| #define | ISC10_REG EICRA |
| #define | ISC11_REG EICRA |
| #define | ISC20_REG EICRA |
| #define | ISC21_REG EICRA |
| #define | ISC30_REG EICRA |
| #define | ISC31_REG EICRA |
| #define | LRXOK_REG LINSIR |
| #define | LTXOK_REG LINSIR |
| #define | LIDOK_REG LINSIR |
| #define | LERR_REG LINSIR |
| #define | LBUSY_REG LINSIR |
| #define | LIDST0_REG LINSIR |
| #define | LIDST1_REG LINSIR |
| #define | LIDST2_REG LINSIR |
| #define | ADC0D_REG DIDR0 |
| #define | ADC1D_REG DIDR0 |
| #define | ADC2D_REG DIDR0 |
| #define | ADC3D_REG DIDR0 |
| #define | ADC4D_REG DIDR0 |
| #define | ADC5D_REG DIDR0 |
| #define | ADC6D_REG DIDR0 |
| #define | ADC7D_REG DIDR0 |
| #define | ADC8D_REG DIDR1 |
| #define | ADC9D_REG DIDR1 |
| #define | ADC10D_REG DIDR1 |
| #define | AMP0ND_REG DIDR1 |
| #define | AMP0PD_REG DIDR1 |
| #define | ACMP0D_REG DIDR1 |
| #define | AMP2PD_REG DIDR1 |
| #define | CLKPS0_REG CLKPR |
| #define | CLKPS1_REG CLKPR |
| #define | CLKPS2_REG CLKPR |
| #define | CLKPS3_REG CLKPR |
| #define | CLKPCE_REG CLKPR |
| #define | C_REG SREG |
| #define | Z_REG SREG |
| #define | N_REG SREG |
| #define | V_REG SREG |
| #define | S_REG SREG |
| #define | H_REG SREG |
| #define | T_REG SREG |
| #define | I_REG SREG |
| #define | IDMSK21_REG CANIDM1 |
| #define | IDMSK22_REG CANIDM1 |
| #define | IDMSK23_REG CANIDM1 |
| #define | IDMSK24_REG CANIDM1 |
| #define | IDMSK25_REG CANIDM1 |
| #define | IDMSK26_REG CANIDM1 |
| #define | IDMSK27_REG CANIDM1 |
| #define | IDMSK28_REG CANIDM1 |
| #define | IDMSK5_REG CANIDM3 |
| #define | IDMSK6_REG CANIDM3 |
| #define | IDMSK7_REG CANIDM3 |
| #define | IDMSK8_REG CANIDM3 |
| #define | IDMSK9_REG CANIDM3 |
| #define | IDMSK10_REG CANIDM3 |
| #define | IDMSK11_REG CANIDM3 |
| #define | IDMSK12_REG CANIDM3 |
| #define | IDMSK13_REG CANIDM2 |
| #define | IDMSK14_REG CANIDM2 |
| #define | IDMSK15_REG CANIDM2 |
| #define | IDMSK16_REG CANIDM2 |
| #define | IDMSK17_REG CANIDM2 |
| #define | IDMSK18_REG CANIDM2 |
| #define | IDMSK19_REG CANIDM2 |
| #define | IDMSK20_REG CANIDM2 |
| #define | IDEMSK_REG CANIDM4 |
| #define | RTRMSK_REG CANIDM4 |
| #define | IDMSK0_REG CANIDM4 |
| #define | IDMSK1_REG CANIDM4 |
| #define | IDMSK2_REG CANIDM4 |
| #define | IDMSK3_REG CANIDM4 |
| #define | IDMSK4_REG CANIDM4 |
| #define | DDB0_REG DDRB |
| #define | DDB1_REG DDRB |
| #define | DDB2_REG DDRB |
| #define | DDB3_REG DDRB |
| #define | DDB4_REG DDRB |
| #define | DDB5_REG DDRB |
| #define | DDB6_REG DDRB |
| #define | DDB7_REG DDRB |
| #define | DDC0_REG DDRC |
| #define | DDC1_REG DDRC |
| #define | DDC2_REG DDRC |
| #define | DDC3_REG DDRC |
| #define | DDC4_REG DDRC |
| #define | DDC5_REG DDRC |
| #define | DDC6_REG DDRC |
| #define | DDC7_REG DDRC |
| #define | WGM10_REG TCCR1A |
| #define | WGM11_REG TCCR1A |
| #define | COM1B0_REG TCCR1A |
| #define | COM1B1_REG TCCR1A |
| #define | COM1A0_REG TCCR1A |
| #define | COM1A1_REG TCCR1A |
| #define | FOC1B_REG TCCR1C |
| #define | FOC1A_REG TCCR1C |
| #define | CS10_REG TCCR1B |
| #define | CS11_REG TCCR1B |
| #define | CS12_REG TCCR1B |
| #define | WGM12_REG TCCR1B |
| #define | WGM13_REG TCCR1B |
| #define | ICES1_REG TCCR1B |
| #define | ICNC1_REG TCCR1B |
| #define | CAL0_REG OSCCAL |
| #define | CAL1_REG OSCCAL |
| #define | CAL2_REG OSCCAL |
| #define | CAL3_REG OSCCAL |
| #define | CAL4_REG OSCCAL |
| #define | CAL5_REG OSCCAL |
| #define | CAL6_REG OSCCAL |
| #define | GPIOR10_REG GPIOR1 |
| #define | GPIOR11_REG GPIOR1 |
| #define | GPIOR12_REG GPIOR1 |
| #define | GPIOR13_REG GPIOR1 |
| #define | GPIOR14_REG GPIOR1 |
| #define | GPIOR15_REG GPIOR1 |
| #define | GPIOR16_REG GPIOR1 |
| #define | GPIOR17_REG GPIOR1 |
| #define | GPIOR00_REG GPIOR0 |
| #define | GPIOR01_REG GPIOR0 |
| #define | GPIOR02_REG GPIOR0 |
| #define | GPIOR03_REG GPIOR0 |
| #define | GPIOR04_REG GPIOR0 |
| #define | GPIOR05_REG GPIOR0 |
| #define | GPIOR06_REG GPIOR0 |
| #define | GPIOR07_REG GPIOR0 |
| #define | GPIOR20_REG GPIOR2 |
| #define | GPIOR21_REG GPIOR2 |
| #define | GPIOR22_REG GPIOR2 |
| #define | GPIOR23_REG GPIOR2 |
| #define | GPIOR24_REG GPIOR2 |
| #define | GPIOR25_REG GPIOR2 |
| #define | GPIOR26_REG GPIOR2 |
| #define | GPIOR27_REG GPIOR2 |
| #define | AERG_REG CANGIT |
| #define | FERG_REG CANGIT |
| #define | CERG_REG CANGIT |
| #define | SERG_REG CANGIT |
| #define | BXOK_REG CANGIT |
| #define | OVRTIM_REG CANGIT |
| #define | BOFFIT_REG CANGIT |
| #define | CANIT_REG CANGIT |
| #define | AC3M0_REG AC3CON |
| #define | AC3M1_REG AC3CON |
| #define | AC3M2_REG AC3CON |
| #define | AC3IS0_REG AC3CON |
| #define | AC3IS1_REG AC3CON |
| #define | AC3IE_REG AC3CON |
| #define | AC3EN_REG AC3CON |
| #define | LBERR_REG LINERR |
| #define | LCERR_REG LINERR |
| #define | LPERR_REG LINERR |
| #define | LSERR_REG LINERR |
| #define | LFERR_REG LINERR |
| #define | LOVERR_REG LINERR |
| #define | LTOERR_REG LINERR |
| #define | LABORT_REG LINERR |
| #define | PCIE0_REG PCICR |
| #define | PCIE1_REG PCICR |
| #define | PCIE2_REG PCICR |
| #define | PCIE3_REG PCICR |
| #define | ENOVRT_REG CANGIE |
| #define | ENERG_REG CANGIE |
| #define | ENBX_REG CANGIE |
| #define | ENERR_REG CANGIE |
| #define | ENTX_REG CANGIE |
| #define | ENRX_REG CANGIE |
| #define | ENBOFF_REG CANGIE |
| #define | ENIT_REG CANGIE |
| #define | TCNT0_0_REG TCNT0 |
| #define | TCNT0_1_REG TCNT0 |
| #define | TCNT0_2_REG TCNT0 |
| #define | TCNT0_3_REG TCNT0 |
| #define | TCNT0_4_REG TCNT0 |
| #define | TCNT0_5_REG TCNT0 |
| #define | TCNT0_6_REG TCNT0 |
| #define | TCNT0_7_REG TCNT0 |
| #define | IEMOB0_REG CANIE2 |
| #define | IEMOB1_REG CANIE2 |
| #define | IEMOB2_REG CANIE2 |
| #define | IEMOB3_REG CANIE2 |
| #define | IEMOB4_REG CANIE2 |
| #define | IEMOB5_REG CANIE2 |
| #define | SIT0_REG CANSIT2 |
| #define | SIT1_REG CANSIT2 |
| #define | SIT2_REG CANSIT2 |
| #define | SIT3_REG CANSIT2 |
| #define | SIT4_REG CANSIT2 |
| #define | SIT5_REG CANSIT2 |
| #define | CS00_REG TCCR0B |
| #define | CS01_REG TCCR0B |
| #define | CS02_REG TCCR0B |
| #define | WGM02_REG TCCR0B |
| #define | FOC0B_REG TCCR0B |
| #define | FOC0A_REG TCCR0B |
| #define | WGM00_REG TCCR0A |
| #define | WGM01_REG TCCR0A |
| #define | COM0B0_REG TCCR0A |
| #define | COM0B1_REG TCCR0A |
| #define | COM0A0_REG TCCR0A |
| #define | COM0A1_REG TCCR0A |
| #define | SPR0_REG SPCR |
| #define | SPR1_REG SPCR |
| #define | CPHA_REG SPCR |
| #define | CPOL_REG SPCR |
| #define | MSTR_REG SPCR |
| #define | DORD_REG SPCR |
| #define | SPE_REG SPCR |
| #define | SPIE_REG SPCR |
| #define | TOV1_REG TIFR1 |
| #define | OCF1A_REG TIFR1 |
| #define | OCF1B_REG TIFR1 |
| #define | ICF1_REG TIFR1 |
| #define | RB0TAG_REG CANIDT4 |
| #define | RB1TAG_REG CANIDT4 |
| #define | RTRTAG_REG CANIDT4 |
| #define | IDT0_REG CANIDT4 |
| #define | IDT1_REG CANIDT4 |
| #define | IDT2_REG CANIDT4 |
| #define | IDT3_REG CANIDT4 |
| #define | IDT4_REG CANIDT4 |
| #define | IDT13_REG CANIDT2 |
| #define | IDT14_REG CANIDT2 |
| #define | IDT15_REG CANIDT2 |
| #define | IDT16_REG CANIDT2 |
| #define | IDT17_REG CANIDT2 |
| #define | IDT18_REG CANIDT2 |
| #define | IDT19_REG CANIDT2 |
| #define | IDT20_REG CANIDT2 |
| #define | IDT5_REG CANIDT3 |
| #define | IDT6_REG CANIDT3 |
| #define | IDT7_REG CANIDT3 |
| #define | IDT8_REG CANIDT3 |
| #define | IDT9_REG CANIDT3 |
| #define | IDT10_REG CANIDT3 |
| #define | IDT11_REG CANIDT3 |
| #define | IDT12_REG CANIDT3 |
| #define | IDT21_REG CANIDT1 |
| #define | IDT22_REG CANIDT1 |
| #define | IDT23_REG CANIDT1 |
| #define | IDT24_REG CANIDT1 |
| #define | IDT25_REG CANIDT1 |
| #define | IDT26_REG CANIDT1 |
| #define | IDT27_REG CANIDT1 |
| #define | IDT28_REG CANIDT1 |
| #define | PSR10_REG GTCCR |
| #define | ICPSEL1_REG GTCCR |
| #define | TSM_REG GTCCR |
| #define | PSRSYNC_REG GTCCR |
| #define | DLC0_REG CANCDMOB |
| #define | DLC1_REG CANCDMOB |
| #define | DLC2_REG CANCDMOB |
| #define | DLC3_REG CANCDMOB |
| #define | IDE_REG CANCDMOB |
| #define | RPLV_REG CANCDMOB |
| #define | CONMOB0_REG CANCDMOB |
| #define | CONMOB1_REG CANCDMOB |
| #define | SP8_REG SPH |
| #define | SP9_REG SPH |
| #define | SP10_REG SPH |
| #define | SP11_REG SPH |
| #define | SP12_REG SPH |
| #define | SP13_REG SPH |
| #define | SP14_REG SPH |
| #define | SP15_REG SPH |
| #define | CGP0_REG CANHPMOB |
| #define | CGP1_REG CANHPMOB |
| #define | CGP2_REG CANHPMOB |
| #define | CGP3_REG CANHPMOB |
| #define | HPMOB0_REG CANHPMOB |
| #define | HPMOB1_REG CANHPMOB |
| #define | HPMOB2_REG CANHPMOB |
| #define | HPMOB3_REG CANHPMOB |
| #define | OCR1BL0_REG OCR1BL |
| #define | OCR1BL1_REG OCR1BL |
| #define | OCR1BL2_REG OCR1BL |
| #define | OCR1BL3_REG OCR1BL |
| #define | OCR1BL4_REG OCR1BL |
| #define | OCR1BL5_REG OCR1BL |
| #define | OCR1BL6_REG OCR1BL |
| #define | OCR1BL7_REG OCR1BL |
| #define | OCR1BH0_REG OCR1BH |
| #define | OCR1BH1_REG OCR1BH |
| #define | OCR1BH2_REG OCR1BH |
| #define | OCR1BH3_REG OCR1BH |
| #define | OCR1BH4_REG OCR1BH |
| #define | OCR1BH5_REG OCR1BH |
| #define | OCR1BH6_REG OCR1BH |
| #define | OCR1BH7_REG OCR1BH |
| #define | SP0_REG SPL |
| #define | SP1_REG SPL |
| #define | SP2_REG SPL |
| #define | SP3_REG SPL |
| #define | SP4_REG SPL |
| #define | SP5_REG SPL |
| #define | SP6_REG SPL |
| #define | SP7_REG SPL |
| #define | PORF_REG MCUSR |
| #define | EXTRF_REG MCUSR |
| #define | BORF_REG MCUSR |
| #define | WDRF_REG MCUSR |
| #define | EERE_REG EECR |
| #define | EEWE_REG EECR |
| #define | EEMWE_REG EECR |
| #define | EERIE_REG EECR |
| #define | EEPM0_REG EECR |
| #define | EEPM1_REG EECR |
| #define | LENRXOK_REG LINENIR |
| #define | LENTXOK_REG LINENIR |
| #define | LENIDOK_REG LINENIR |
| #define | LENERR_REG LINENIR |
| #define | SE_REG SMCR |
| #define | SM0_REG SMCR |
| #define | SM1_REG SMCR |
| #define | SM2_REG SMCR |
| #define | DAEN_REG DACON |
| #define | DALA_REG DACON |
| #define | DATS0_REG DACON |
| #define | DATS1_REG DACON |
| #define | DATS2_REG DACON |
| #define | DAATE_REG DACON |
| #define | PCIF0_REG PCIFR |
| #define | PCIF1_REG PCIFR |
| #define | PCIF2_REG PCIFR |
| #define | PCIF3_REG PCIFR |
| #define | AMP2TS0_REG AMP2CSR |
| #define | AMP2TS1_REG AMP2CSR |
| #define | AMP2TS2_REG AMP2CSR |
| #define | AMPCMP2_REG AMP2CSR |
| #define | AMP2G0_REG AMP2CSR |
| #define | AMP2G1_REG AMP2CSR |
| #define | AMP2IS_REG AMP2CSR |
| #define | AMP2EN_REG AMP2CSR |
| #define | LDATA0_REG LINDAT |
| #define | LDATA1_REG LINDAT |
| #define | LDATA2_REG LINDAT |
| #define | LDATA3_REG LINDAT |
| #define | LDATA4_REG LINDAT |
| #define | LDATA5_REG LINDAT |
| #define | LDATA6_REG LINDAT |
| #define | LDATA7_REG LINDAT |
| #define | EEAR8_REG EEARH |
| #define | EEAR9_REG EEARH |
| #define | INDX0_REG CANPAGE |
| #define | INDX1_REG CANPAGE |
| #define | INDX2_REG CANPAGE |
| #define | AINC_REG CANPAGE |
| #define | MOBNB0_REG CANPAGE |
| #define | MOBNB1_REG CANPAGE |
| #define | MOBNB2_REG CANPAGE |
| #define | MOBNB3_REG CANPAGE |
| #define | LRXDL0_REG LINDLR |
| #define | LRXDL1_REG LINDLR |
| #define | LRXDL2_REG LINDLR |
| #define | LRXDL3_REG LINDLR |
| #define | LTXDL0_REG LINDLR |
| #define | LTXDL1_REG LINDLR |
| #define | LTXDL2_REG LINDLR |
| #define | LTXDL3_REG LINDLR |
| #define | IVCE_REG MCUCR |
| #define | IVSEL_REG MCUCR |
| #define | PUD_REG MCUCR |
| #define | SPIPS_REG MCUCR |
| #define | INTF0_REG EIFR |
| #define | INTF1_REG EIFR |
| #define | INTF2_REG EIFR |
| #define | INTF3_REG EIFR |
| #define | AERR_REG CANSTMOB |
| #define | FERR_REG CANSTMOB |
| #define | CERR_REG CANSTMOB |
| #define | SERR_REG CANSTMOB |
| #define | BERR_REG CANSTMOB |
| #define | RXOK_REG CANSTMOB |
| #define | TXOK_REG CANSTMOB |
| #define | DLCW_REG CANSTMOB |
| #define | DACH0_REG DACH |
| #define | DACH1_REG DACH |
| #define | DACH2_REG DACH |
| #define | DACH3_REG DACH |
| #define | DACH4_REG DACH |
| #define | DACH5_REG DACH |
| #define | DACH6_REG DACH |
| #define | DACH7_REG DACH |
| #define | ADPS0_REG ADCSRA |
| #define | ADPS1_REG ADCSRA |
| #define | ADPS2_REG ADCSRA |
| #define | ADIE_REG ADCSRA |
| #define | ADIF_REG ADCSRA |
| #define | ADATE_REG ADCSRA |
| #define | ADSC_REG ADCSRA |
| #define | ADEN_REG ADCSRA |
| #define | ENMOB0_REG CANEN2 |
| #define | ENMOB1_REG CANEN2 |
| #define | ENMOB2_REG CANEN2 |
| #define | ENMOB3_REG CANEN2 |
| #define | ENMOB4_REG CANEN2 |
| #define | ENMOB5_REG CANEN2 |
| #define | ADTS0_REG ADCSRB |
| #define | ADTS1_REG ADCSRB |
| #define | ADTS2_REG ADCSRB |
| #define | ADTS3_REG ADCSRB |
| #define | AREFEN_REG ADCSRB |
| #define | ISRCEN_REG ADCSRB |
| #define | ADHSM_REG ADCSRB |
| #define | TCNT1L0_REG TCNT1L |
| #define | TCNT1L1_REG TCNT1L |
| #define | TCNT1L2_REG TCNT1L |
| #define | TCNT1L3_REG TCNT1L |
| #define | TCNT1L4_REG TCNT1L |
| #define | TCNT1L5_REG TCNT1L |
| #define | TCNT1L6_REG TCNT1L |
| #define | TCNT1L7_REG TCNT1L |
| #define | DDD0_REG DDRD |
| #define | DDD1_REG DDRD |
| #define | DDD2_REG DDRD |
| #define | DDD3_REG DDRD |
| #define | DDD4_REG DDRD |
| #define | DDD5_REG DDRD |
| #define | DDD6_REG DDRD |
| #define | DDD7_REG DDRD |
| #define | DDE0_REG DDRE |
| #define | DDE1_REG DDRE |
| #define | DDE2_REG DDRE |
| #define | SPMEN_REG SPMCSR |
| #define | PGERS_REG SPMCSR |
| #define | PGWRT_REG SPMCSR |
| #define | BLBSET_REG SPMCSR |
| #define | RWWSRE_REG SPMCSR |
| #define | SIGRD_REG SPMCSR |
| #define | RWWSB_REG SPMCSR |
| #define | SPMIE_REG SPMCSR |
| #define | PRS0_REG CANBT2 |
| #define | PRS1_REG CANBT2 |
| #define | PRS2_REG CANBT2 |
| #define | SJW0_REG CANBT2 |
| #define | SJW1_REG CANBT2 |
| #define | SMP_REG CANBT3 |
| #define | PHS10_REG CANBT3 |
| #define | PHS11_REG CANBT3 |
| #define | PHS12_REG CANBT3 |
| #define | PHS20_REG CANBT3 |
| #define | PHS21_REG CANBT3 |
| #define | PHS22_REG CANBT3 |
| #define | ADCL0_REG ADCL |
| #define | ADCL1_REG ADCL |
| #define | ADCL2_REG ADCL |
| #define | ADCL3_REG ADCL |
| #define | ADCL4_REG ADCL |
| #define | ADCL5_REG ADCL |
| #define | ADCL6_REG ADCL |
| #define | ADCL7_REG ADCL |
| #define | BRP0_REG CANBT1 |
| #define | BRP1_REG CANBT1 |
| #define | BRP2_REG CANBT1 |
| #define | BRP3_REG CANBT1 |
| #define | BRP4_REG CANBT1 |
| #define | BRP5_REG CANBT1 |
| #define | ADCH0_REG ADCH |
| #define | ADCH1_REG ADCH |
| #define | ADCH2_REG ADCH |
| #define | ADCH3_REG ADCH |
| #define | ADCH4_REG ADCH |
| #define | ADCH5_REG ADCH |
| #define | ADCH6_REG ADCH |
| #define | ADCH7_REG ADCH |
| #define | DACL0_REG DACL |
| #define | DACL1_REG DACL |
| #define | DACL2_REG DACL |
| #define | DACL3_REG DACL |
| #define | DACL4_REG DACL |
| #define | DACL5_REG DACL |
| #define | DACL6_REG DACL |
| #define | DACL7_REG DACL |
| #define | TOIE0_REG TIMSK0 |
| #define | OCIE0A_REG TIMSK0 |
| #define | OCIE0B_REG TIMSK0 |
| #define | TOIE1_REG TIMSK1 |
| #define | OCIE1A_REG TIMSK1 |
| #define | OCIE1B_REG TIMSK1 |
| #define | ICIE1_REG TIMSK1 |
| #define | AMP0TS0_REG AMP0CSR |
| #define | AMP0TS1_REG AMP0CSR |
| #define | AMP0TS2_REG AMP0CSR |
| #define | AMPCMP0_REG AMP0CSR |
| #define | AMP0G0_REG AMP0CSR |
| #define | AMP0G1_REG AMP0CSR |
| #define | AMP0IS_REG AMP0CSR |
| #define | AMP0EN_REG AMP0CSR |
| #define | PLOCK_REG PLLCSR |
| #define | PLLE_REG PLLCSR |
| #define | PLLF_REG PLLCSR |
| #define | PCINT0_REG PCMSK0 |
| #define | PCINT1_REG PCMSK0 |
| #define | PCINT2_REG PCMSK0 |
| #define | PCINT3_REG PCMSK0 |
| #define | PCINT4_REG PCMSK0 |
| #define | PCINT5_REG PCMSK0 |
| #define | PCINT6_REG PCMSK0 |
| #define | PCINT7_REG PCMSK0 |
| #define | PCINT8_REG PCMSK1 |
| #define | PCINT9_REG PCMSK1 |
| #define | PCINT10_REG PCMSK1 |
| #define | PCINT11_REG PCMSK1 |
| #define | PCINT12_REG PCMSK1 |
| #define | PCINT13_REG PCMSK1 |
| #define | PCINT14_REG PCMSK1 |
| #define | PCINT15_REG PCMSK1 |
| #define | PCINT16_REG PCMSK2 |
| #define | PCINT17_REG PCMSK2 |
| #define | PCINT18_REG PCMSK2 |
| #define | PCINT19_REG PCMSK2 |
| #define | PCINT20_REG PCMSK2 |
| #define | PCINT21_REG PCMSK2 |
| #define | PCINT22_REG PCMSK2 |
| #define | PCINT23_REG PCMSK2 |
| #define | PCINT24_REG PCMSK3 |
| #define | PCINT25_REG PCMSK3 |
| #define | PCINT26_REG PCMSK3 |
| #define | PINC0_REG PINC |
| #define | PINC1_REG PINC |
| #define | PINC2_REG PINC |
| #define | PINC3_REG PINC |
| #define | PINC4_REG PINC |
| #define | PINC5_REG PINC |
| #define | PINC6_REG PINC |
| #define | PINC7_REG PINC |
| #define | PINB0_REG PINB |
| #define | PINB1_REG PINB |
| #define | PINB2_REG PINB |
| #define | PINB3_REG PINB |
| #define | PINB4_REG PINB |
| #define | PINB5_REG PINB |
| #define | PINB6_REG PINB |
| #define | PINB7_REG PINB |
| #define | AC0M0_REG AC0CON |
| #define | AC0M1_REG AC0CON |
| #define | AC0M2_REG AC0CON |
| #define | ACCKSEL_REG AC0CON |
| #define | AC0IS0_REG AC0CON |
| #define | AC0IS1_REG AC0CON |
| #define | AC0IE_REG AC0CON |
| #define | AC0EN_REG AC0CON |
| #define | PINE0_REG PINE |
| #define | PINE1_REG PINE |
| #define | PINE2_REG PINE |
| #define | PIND0_REG PIND |
| #define | PIND1_REG PIND |
| #define | PIND2_REG PIND |
| #define | PIND3_REG PIND |
| #define | PIND4_REG PIND |
| #define | PIND5_REG PIND |
| #define | PIND6_REG PIND |
| #define | PIND7_REG PIND |
| #define | OCR1AH0_REG OCR1AH |
| #define | OCR1AH1_REG OCR1AH |
| #define | OCR1AH2_REG OCR1AH |
| #define | OCR1AH3_REG OCR1AH |
| #define | OCR1AH4_REG OCR1AH |
| #define | OCR1AH5_REG OCR1AH |
| #define | OCR1AH6_REG OCR1AH |
| #define | OCR1AH7_REG OCR1AH |
| #define | OCR1AL0_REG OCR1AL |
| #define | OCR1AL1_REG OCR1AL |
| #define | OCR1AL2_REG OCR1AL |
| #define | OCR1AL3_REG OCR1AL |
| #define | OCR1AL4_REG OCR1AL |
| #define | OCR1AL5_REG OCR1AL |
| #define | OCR1AL6_REG OCR1AL |
| #define | OCR1AL7_REG OCR1AL |
| #define | TOV0_REG TIFR0 |
| #define | OCF0A_REG TIFR0 |
| #define | OCF0B_REG TIFR0 |
| #define | MISO_PORT PORTB |
| #define | MISO_BIT 0 |
| #define | PCINT0_PORT PORTB |
| #define | PCINT0_BIT 0 |
| #define | MOSI_PORT PORTB |
| #define | MOSI_BIT 1 |
| #define | PCINT1_PORT PORTB |
| #define | PCINT1_BIT 1 |
| #define | ADC5_PORT PORTB |
| #define | ADC5_BIT 2 |
| #define | INT1_PORT PORTB |
| #define | INT1_BIT 2 |
| #define | ACMPN0_PORT PORTB |
| #define | ACMPN0_BIT 2 |
| #define | PCINT2_PORT PORTB |
| #define | PCINT2_BIT 2 |
| #define | AMP0 -_PORT PORTB |
| #define | AMP0 -_BIT 3 |
| #define | PCINT3_PORT PORTB |
| #define | PCINT3_BIT 3 |
| #define | AMP0 +_PORT PORTB |
| #define | AMP0 +_BIT 4 |
| #define | PCINT4_PORT PORTB |
| #define | PCINT4_BIT 4 |
| #define | ADC6_PORT PORTB |
| #define | ADC6_BIT 5 |
| #define | INT2_PORT PORTB |
| #define | INT2_BIT 5 |
| #define | ACMPN1_PORT PORTB |
| #define | ACMPN1_BIT 5 |
| #define | AMP2 -_PORT PORTB |
| #define | AMP2 -_BIT 5 |
| #define | PCINT5_PORT PORTB |
| #define | PCINT5_BIT 5 |
| #define | ADC7_PORT PORTB |
| #define | ADC7_BIT 6 |
| #define | PCINT6_PORT PORTB |
| #define | PCINT6_BIT 6 |
| #define | ADC4_PORT PORTB |
| #define | ADC4_BIT 7 |
| #define | SCK_PORT PORTB |
| #define | SCK_BIT 7 |
| #define | PCINT7_PORT PORTB |
| #define | PCINT7_BIT 7 |
| #define | INT3_PORT PORTC |
| #define | INT3_BIT 0 |
| #define | PCINT8_PORT PORTC |
| #define | PCINT8_BIT 0 |
| #define | OC1B_PORT PORTC |
| #define | OC1B_BIT 1 |
| #define | SS_A_PORT PORTC |
| #define | SS_A_BIT 1 |
| #define | PCINT9_PORT PORTC |
| #define | PCINT9_BIT 1 |
| #define | T0_PORT PORTC |
| #define | T0_BIT 2 |
| #define | TXCAN_PORT PORTC |
| #define | TXCAN_BIT 2 |
| #define | PCINT10_PORT PORTC |
| #define | PCINT10_BIT 2 |
| #define | T1_PORT PORTC |
| #define | T1_BIT 3 |
| #define | RXCAN_PORT PORTC |
| #define | RXCAN_BIT 3 |
| #define | ICP1B_PORT PORTC |
| #define | ICP1B_BIT 3 |
| #define | PCINT11_PORT PORTC |
| #define | PCINT11_BIT 3 |
| #define | ADC8_PORT PORTC |
| #define | ADC8_BIT 4 |
| #define | AMP1 -_PORT PORTC |
| #define | AMP1 -_BIT 4 |
| #define | ACMPN3_PORT PORTC |
| #define | ACMPN3_BIT 4 |
| #define | PCINT12_PORT PORTC |
| #define | PCINT12_BIT 4 |
| #define | ADC9_PORT PORTC |
| #define | ADC9_BIT 5 |
| #define | AMP1 +_PORT PORTC |
| #define | AMP1 +_BIT 5 |
| #define | ACMP3_PORT PORTC |
| #define | ACMP3_BIT 5 |
| #define | PCINT13_PORT PORTC |
| #define | PCINT13_BIT 5 |
| #define | ADC10_PORT PORTC |
| #define | ADC10_BIT 6 |
| #define | ACMP1_PORT PORTC |
| #define | ACMP1_BIT 6 |
| #define | PCINT14_PORT PORTC |
| #define | PCINT14_BIT 6 |
| #define | D2A_PORT PORTC |
| #define | D2A_BIT 7 |
| #define | AMP2 +_PORT PORTC |
| #define | AMP2 +_BIT 7 |
| #define | PCINT15_PORT PORTC |
| #define | PCINT15_BIT 7 |
| #define | PCINT16_PORT PORTD |
| #define | PCINT16_BIT 0 |
| #define | CLK0_PORT PORTD |
| #define | CLK0_BIT 1 |
| #define | PCINT17_PORT PORTD |
| #define | PCINT17_BIT 1 |
| #define | OC1A_PORT PORTD |
| #define | OC1A_BIT 2 |
| #define | MISO_A_PORT PORTD |
| #define | MISO_A_BIT 2 |
| #define | PCINT18_PORT PORTD |
| #define | PCINT18_BIT 2 |
| #define | TXD_PORT PORTD |
| #define | TXD_BIT 3 |
| #define | TXLIN_PORT PORTD |
| #define | TXLIN_BIT 3 |
| #define | OC0A_PORT PORTD |
| #define | OC0A_BIT 3 |
| #define | SS_PORT PORTD |
| #define | SS_BIT 3 |
| #define | MOSI_A_PORT PORTD |
| #define | MOSI_A_BIT 3 |
| #define | PCINT19_PORT PORTD |
| #define | PCINT19_BIT 3 |
| #define | ADC1_PORT PORTD |
| #define | ADC1_BIT 4 |
| #define | RXD_PORT PORTD |
| #define | RXD_BIT 4 |
| #define | RXLIN_PORT PORTD |
| #define | RXLIN_BIT 4 |
| #define | ICP1A_PORT PORTD |
| #define | ICP1A_BIT 4 |
| #define | SCK_A_PORT PORTD |
| #define | SCK_A_BIT 4 |
| #define | PCINT20_PORT PORTD |
| #define | PCINT20_BIT 4 |
| #define | ADC2_PORT PORTD |
| #define | ADC2_BIT 5 |
| #define | ACMP2_PORT PORTD |
| #define | ACMP2_BIT 5 |
| #define | PCINT21_PORT PORTD |
| #define | PCINT21_BIT 5 |
| #define | ADC3_PORT PORTD |
| #define | ADC3_BIT 6 |
| #define | ACMPN2_PORT PORTD |
| #define | ACMPN2_BIT 6 |
| #define | INT0_PORT PORTD |
| #define | INT0_BIT 6 |
| #define | PCINT22_PORT PORTD |
| #define | PCINT22_BIT 6 |
| #define | ACMP0_PORT PORTD |
| #define | ACMP0_BIT 7 |
| #define | PCINT23_PORT PORTD |
| #define | PCINT23_BIT 7 |
| #define | RESET_PORT PORTE |
| #define | RESET_BIT 0 |
| #define | OCD_PORT PORTE |
| #define | OCD_BIT 0 |
| #define | PCINT24_PORT PORTE |
| #define | PCINT24_BIT 0 |
| #define | OC0B_PORT PORTE |
| #define | OC0B_BIT 1 |
| #define | XTAL1_PORT PORTE |
| #define | XTAL1_BIT 1 |
| #define | PCINT25_PORT PORTE |
| #define | PCINT25_BIT 1 |
| #define | ADC0_PORT PORTE |
| #define | ADC0_BIT 2 |
| #define | XTAL2_PORT PORTE |
| #define | XTAL2_BIT 2 |
| #define | PCINT26_PORT PORTE |
| #define | PCINT26_BIT 2 |
| #define ABRQ_REG CANGCON |
Definition at line 269 of file ATmega32C1.h.
| #define AC0EN_REG AC0CON |
Definition at line 1066 of file ATmega32C1.h.
| #define AC0IE_REG AC0CON |
Definition at line 1065 of file ATmega32C1.h.
| #define AC0IF_REG ACSR |
Definition at line 162 of file ATmega32C1.h.
| #define AC0IS0_REG AC0CON |
Definition at line 1063 of file ATmega32C1.h.
| #define AC0IS1_REG AC0CON |
Definition at line 1064 of file ATmega32C1.h.
| #define AC0M0_REG AC0CON |
Definition at line 1059 of file ATmega32C1.h.
| #define AC0M1_REG AC0CON |
Definition at line 1060 of file ATmega32C1.h.
| #define AC0M2_REG AC0CON |
Definition at line 1061 of file ATmega32C1.h.
| #define AC0O_REG ACSR |
Definition at line 158 of file ATmega32C1.h.
| #define AC1EN_REG AC1CON |
Definition at line 226 of file ATmega32C1.h.
| #define AC1ICE_REG AC1CON |
Definition at line 222 of file ATmega32C1.h.
| #define AC1IE_REG AC1CON |
Definition at line 225 of file ATmega32C1.h.
| #define AC1IF_REG ACSR |
Definition at line 163 of file ATmega32C1.h.
| #define AC1IS0_REG AC1CON |
Definition at line 223 of file ATmega32C1.h.
| #define AC1IS1_REG AC1CON |
Definition at line 224 of file ATmega32C1.h.
| #define AC1M0_REG AC1CON |
Definition at line 219 of file ATmega32C1.h.
| #define AC1M1_REG AC1CON |
Definition at line 220 of file ATmega32C1.h.
| #define AC1M2_REG AC1CON |
Definition at line 221 of file ATmega32C1.h.
| #define AC1O_REG ACSR |
Definition at line 159 of file ATmega32C1.h.
| #define AC2EN_REG AC2CON |
Definition at line 323 of file ATmega32C1.h.
| #define AC2IE_REG AC2CON |
Definition at line 322 of file ATmega32C1.h.
| #define AC2IF_REG ACSR |
Definition at line 164 of file ATmega32C1.h.
| #define AC2IS0_REG AC2CON |
Definition at line 320 of file ATmega32C1.h.
| #define AC2IS1_REG AC2CON |
Definition at line 321 of file ATmega32C1.h.
| #define AC2M0_REG AC2CON |
Definition at line 317 of file ATmega32C1.h.
| #define AC2M1_REG AC2CON |
Definition at line 318 of file ATmega32C1.h.
| #define AC2M2_REG AC2CON |
Definition at line 319 of file ATmega32C1.h.
| #define AC2O_REG ACSR |
Definition at line 160 of file ATmega32C1.h.
| #define AC3EN_REG AC3CON |
Definition at line 533 of file ATmega32C1.h.
| #define AC3IE_REG AC3CON |
Definition at line 532 of file ATmega32C1.h.
| #define AC3IF_REG ACSR |
Definition at line 165 of file ATmega32C1.h.
| #define AC3IS0_REG AC3CON |
Definition at line 530 of file ATmega32C1.h.
| #define AC3IS1_REG AC3CON |
Definition at line 531 of file ATmega32C1.h.
| #define AC3M0_REG AC3CON |
Definition at line 527 of file ATmega32C1.h.
| #define AC3M1_REG AC3CON |
Definition at line 528 of file ATmega32C1.h.
| #define AC3M2_REG AC3CON |
Definition at line 529 of file ATmega32C1.h.
| #define AC3O_REG ACSR |
Definition at line 161 of file ATmega32C1.h.
| #define ACCKSEL_REG AC0CON |
Definition at line 1062 of file ATmega32C1.h.
| #define ACMP0_BIT 7 |
Definition at line 1279 of file ATmega32C1.h.
| #define ACMP0_PORT PORTD |
Definition at line 1278 of file ATmega32C1.h.
| #define ACMP0D_REG DIDR1 |
Definition at line 377 of file ATmega32C1.h.
| #define ACMP1_BIT 6 |
Definition at line 1210 of file ATmega32C1.h.
| #define ACMP1_PORT PORTC |
Definition at line 1209 of file ATmega32C1.h.
| #define ACMP2_BIT 5 |
Definition at line 1265 of file ATmega32C1.h.
| #define ACMP2_PORT PORTD |
Definition at line 1264 of file ATmega32C1.h.
| #define ACMP3_BIT 5 |
Definition at line 1203 of file ATmega32C1.h.
| #define ACMP3_PORT PORTC |
Definition at line 1202 of file ATmega32C1.h.
| #define ACMPN0_BIT 2 |
Definition at line 1124 of file ATmega32C1.h.
| #define ACMPN0_PORT PORTB |
Definition at line 1123 of file ATmega32C1.h.
| #define ACMPN1_BIT 5 |
Definition at line 1143 of file ATmega32C1.h.
| #define ACMPN1_PORT PORTB |
Definition at line 1142 of file ATmega32C1.h.
| #define ACMPN2_BIT 6 |
Definition at line 1272 of file ATmega32C1.h.
| #define ACMPN2_PORT PORTD |
Definition at line 1271 of file ATmega32C1.h.
| #define ACMPN3_BIT 4 |
Definition at line 1194 of file ATmega32C1.h.
| #define ACMPN3_PORT PORTC |
Definition at line 1193 of file ATmega32C1.h.
| #define ADATE_REG ADCSRA |
Definition at line 847 of file ATmega32C1.h.
| #define ADC0_BIT 2 |
Definition at line 1298 of file ATmega32C1.h.
| #define ADC0_PORT PORTE |
Definition at line 1297 of file ATmega32C1.h.
| #define ADC0D_REG DIDR0 |
Definition at line 362 of file ATmega32C1.h.
| #define ADC10_BIT 6 |
Definition at line 1208 of file ATmega32C1.h.
| #define ADC10_PORT PORTC |
Definition at line 1207 of file ATmega32C1.h.
| #define ADC10D_REG DIDR1 |
Definition at line 374 of file ATmega32C1.h.
| #define ADC1_BIT 4 |
Definition at line 1250 of file ATmega32C1.h.
| #define ADC1_PORT PORTD |
Definition at line 1249 of file ATmega32C1.h.
| #define ADC1D_REG DIDR0 |
Definition at line 363 of file ATmega32C1.h.
| #define ADC2_BIT 5 |
Definition at line 1263 of file ATmega32C1.h.
| #define ADC2_PORT PORTD |
Definition at line 1262 of file ATmega32C1.h.
| #define ADC2D_REG DIDR0 |
Definition at line 364 of file ATmega32C1.h.
| #define ADC3_BIT 6 |
Definition at line 1270 of file ATmega32C1.h.
| #define ADC3_PORT PORTD |
Definition at line 1269 of file ATmega32C1.h.
| #define ADC3D_REG DIDR0 |
Definition at line 365 of file ATmega32C1.h.
| #define ADC4_BIT 7 |
Definition at line 1155 of file ATmega32C1.h.
| #define ADC4_PORT PORTB |
Definition at line 1154 of file ATmega32C1.h.
| #define ADC4D_REG DIDR0 |
Definition at line 366 of file ATmega32C1.h.
| #define ADC5_BIT 2 |
Definition at line 1120 of file ATmega32C1.h.
| #define ADC5_PORT PORTB |
Definition at line 1119 of file ATmega32C1.h.
| #define ADC5D_REG DIDR0 |
Definition at line 367 of file ATmega32C1.h.
| #define ADC6_BIT 5 |
Definition at line 1139 of file ATmega32C1.h.
| #define ADC6_PORT PORTB |
Definition at line 1138 of file ATmega32C1.h.
| #define ADC6D_REG DIDR0 |
Definition at line 368 of file ATmega32C1.h.
| #define ADC7_BIT 6 |
Definition at line 1150 of file ATmega32C1.h.
| #define ADC7_PORT PORTB |
Definition at line 1149 of file ATmega32C1.h.
| #define ADC7D_REG DIDR0 |
Definition at line 369 of file ATmega32C1.h.
| #define ADC8_BIT 4 |
Definition at line 1190 of file ATmega32C1.h.
| #define ADC8_PORT PORTC |
Definition at line 1189 of file ATmega32C1.h.
| #define ADC8D_REG DIDR1 |
Definition at line 372 of file ATmega32C1.h.
| #define ADC9_BIT 5 |
Definition at line 1199 of file ATmega32C1.h.
| #define ADC9_PORT PORTC |
Definition at line 1198 of file ATmega32C1.h.
| #define ADC9D_REG DIDR1 |
Definition at line 373 of file ATmega32C1.h.
| #define ADCH0_REG ADCH |
Definition at line 958 of file ATmega32C1.h.
| #define ADCH1_REG ADCH |
Definition at line 959 of file ATmega32C1.h.
| #define ADCH2_REG ADCH |
Definition at line 960 of file ATmega32C1.h.
| #define ADCH3_REG ADCH |
Definition at line 961 of file ATmega32C1.h.
| #define ADCH4_REG ADCH |
Definition at line 962 of file ATmega32C1.h.
| #define ADCH5_REG ADCH |
Definition at line 963 of file ATmega32C1.h.
| #define ADCH6_REG ADCH |
Definition at line 964 of file ATmega32C1.h.
| #define ADCH7_REG ADCH |
Definition at line 965 of file ATmega32C1.h.
| #define ADCL0_REG ADCL |
Definition at line 940 of file ATmega32C1.h.
| #define ADCL1_REG ADCL |
Definition at line 941 of file ATmega32C1.h.
| #define ADCL2_REG ADCL |
Definition at line 942 of file ATmega32C1.h.
| #define ADCL3_REG ADCL |
Definition at line 943 of file ATmega32C1.h.
| #define ADCL4_REG ADCL |
Definition at line 944 of file ATmega32C1.h.
| #define ADCL5_REG ADCL |
Definition at line 945 of file ATmega32C1.h.
| #define ADCL6_REG ADCL |
Definition at line 946 of file ATmega32C1.h.
| #define ADCL7_REG ADCL |
Definition at line 947 of file ATmega32C1.h.
| #define ADEN_REG ADCSRA |
Definition at line 849 of file ATmega32C1.h.
| #define ADHSM_REG ADCSRB |
Definition at line 866 of file ATmega32C1.h.
| #define ADIE_REG ADCSRA |
Definition at line 845 of file ATmega32C1.h.
| #define ADIF_REG ADCSRA |
Definition at line 846 of file ATmega32C1.h.
| #define ADLAR_REG ADMUX |
Definition at line 123 of file ATmega32C1.h.
| #define ADPS0_REG ADCSRA |
Definition at line 842 of file ATmega32C1.h.
| #define ADPS1_REG ADCSRA |
Definition at line 843 of file ATmega32C1.h.
| #define ADPS2_REG ADCSRA |
Definition at line 844 of file ATmega32C1.h.
| #define ADSC_REG ADCSRA |
Definition at line 848 of file ATmega32C1.h.
| #define ADTS0_REG ADCSRB |
Definition at line 860 of file ATmega32C1.h.
| #define ADTS1_REG ADCSRB |
Definition at line 861 of file ATmega32C1.h.
| #define ADTS2_REG ADCSRB |
Definition at line 862 of file ATmega32C1.h.
| #define ADTS3_REG ADCSRB |
Definition at line 863 of file ATmega32C1.h.
| #define AERG_REG CANGIT |
Definition at line 517 of file ATmega32C1.h.
| #define AERR_REG CANSTMOB |
Definition at line 822 of file ATmega32C1.h.
| #define AINC_REG CANPAGE |
Definition at line 793 of file ATmega32C1.h.
| #define AMP0 +_BIT 4 |
Definition at line 1134 of file ATmega32C1.h.
| #define AMP0 +_PORT PORTB |
Definition at line 1134 of file ATmega32C1.h.
| #define AMP0 -_BIT 3 |
Definition at line 1134 of file ATmega32C1.h.
| #define AMP0 -_PORT PORTB |
Definition at line 1134 of file ATmega32C1.h.
| #define AMP0EN_REG AMP0CSR |
Definition at line 996 of file ATmega32C1.h.
| #define AMP0G0_REG AMP0CSR |
Definition at line 993 of file ATmega32C1.h.
| #define AMP0G1_REG AMP0CSR |
Definition at line 994 of file ATmega32C1.h.
| #define AMP0IS_REG AMP0CSR |
Definition at line 995 of file ATmega32C1.h.
| #define AMP0ND_REG DIDR1 |
Definition at line 375 of file ATmega32C1.h.
| #define AMP0PD_REG DIDR1 |
Definition at line 376 of file ATmega32C1.h.
| #define AMP0TS0_REG AMP0CSR |
Definition at line 989 of file ATmega32C1.h.
| #define AMP0TS1_REG AMP0CSR |
Definition at line 990 of file ATmega32C1.h.
| #define AMP0TS2_REG AMP0CSR |
Definition at line 991 of file ATmega32C1.h.
| #define AMP1 +_BIT 5 |
Definition at line 1201 of file ATmega32C1.h.
| #define AMP1 +_PORT PORTC |
Definition at line 1201 of file ATmega32C1.h.
| #define AMP1 -_BIT 4 |
Definition at line 1201 of file ATmega32C1.h.
| #define AMP1 -_PORT PORTC |
Definition at line 1201 of file ATmega32C1.h.
| #define AMP1EN_REG AMP1CSR |
Definition at line 314 of file ATmega32C1.h.
| #define AMP1G0_REG AMP1CSR |
Definition at line 311 of file ATmega32C1.h.
| #define AMP1G1_REG AMP1CSR |
Definition at line 312 of file ATmega32C1.h.
| #define AMP1IS_REG AMP1CSR |
Definition at line 313 of file ATmega32C1.h.
| #define AMP1TS0_REG AMP1CSR |
Definition at line 307 of file ATmega32C1.h.
| #define AMP1TS1_REG AMP1CSR |
Definition at line 308 of file ATmega32C1.h.
| #define AMP1TS2_REG AMP1CSR |
Definition at line 309 of file ATmega32C1.h.
| #define AMP2 +_BIT 7 |
Definition at line 1217 of file ATmega32C1.h.
| #define AMP2 +_PORT PORTC |
Definition at line 1217 of file ATmega32C1.h.
| #define AMP2 -_BIT 5 |
Definition at line 1217 of file ATmega32C1.h.
| #define AMP2 -_PORT PORTB |
Definition at line 1217 of file ATmega32C1.h.
| #define AMP2EN_REG AMP2CSR |
Definition at line 773 of file ATmega32C1.h.
| #define AMP2G0_REG AMP2CSR |
Definition at line 770 of file ATmega32C1.h.
| #define AMP2G1_REG AMP2CSR |
Definition at line 771 of file ATmega32C1.h.
| #define AMP2IS_REG AMP2CSR |
Definition at line 772 of file ATmega32C1.h.
| #define AMP2PD_REG DIDR1 |
Definition at line 378 of file ATmega32C1.h.
| #define AMP2TS0_REG AMP2CSR |
Definition at line 766 of file ATmega32C1.h.
| #define AMP2TS1_REG AMP2CSR |
Definition at line 767 of file ATmega32C1.h.
| #define AMP2TS2_REG AMP2CSR |
Definition at line 768 of file ATmega32C1.h.
| #define AMPCMP0_REG AMP0CSR |
Definition at line 992 of file ATmega32C1.h.
| #define AMPCMP1_REG AMP1CSR |
Definition at line 310 of file ATmega32C1.h.
| #define AMPCMP2_REG AMP2CSR |
Definition at line 769 of file ATmega32C1.h.
| #define AREFEN_REG ADCSRB |
Definition at line 864 of file ATmega32C1.h.
| #define BERR_REG CANSTMOB |
Definition at line 826 of file ATmega32C1.h.
| #define BLBSET_REG SPMCSR |
Definition at line 917 of file ATmega32C1.h.
| #define BOFF_REG CANGSTA |
Definition at line 255 of file ATmega32C1.h.
| #define BOFFIT_REG CANGIT |
Definition at line 523 of file ATmega32C1.h.
| #define BORF_REG MCUSR |
Definition at line 728 of file ATmega32C1.h.
| #define BRP0_REG CANBT1 |
Definition at line 950 of file ATmega32C1.h.
| #define BRP1_REG CANBT1 |
Definition at line 951 of file ATmega32C1.h.
| #define BRP2_REG CANBT1 |
Definition at line 952 of file ATmega32C1.h.
| #define BRP3_REG CANBT1 |
Definition at line 953 of file ATmega32C1.h.
| #define BRP4_REG CANBT1 |
Definition at line 954 of file ATmega32C1.h.
| #define BRP5_REG CANBT1 |
Definition at line 955 of file ATmega32C1.h.
| #define BXOK_REG CANGIT |
Definition at line 521 of file ATmega32C1.h.
| #define C_REG SREG |
Definition at line 388 of file ATmega32C1.h.
| #define CAL0_REG OSCCAL |
Definition at line 478 of file ATmega32C1.h.
| #define CAL1_REG OSCCAL |
Definition at line 479 of file ATmega32C1.h.
| #define CAL2_REG OSCCAL |
Definition at line 480 of file ATmega32C1.h.
| #define CAL3_REG OSCCAL |
Definition at line 481 of file ATmega32C1.h.
| #define CAL4_REG OSCCAL |
Definition at line 482 of file ATmega32C1.h.
| #define CAL5_REG OSCCAL |
Definition at line 483 of file ATmega32C1.h.
| #define CAL6_REG OSCCAL |
Definition at line 484 of file ATmega32C1.h.
| #define CANIT_REG CANGIT |
Definition at line 524 of file ATmega32C1.h.
| #define CERG_REG CANGIT |
Definition at line 519 of file ATmega32C1.h.
| #define CERR_REG CANSTMOB |
Definition at line 824 of file ATmega32C1.h.
| #define CGP0_REG CANHPMOB |
Definition at line 686 of file ATmega32C1.h.
| #define CGP1_REG CANHPMOB |
Definition at line 687 of file ATmega32C1.h.
| #define CGP2_REG CANHPMOB |
Definition at line 688 of file ATmega32C1.h.
| #define CGP3_REG CANHPMOB |
Definition at line 689 of file ATmega32C1.h.
| #define CLK0_BIT 1 |
Definition at line 1225 of file ATmega32C1.h.
| #define CLK0_PORT PORTD |
Definition at line 1224 of file ATmega32C1.h.
| #define CLKPCE_REG CLKPR |
Definition at line 385 of file ATmega32C1.h.
| #define CLKPS0_REG CLKPR |
Definition at line 381 of file ATmega32C1.h.
| #define CLKPS1_REG CLKPR |
Definition at line 382 of file ATmega32C1.h.
| #define CLKPS2_REG CLKPR |
Definition at line 383 of file ATmega32C1.h.
| #define CLKPS3_REG CLKPR |
Definition at line 384 of file ATmega32C1.h.
| #define COM0A0_REG TCCR0A |
Definition at line 600 of file ATmega32C1.h.
| #define COM0A1_REG TCCR0A |
Definition at line 601 of file ATmega32C1.h.
| #define COM0B0_REG TCCR0A |
Definition at line 598 of file ATmega32C1.h.
| #define COM0B1_REG TCCR0A |
Definition at line 599 of file ATmega32C1.h.
| #define COM1A0_REG TCCR1A |
Definition at line 461 of file ATmega32C1.h.
| #define COM1A1_REG TCCR1A |
Definition at line 462 of file ATmega32C1.h.
| #define COM1B0_REG TCCR1A |
Definition at line 459 of file ATmega32C1.h.
| #define COM1B1_REG TCCR1A |
Definition at line 460 of file ATmega32C1.h.
| #define CONMOB0_REG CANCDMOB |
Definition at line 672 of file ATmega32C1.h.
| #define CONMOB1_REG CANCDMOB |
Definition at line 673 of file ATmega32C1.h.
| #define CPHA_REG SPCR |
Definition at line 606 of file ATmega32C1.h.
| #define CPOL_REG SPCR |
Definition at line 607 of file ATmega32C1.h.
| #define CS00_REG TCCR0B |
Definition at line 588 of file ATmega32C1.h.
| #define CS01_REG TCCR0B |
Definition at line 589 of file ATmega32C1.h.
| #define CS02_REG TCCR0B |
Definition at line 590 of file ATmega32C1.h.
| #define CS10_REG TCCR1B |
Definition at line 469 of file ATmega32C1.h.
| #define CS11_REG TCCR1B |
Definition at line 470 of file ATmega32C1.h.
| #define CS12_REG TCCR1B |
Definition at line 471 of file ATmega32C1.h.
| #define D2A_BIT 7 |
Definition at line 1215 of file ATmega32C1.h.
| #define D2A_PORT PORTC |
Definition at line 1214 of file ATmega32C1.h.
| #define DAATE_REG DACON |
Definition at line 757 of file ATmega32C1.h.
| #define DACH0_REG DACH |
Definition at line 832 of file ATmega32C1.h.
| #define DACH1_REG DACH |
Definition at line 833 of file ATmega32C1.h.
| #define DACH2_REG DACH |
Definition at line 834 of file ATmega32C1.h.
| #define DACH3_REG DACH |
Definition at line 835 of file ATmega32C1.h.
| #define DACH4_REG DACH |
Definition at line 836 of file ATmega32C1.h.
| #define DACH5_REG DACH |
Definition at line 837 of file ATmega32C1.h.
| #define DACH6_REG DACH |
Definition at line 838 of file ATmega32C1.h.
| #define DACH7_REG DACH |
Definition at line 839 of file ATmega32C1.h.
| #define DACL0_REG DACL |
Definition at line 968 of file ATmega32C1.h.
| #define DACL1_REG DACL |
Definition at line 969 of file ATmega32C1.h.
| #define DACL2_REG DACL |
Definition at line 970 of file ATmega32C1.h.
| #define DACL3_REG DACL |
Definition at line 971 of file ATmega32C1.h.
| #define DACL4_REG DACL |
Definition at line 972 of file ATmega32C1.h.
| #define DACL5_REG DACL |
Definition at line 973 of file ATmega32C1.h.
| #define DACL6_REG DACL |
Definition at line 974 of file ATmega32C1.h.
| #define DACL7_REG DACL |
Definition at line 975 of file ATmega32C1.h.
| #define DAEN_REG DACON |
Definition at line 752 of file ATmega32C1.h.
| #define DALA_REG DACON |
Definition at line 753 of file ATmega32C1.h.
| #define DATS0_REG DACON |
Definition at line 754 of file ATmega32C1.h.
| #define DATS1_REG DACON |
Definition at line 755 of file ATmega32C1.h.
| #define DATS2_REG DACON |
Definition at line 756 of file ATmega32C1.h.
| #define DDB0_REG DDRB |
Definition at line 437 of file ATmega32C1.h.
| #define DDB1_REG DDRB |
Definition at line 438 of file ATmega32C1.h.
| #define DDB2_REG DDRB |
Definition at line 439 of file ATmega32C1.h.
| #define DDB3_REG DDRB |
Definition at line 440 of file ATmega32C1.h.
| #define DDB4_REG DDRB |
Definition at line 441 of file ATmega32C1.h.
| #define DDB5_REG DDRB |
Definition at line 442 of file ATmega32C1.h.
| #define DDB6_REG DDRB |
Definition at line 443 of file ATmega32C1.h.
| #define DDB7_REG DDRB |
Definition at line 444 of file ATmega32C1.h.
| #define DDC0_REG DDRC |
Definition at line 447 of file ATmega32C1.h.
| #define DDC1_REG DDRC |
Definition at line 448 of file ATmega32C1.h.
| #define DDC2_REG DDRC |
Definition at line 449 of file ATmega32C1.h.
| #define DDC3_REG DDRC |
Definition at line 450 of file ATmega32C1.h.
| #define DDC4_REG DDRC |
Definition at line 451 of file ATmega32C1.h.
| #define DDC5_REG DDRC |
Definition at line 452 of file ATmega32C1.h.
| #define DDC6_REG DDRC |
Definition at line 453 of file ATmega32C1.h.
| #define DDC7_REG DDRC |
Definition at line 454 of file ATmega32C1.h.
| #define DDD0_REG DDRD |
Definition at line 899 of file ATmega32C1.h.
| #define DDD1_REG DDRD |
Definition at line 900 of file ATmega32C1.h.
| #define DDD2_REG DDRD |
Definition at line 901 of file ATmega32C1.h.
| #define DDD3_REG DDRD |
Definition at line 902 of file ATmega32C1.h.
| #define DDD4_REG DDRD |
Definition at line 903 of file ATmega32C1.h.
| #define DDD5_REG DDRD |
Definition at line 904 of file ATmega32C1.h.
| #define DDD6_REG DDRD |
Definition at line 905 of file ATmega32C1.h.
| #define DDD7_REG DDRD |
Definition at line 906 of file ATmega32C1.h.
| #define DDE0_REG DDRE |
Definition at line 909 of file ATmega32C1.h.
| #define DDE1_REG DDRE |
Definition at line 910 of file ATmega32C1.h.
| #define DDE2_REG DDRE |
Definition at line 911 of file ATmega32C1.h.
| #define DLC0_REG CANCDMOB |
Definition at line 666 of file ATmega32C1.h.
| #define DLC1_REG CANCDMOB |
Definition at line 667 of file ATmega32C1.h.
| #define DLC2_REG CANCDMOB |
Definition at line 668 of file ATmega32C1.h.
| #define DLC3_REG CANCDMOB |
Definition at line 669 of file ATmega32C1.h.
| #define DLCW_REG CANSTMOB |
Definition at line 829 of file ATmega32C1.h.
| #define DORD_REG SPCR |
Definition at line 609 of file ATmega32C1.h.
| #define EEAR0_REG EEARL |
Definition at line 326 of file ATmega32C1.h.
| #define EEAR1_REG EEARL |
Definition at line 327 of file ATmega32C1.h.
| #define EEAR2_REG EEARL |
Definition at line 328 of file ATmega32C1.h.
| #define EEAR3_REG EEARL |
Definition at line 329 of file ATmega32C1.h.
| #define EEAR4_REG EEARL |
Definition at line 330 of file ATmega32C1.h.
| #define EEAR5_REG EEARL |
Definition at line 331 of file ATmega32C1.h.
| #define EEAR6_REG EEARL |
Definition at line 332 of file ATmega32C1.h.
| #define EEAR7_REG EEARL |
Definition at line 333 of file ATmega32C1.h.
| #define EEAR8_REG EEARH |
Definition at line 786 of file ATmega32C1.h.
| #define EEAR9_REG EEARH |
Definition at line 787 of file ATmega32C1.h.
| #define EEDR0_REG EEDR |
Definition at line 148 of file ATmega32C1.h.
| #define EEDR1_REG EEDR |
Definition at line 149 of file ATmega32C1.h.
| #define EEDR2_REG EEDR |
Definition at line 150 of file ATmega32C1.h.
| #define EEDR3_REG EEDR |
Definition at line 151 of file ATmega32C1.h.
| #define EEDR4_REG EEDR |
Definition at line 152 of file ATmega32C1.h.
| #define EEDR5_REG EEDR |
Definition at line 153 of file ATmega32C1.h.
| #define EEDR6_REG EEDR |
Definition at line 154 of file ATmega32C1.h.
| #define EEDR7_REG EEDR |
Definition at line 155 of file ATmega32C1.h.
| #define EEMWE_REG EECR |
Definition at line 734 of file ATmega32C1.h.
| #define EEPM0_REG EECR |
Definition at line 736 of file ATmega32C1.h.
| #define EEPM1_REG EECR |
Definition at line 737 of file ATmega32C1.h.
| #define EERE_REG EECR |
Definition at line 732 of file ATmega32C1.h.
| #define EERIE_REG EECR |
Definition at line 735 of file ATmega32C1.h.
| #define EEWE_REG EECR |
Definition at line 733 of file ATmega32C1.h.
| #define ENASTB_REG CANGCON |
Definition at line 263 of file ATmega32C1.h.
| #define ENBOFF_REG CANGIE |
Definition at line 558 of file ATmega32C1.h.
| #define ENBX_REG CANGIE |
Definition at line 554 of file ATmega32C1.h.
| #define ENERG_REG CANGIE |
Definition at line 553 of file ATmega32C1.h.
| #define ENERR_REG CANGIE |
Definition at line 555 of file ATmega32C1.h.
| #define ENFG_REG CANGSTA |
Definition at line 256 of file ATmega32C1.h.
| #define ENIT_REG CANGIE |
Definition at line 559 of file ATmega32C1.h.
| #define ENMOB0_REG CANEN2 |
Definition at line 852 of file ATmega32C1.h.
| #define ENMOB1_REG CANEN2 |
Definition at line 853 of file ATmega32C1.h.
| #define ENMOB2_REG CANEN2 |
Definition at line 854 of file ATmega32C1.h.
| #define ENMOB3_REG CANEN2 |
Definition at line 855 of file ATmega32C1.h.
| #define ENMOB4_REG CANEN2 |
Definition at line 856 of file ATmega32C1.h.
| #define ENMOB5_REG CANEN2 |
Definition at line 857 of file ATmega32C1.h.
| #define ENOVRT_REG CANGIE |
Definition at line 552 of file ATmega32C1.h.
| #define ENRX_REG CANGIE |
Definition at line 557 of file ATmega32C1.h.
| #define ENTX_REG CANGIE |
Definition at line 556 of file ATmega32C1.h.
| #define ERRP_REG CANGSTA |
Definition at line 254 of file ATmega32C1.h.
| #define EXTRF_REG MCUSR |
Definition at line 727 of file ATmega32C1.h.
| #define FERG_REG CANGIT |
Definition at line 518 of file ATmega32C1.h.
| #define FERR_REG CANSTMOB |
Definition at line 823 of file ATmega32C1.h.
| #define FOC0A_REG TCCR0B |
Definition at line 593 of file ATmega32C1.h.
| #define FOC0B_REG TCCR0B |
Definition at line 592 of file ATmega32C1.h.
| #define FOC1A_REG TCCR1C |
Definition at line 466 of file ATmega32C1.h.
| #define FOC1B_REG TCCR1C |
Definition at line 465 of file ATmega32C1.h.
| #define GPIOR00_REG GPIOR0 |
Definition at line 497 of file ATmega32C1.h.
| #define GPIOR01_REG GPIOR0 |
Definition at line 498 of file ATmega32C1.h.
| #define GPIOR02_REG GPIOR0 |
Definition at line 499 of file ATmega32C1.h.
| #define GPIOR03_REG GPIOR0 |
Definition at line 500 of file ATmega32C1.h.
| #define GPIOR04_REG GPIOR0 |
Definition at line 501 of file ATmega32C1.h.
| #define GPIOR05_REG GPIOR0 |
Definition at line 502 of file ATmega32C1.h.
| #define GPIOR06_REG GPIOR0 |
Definition at line 503 of file ATmega32C1.h.
| #define GPIOR07_REG GPIOR0 |
Definition at line 504 of file ATmega32C1.h.
| #define GPIOR10_REG GPIOR1 |
Definition at line 487 of file ATmega32C1.h.
| #define GPIOR11_REG GPIOR1 |
Definition at line 488 of file ATmega32C1.h.
| #define GPIOR12_REG GPIOR1 |
Definition at line 489 of file ATmega32C1.h.
| #define GPIOR13_REG GPIOR1 |
Definition at line 490 of file ATmega32C1.h.
| #define GPIOR14_REG GPIOR1 |
Definition at line 491 of file ATmega32C1.h.
| #define GPIOR15_REG GPIOR1 |
Definition at line 492 of file ATmega32C1.h.
| #define GPIOR16_REG GPIOR1 |
Definition at line 493 of file ATmega32C1.h.
| #define GPIOR17_REG GPIOR1 |
Definition at line 494 of file ATmega32C1.h.
| #define GPIOR20_REG GPIOR2 |
Definition at line 507 of file ATmega32C1.h.
| #define GPIOR21_REG GPIOR2 |
Definition at line 508 of file ATmega32C1.h.
| #define GPIOR22_REG GPIOR2 |
Definition at line 509 of file ATmega32C1.h.
| #define GPIOR23_REG GPIOR2 |
Definition at line 510 of file ATmega32C1.h.
| #define GPIOR24_REG GPIOR2 |
Definition at line 511 of file ATmega32C1.h.
| #define GPIOR25_REG GPIOR2 |
Definition at line 512 of file ATmega32C1.h.
| #define GPIOR26_REG GPIOR2 |
Definition at line 513 of file ATmega32C1.h.
| #define GPIOR27_REG GPIOR2 |
Definition at line 514 of file ATmega32C1.h.
| #define H_REG SREG |
Definition at line 393 of file ATmega32C1.h.
| #define HPMOB0_REG CANHPMOB |
Definition at line 690 of file ATmega32C1.h.
| #define HPMOB1_REG CANHPMOB |
Definition at line 691 of file ATmega32C1.h.
| #define HPMOB2_REG CANHPMOB |
Definition at line 692 of file ATmega32C1.h.
| #define HPMOB3_REG CANHPMOB |
Definition at line 693 of file ATmega32C1.h.
| #define I_REG SREG |
Definition at line 395 of file ATmega32C1.h.
| #define ICES1_REG TCCR1B |
Definition at line 474 of file ATmega32C1.h.
| #define ICF1_REG TIFR1 |
Definition at line 617 of file ATmega32C1.h.
| #define ICIE1_REG TIMSK1 |
Definition at line 986 of file ATmega32C1.h.
| #define ICNC1_REG TCCR1B |
Definition at line 475 of file ATmega32C1.h.
| #define ICP1A_BIT 4 |
Definition at line 1256 of file ATmega32C1.h.
| #define ICP1A_PORT PORTD |
Definition at line 1255 of file ATmega32C1.h.
| #define ICP1B_BIT 3 |
Definition at line 1185 of file ATmega32C1.h.
| #define ICP1B_PORT PORTC |
Definition at line 1184 of file ATmega32C1.h.
| #define ICPSEL1_REG GTCCR |
Definition at line 661 of file ATmega32C1.h.
| #define ICR1H0_REG ICR1H |
Definition at line 199 of file ATmega32C1.h.
| #define ICR1H1_REG ICR1H |
Definition at line 200 of file ATmega32C1.h.
| #define ICR1H2_REG ICR1H |
Definition at line 201 of file ATmega32C1.h.
| #define ICR1H3_REG ICR1H |
Definition at line 202 of file ATmega32C1.h.
| #define ICR1H4_REG ICR1H |
Definition at line 203 of file ATmega32C1.h.
| #define ICR1H5_REG ICR1H |
Definition at line 204 of file ATmega32C1.h.
| #define ICR1H6_REG ICR1H |
Definition at line 205 of file ATmega32C1.h.
| #define ICR1H7_REG ICR1H |
Definition at line 206 of file ATmega32C1.h.
| #define ICR1L0_REG ICR1L |
Definition at line 209 of file ATmega32C1.h.
| #define ICR1L1_REG ICR1L |
Definition at line 210 of file ATmega32C1.h.
| #define ICR1L2_REG ICR1L |
Definition at line 211 of file ATmega32C1.h.
| #define ICR1L3_REG ICR1L |
Definition at line 212 of file ATmega32C1.h.
| #define ICR1L4_REG ICR1L |
Definition at line 213 of file ATmega32C1.h.
| #define ICR1L5_REG ICR1L |
Definition at line 214 of file ATmega32C1.h.
| #define ICR1L6_REG ICR1L |
Definition at line 215 of file ATmega32C1.h.
| #define ICR1L7_REG ICR1L |
Definition at line 216 of file ATmega32C1.h.
| #define IDE_REG CANCDMOB |
Definition at line 670 of file ATmega32C1.h.
| #define IDEMSK_REG CANIDM4 |
Definition at line 428 of file ATmega32C1.h.
| #define IDMSK0_REG CANIDM4 |
Definition at line 430 of file ATmega32C1.h.
| #define IDMSK10_REG CANIDM3 |
Definition at line 413 of file ATmega32C1.h.
| #define IDMSK11_REG CANIDM3 |
Definition at line 414 of file ATmega32C1.h.
| #define IDMSK12_REG CANIDM3 |
Definition at line 415 of file ATmega32C1.h.
| #define IDMSK13_REG CANIDM2 |
Definition at line 418 of file ATmega32C1.h.
| #define IDMSK14_REG CANIDM2 |
Definition at line 419 of file ATmega32C1.h.
| #define IDMSK15_REG CANIDM2 |
Definition at line 420 of file ATmega32C1.h.
| #define IDMSK16_REG CANIDM2 |
Definition at line 421 of file ATmega32C1.h.
| #define IDMSK17_REG CANIDM2 |
Definition at line 422 of file ATmega32C1.h.
| #define IDMSK18_REG CANIDM2 |
Definition at line 423 of file ATmega32C1.h.
| #define IDMSK19_REG CANIDM2 |
Definition at line 424 of file ATmega32C1.h.
| #define IDMSK1_REG CANIDM4 |
Definition at line 431 of file ATmega32C1.h.
| #define IDMSK20_REG CANIDM2 |
Definition at line 425 of file ATmega32C1.h.
| #define IDMSK21_REG CANIDM1 |
Definition at line 398 of file ATmega32C1.h.
| #define IDMSK22_REG CANIDM1 |
Definition at line 399 of file ATmega32C1.h.
| #define IDMSK23_REG CANIDM1 |
Definition at line 400 of file ATmega32C1.h.
| #define IDMSK24_REG CANIDM1 |
Definition at line 401 of file ATmega32C1.h.
| #define IDMSK25_REG CANIDM1 |
Definition at line 402 of file ATmega32C1.h.
| #define IDMSK26_REG CANIDM1 |
Definition at line 403 of file ATmega32C1.h.
| #define IDMSK27_REG CANIDM1 |
Definition at line 404 of file ATmega32C1.h.
| #define IDMSK28_REG CANIDM1 |
Definition at line 405 of file ATmega32C1.h.
| #define IDMSK2_REG CANIDM4 |
Definition at line 432 of file ATmega32C1.h.
| #define IDMSK3_REG CANIDM4 |
Definition at line 433 of file ATmega32C1.h.
| #define IDMSK4_REG CANIDM4 |
Definition at line 434 of file ATmega32C1.h.
| #define IDMSK5_REG CANIDM3 |
Definition at line 408 of file ATmega32C1.h.
| #define IDMSK6_REG CANIDM3 |
Definition at line 409 of file ATmega32C1.h.
| #define IDMSK7_REG CANIDM3 |
Definition at line 410 of file ATmega32C1.h.
| #define IDMSK8_REG CANIDM3 |
Definition at line 411 of file ATmega32C1.h.
| #define IDMSK9_REG CANIDM3 |
Definition at line 412 of file ATmega32C1.h.
| #define IDT0_REG CANIDT4 |
Definition at line 623 of file ATmega32C1.h.
| #define IDT10_REG CANIDT3 |
Definition at line 645 of file ATmega32C1.h.
| #define IDT11_REG CANIDT3 |
Definition at line 646 of file ATmega32C1.h.
| #define IDT12_REG CANIDT3 |
Definition at line 647 of file ATmega32C1.h.
| #define IDT13_REG CANIDT2 |
Definition at line 630 of file ATmega32C1.h.
| #define IDT14_REG CANIDT2 |
Definition at line 631 of file ATmega32C1.h.
| #define IDT15_REG CANIDT2 |
Definition at line 632 of file ATmega32C1.h.
| #define IDT16_REG CANIDT2 |
Definition at line 633 of file ATmega32C1.h.
| #define IDT17_REG CANIDT2 |
Definition at line 634 of file ATmega32C1.h.
| #define IDT18_REG CANIDT2 |
Definition at line 635 of file ATmega32C1.h.
| #define IDT19_REG CANIDT2 |
Definition at line 636 of file ATmega32C1.h.
| #define IDT1_REG CANIDT4 |
Definition at line 624 of file ATmega32C1.h.
| #define IDT20_REG CANIDT2 |
Definition at line 637 of file ATmega32C1.h.
| #define IDT21_REG CANIDT1 |
Definition at line 650 of file ATmega32C1.h.
| #define IDT22_REG CANIDT1 |
Definition at line 651 of file ATmega32C1.h.
| #define IDT23_REG CANIDT1 |
Definition at line 652 of file ATmega32C1.h.
| #define IDT24_REG CANIDT1 |
Definition at line 653 of file ATmega32C1.h.
| #define IDT25_REG CANIDT1 |
Definition at line 654 of file ATmega32C1.h.
| #define IDT26_REG CANIDT1 |
Definition at line 655 of file ATmega32C1.h.
| #define IDT27_REG CANIDT1 |
Definition at line 656 of file ATmega32C1.h.
| #define IDT28_REG CANIDT1 |
Definition at line 657 of file ATmega32C1.h.
| #define IDT2_REG CANIDT4 |
Definition at line 625 of file ATmega32C1.h.
| #define IDT3_REG CANIDT4 |
Definition at line 626 of file ATmega32C1.h.
| #define IDT4_REG CANIDT4 |
Definition at line 627 of file ATmega32C1.h.
| #define IDT5_REG CANIDT3 |
Definition at line 640 of file ATmega32C1.h.
| #define IDT6_REG CANIDT3 |
Definition at line 641 of file ATmega32C1.h.
| #define IDT7_REG CANIDT3 |
Definition at line 642 of file ATmega32C1.h.
| #define IDT8_REG CANIDT3 |
Definition at line 643 of file ATmega32C1.h.
| #define IDT9_REG CANIDT3 |
Definition at line 644 of file ATmega32C1.h.
| #define IEMOB0_REG CANIE2 |
Definition at line 572 of file ATmega32C1.h.
| #define IEMOB1_REG CANIE2 |
Definition at line 573 of file ATmega32C1.h.
| #define IEMOB2_REG CANIE2 |
Definition at line 574 of file ATmega32C1.h.
| #define IEMOB3_REG CANIE2 |
Definition at line 575 of file ATmega32C1.h.
| #define IEMOB4_REG CANIE2 |
Definition at line 576 of file ATmega32C1.h.
| #define IEMOB5_REG CANIE2 |
Definition at line 577 of file ATmega32C1.h.
| #define INDX0_REG CANPAGE |
Definition at line 790 of file ATmega32C1.h.
| #define INDX1_REG CANPAGE |
Definition at line 791 of file ATmega32C1.h.
| #define INDX2_REG CANPAGE |
Definition at line 792 of file ATmega32C1.h.
| #define INT0_BIT 6 |
Definition at line 1274 of file ATmega32C1.h.
| #define INT0_PORT PORTD |
Definition at line 1273 of file ATmega32C1.h.
| #define INT0_REG EIMSK |
Definition at line 336 of file ATmega32C1.h.
| #define INT1_BIT 2 |
Definition at line 1122 of file ATmega32C1.h.
| #define INT1_PORT PORTB |
Definition at line 1121 of file ATmega32C1.h.
| #define INT1_REG EIMSK |
Definition at line 337 of file ATmega32C1.h.
| #define INT2_BIT 5 |
Definition at line 1141 of file ATmega32C1.h.
| #define INT2_PORT PORTB |
Definition at line 1140 of file ATmega32C1.h.
| #define INT2_REG EIMSK |
Definition at line 338 of file ATmega32C1.h.
| #define INT3_BIT 0 |
Definition at line 1162 of file ATmega32C1.h.
| #define INT3_PORT PORTC |
Definition at line 1161 of file ATmega32C1.h.
| #define INT3_REG EIMSK |
Definition at line 339 of file ATmega32C1.h.
| #define INTF0_REG EIFR |
Definition at line 816 of file ATmega32C1.h.
| #define INTF1_REG EIFR |
Definition at line 817 of file ATmega32C1.h.
| #define INTF2_REG EIFR |
Definition at line 818 of file ATmega32C1.h.
| #define INTF3_REG EIFR |
Definition at line 819 of file ATmega32C1.h.
| #define ISC00_REG EICRA |
Definition at line 342 of file ATmega32C1.h.
| #define ISC01_REG EICRA |
Definition at line 343 of file ATmega32C1.h.
| #define ISC10_REG EICRA |
Definition at line 344 of file ATmega32C1.h.
| #define ISC11_REG EICRA |
Definition at line 345 of file ATmega32C1.h.
| #define ISC20_REG EICRA |
Definition at line 346 of file ATmega32C1.h.
| #define ISC21_REG EICRA |
Definition at line 347 of file ATmega32C1.h.
| #define ISC30_REG EICRA |
Definition at line 348 of file ATmega32C1.h.
| #define ISC31_REG EICRA |
Definition at line 349 of file ATmega32C1.h.
| #define ISRCEN_REG ADCSRB |
Definition at line 865 of file ATmega32C1.h.
| #define IVCE_REG MCUCR |
Definition at line 810 of file ATmega32C1.h.
| #define IVSEL_REG MCUCR |
Definition at line 811 of file ATmega32C1.h.
| #define LABORT_REG LINERR |
Definition at line 543 of file ATmega32C1.h.
| #define LAINC_REG LINSEL |
Definition at line 171 of file ATmega32C1.h.
| #define LBERR_REG LINERR |
Definition at line 536 of file ATmega32C1.h.
| #define LBT0_REG LINBTR |
Definition at line 109 of file ATmega32C1.h.
| #define LBT1_REG LINBTR |
Definition at line 110 of file ATmega32C1.h.
| #define LBT2_REG LINBTR |
Definition at line 111 of file ATmega32C1.h.
| #define LBT3_REG LINBTR |
Definition at line 112 of file ATmega32C1.h.
| #define LBT4_REG LINBTR |
Definition at line 113 of file ATmega32C1.h.
| #define LBT5_REG LINBTR |
Definition at line 114 of file ATmega32C1.h.
| #define LBUSY_REG LINSIR |
Definition at line 356 of file ATmega32C1.h.
| #define LCERR_REG LINERR |
Definition at line 537 of file ATmega32C1.h.
| #define LCMD0_REG LINCR |
Definition at line 174 of file ATmega32C1.h.
| #define LCMD1_REG LINCR |
Definition at line 175 of file ATmega32C1.h.
| #define LCMD2_REG LINCR |
Definition at line 176 of file ATmega32C1.h.
| #define LCONF0_REG LINCR |
Definition at line 178 of file ATmega32C1.h.
| #define LCONF1_REG LINCR |
Definition at line 179 of file ATmega32C1.h.
| #define LDATA0_REG LINDAT |
Definition at line 776 of file ATmega32C1.h.
| #define LDATA1_REG LINDAT |
Definition at line 777 of file ATmega32C1.h.
| #define LDATA2_REG LINDAT |
Definition at line 778 of file ATmega32C1.h.
| #define LDATA3_REG LINDAT |
Definition at line 779 of file ATmega32C1.h.
| #define LDATA4_REG LINDAT |
Definition at line 780 of file ATmega32C1.h.
| #define LDATA5_REG LINDAT |
Definition at line 781 of file ATmega32C1.h.
| #define LDATA6_REG LINDAT |
Definition at line 782 of file ATmega32C1.h.
| #define LDATA7_REG LINDAT |
Definition at line 783 of file ATmega32C1.h.
| #define LDISR_REG LINBTR |
Definition at line 115 of file ATmega32C1.h.
| #define LDIV0_REG LINBRRL |
Definition at line 238 of file ATmega32C1.h.
| #define LDIV10_REG LINBRRH |
Definition at line 250 of file ATmega32C1.h.
| #define LDIV11_REG LINBRRH |
Definition at line 251 of file ATmega32C1.h.
| #define LDIV1_REG LINBRRL |
Definition at line 239 of file ATmega32C1.h.
| #define LDIV2_REG LINBRRL |
Definition at line 240 of file ATmega32C1.h.
| #define LDIV3_REG LINBRRL |
Definition at line 241 of file ATmega32C1.h.
| #define LDIV4_REG LINBRRL |
Definition at line 242 of file ATmega32C1.h.
| #define LDIV5_REG LINBRRL |
Definition at line 243 of file ATmega32C1.h.
| #define LDIV6_REG LINBRRL |
Definition at line 244 of file ATmega32C1.h.
| #define LDIV7_REG LINBRRL |
Definition at line 245 of file ATmega32C1.h.
| #define LDIV8_REG LINBRRH |
Definition at line 248 of file ATmega32C1.h.
| #define LDIV9_REG LINBRRH |
Definition at line 249 of file ATmega32C1.h.
| #define LENA_REG LINCR |
Definition at line 177 of file ATmega32C1.h.
| #define LENERR_REG LINENIR |
Definition at line 743 of file ATmega32C1.h.
| #define LENIDOK_REG LINENIR |
Definition at line 742 of file ATmega32C1.h.
| #define LENRXOK_REG LINENIR |
Definition at line 740 of file ATmega32C1.h.
| #define LENTXOK_REG LINENIR |
Definition at line 741 of file ATmega32C1.h.
| #define LERR_REG LINSIR |
Definition at line 355 of file ATmega32C1.h.
| #define LFERR_REG LINERR |
Definition at line 540 of file ATmega32C1.h.
| #define LID0_REG LINIDR |
Definition at line 128 of file ATmega32C1.h.
| #define LID1_REG LINIDR |
Definition at line 129 of file ATmega32C1.h.
| #define LID2_REG LINIDR |
Definition at line 130 of file ATmega32C1.h.
| #define LID3_REG LINIDR |
Definition at line 131 of file ATmega32C1.h.
| #define LID4_REG LINIDR |
Definition at line 132 of file ATmega32C1.h.
| #define LID5_REG LINIDR |
Definition at line 133 of file ATmega32C1.h.
| #define LIDOK_REG LINSIR |
Definition at line 354 of file ATmega32C1.h.
| #define LIDST0_REG LINSIR |
Definition at line 357 of file ATmega32C1.h.
| #define LIDST1_REG LINSIR |
Definition at line 358 of file ATmega32C1.h.
| #define LIDST2_REG LINSIR |
Definition at line 359 of file ATmega32C1.h.
| #define LIN13_REG LINCR |
Definition at line 180 of file ATmega32C1.h.
| #define LINDX0_REG LINSEL |
Definition at line 168 of file ATmega32C1.h.
| #define LINDX1_REG LINSEL |
Definition at line 169 of file ATmega32C1.h.
| #define LINDX2_REG LINSEL |
Definition at line 170 of file ATmega32C1.h.
| #define LISTEN_REG CANGCON |
Definition at line 265 of file ATmega32C1.h.
| #define LOVERR_REG LINERR |
Definition at line 541 of file ATmega32C1.h.
| #define LP0_REG LINIDR |
Definition at line 134 of file ATmega32C1.h.
| #define LP1_REG LINIDR |
Definition at line 135 of file ATmega32C1.h.
| #define LPERR_REG LINERR |
Definition at line 538 of file ATmega32C1.h.
| #define LRXDL0_REG LINDLR |
Definition at line 800 of file ATmega32C1.h.
| #define LRXDL1_REG LINDLR |
Definition at line 801 of file ATmega32C1.h.
| #define LRXDL2_REG LINDLR |
Definition at line 802 of file ATmega32C1.h.
| #define LRXDL3_REG LINDLR |
Definition at line 803 of file ATmega32C1.h.
| #define LRXOK_REG LINSIR |
Definition at line 352 of file ATmega32C1.h.
| #define LSERR_REG LINERR |
Definition at line 539 of file ATmega32C1.h.
| #define LSWRES_REG LINCR |
Definition at line 181 of file ATmega32C1.h.
| #define LTOERR_REG LINERR |
Definition at line 542 of file ATmega32C1.h.
| #define LTXDL0_REG LINDLR |
Definition at line 804 of file ATmega32C1.h.
| #define LTXDL1_REG LINDLR |
Definition at line 805 of file ATmega32C1.h.
| #define LTXDL2_REG LINDLR |
Definition at line 806 of file ATmega32C1.h.
| #define LTXDL3_REG LINDLR |
Definition at line 807 of file ATmega32C1.h.
| #define LTXOK_REG LINSIR |
Definition at line 353 of file ATmega32C1.h.
| #define MISO_A_BIT 2 |
Definition at line 1232 of file ATmega32C1.h.
| #define MISO_A_PORT PORTD |
Definition at line 1231 of file ATmega32C1.h.
| #define MISO_BIT 0 |
Definition at line 1110 of file ATmega32C1.h.
| #define MISO_PORT PORTB |
Definition at line 1109 of file ATmega32C1.h.
| #define MOBNB0_REG CANPAGE |
Definition at line 794 of file ATmega32C1.h.
| #define MOBNB1_REG CANPAGE |
Definition at line 795 of file ATmega32C1.h.
| #define MOBNB2_REG CANPAGE |
Definition at line 796 of file ATmega32C1.h.
| #define MOBNB3_REG CANPAGE |
Definition at line 797 of file ATmega32C1.h.
| #define MOSI_A_BIT 3 |
Definition at line 1245 of file ATmega32C1.h.
| #define MOSI_A_PORT PORTD |
Definition at line 1244 of file ATmega32C1.h.
| #define MOSI_BIT 1 |
Definition at line 1115 of file ATmega32C1.h.
| #define MOSI_PORT PORTB |
Definition at line 1114 of file ATmega32C1.h.
| #define MSTR_REG SPCR |
Definition at line 608 of file ATmega32C1.h.
| #define MUX0_REG ADMUX |
Definition at line 118 of file ATmega32C1.h.
| #define MUX1_REG ADMUX |
Definition at line 119 of file ATmega32C1.h.
| #define MUX2_REG ADMUX |
Definition at line 120 of file ATmega32C1.h.
| #define MUX3_REG ADMUX |
Definition at line 121 of file ATmega32C1.h.
| #define MUX4_REG ADMUX |
Definition at line 122 of file ATmega32C1.h.
| #define N_REG SREG |
Definition at line 390 of file ATmega32C1.h.
| #define OC0A_BIT 3 |
Definition at line 1241 of file ATmega32C1.h.
| #define OC0A_PORT PORTD |
Definition at line 1240 of file ATmega32C1.h.
| #define OC0B_BIT 1 |
Definition at line 1291 of file ATmega32C1.h.
| #define OC0B_PORT PORTE |
Definition at line 1290 of file ATmega32C1.h.
| #define OC1A_BIT 2 |
Definition at line 1230 of file ATmega32C1.h.
| #define OC1A_PORT PORTD |
Definition at line 1229 of file ATmega32C1.h.
| #define OC1B_BIT 1 |
Definition at line 1167 of file ATmega32C1.h.
| #define OC1B_PORT PORTC |
Definition at line 1166 of file ATmega32C1.h.
| #define OCD_BIT 0 |
Definition at line 1286 of file ATmega32C1.h.
| #define OCD_PORT PORTE |
Definition at line 1285 of file ATmega32C1.h.
| #define OCF0A_REG TIFR0 |
Definition at line 1105 of file ATmega32C1.h.
| #define OCF0B_REG TIFR0 |
Definition at line 1106 of file ATmega32C1.h.
| #define OCF1A_REG TIFR1 |
Definition at line 615 of file ATmega32C1.h.
| #define OCF1B_REG TIFR1 |
Definition at line 616 of file ATmega32C1.h.
| #define OCIE0A_REG TIMSK0 |
Definition at line 979 of file ATmega32C1.h.
| #define OCIE0B_REG TIMSK0 |
Definition at line 980 of file ATmega32C1.h.
| #define OCIE1A_REG TIMSK1 |
Definition at line 984 of file ATmega32C1.h.
| #define OCIE1B_REG TIMSK1 |
Definition at line 985 of file ATmega32C1.h.
| #define OCR1AH0_REG OCR1AH |
Definition at line 1084 of file ATmega32C1.h.
| #define OCR1AH1_REG OCR1AH |
Definition at line 1085 of file ATmega32C1.h.
| #define OCR1AH2_REG OCR1AH |
Definition at line 1086 of file ATmega32C1.h.
| #define OCR1AH3_REG OCR1AH |
Definition at line 1087 of file ATmega32C1.h.
| #define OCR1AH4_REG OCR1AH |
Definition at line 1088 of file ATmega32C1.h.
| #define OCR1AH5_REG OCR1AH |
Definition at line 1089 of file ATmega32C1.h.
| #define OCR1AH6_REG OCR1AH |
Definition at line 1090 of file ATmega32C1.h.
| #define OCR1AH7_REG OCR1AH |
Definition at line 1091 of file ATmega32C1.h.
| #define OCR1AL0_REG OCR1AL |
Definition at line 1094 of file ATmega32C1.h.
| #define OCR1AL1_REG OCR1AL |
Definition at line 1095 of file ATmega32C1.h.
| #define OCR1AL2_REG OCR1AL |
Definition at line 1096 of file ATmega32C1.h.
| #define OCR1AL3_REG OCR1AL |
Definition at line 1097 of file ATmega32C1.h.
| #define OCR1AL4_REG OCR1AL |
Definition at line 1098 of file ATmega32C1.h.
| #define OCR1AL5_REG OCR1AL |
Definition at line 1099 of file ATmega32C1.h.
| #define OCR1AL6_REG OCR1AL |
Definition at line 1100 of file ATmega32C1.h.
| #define OCR1AL7_REG OCR1AL |
Definition at line 1101 of file ATmega32C1.h.
| #define OCR1BH0_REG OCR1BH |
Definition at line 706 of file ATmega32C1.h.
| #define OCR1BH1_REG OCR1BH |
Definition at line 707 of file ATmega32C1.h.
| #define OCR1BH2_REG OCR1BH |
Definition at line 708 of file ATmega32C1.h.
| #define OCR1BH3_REG OCR1BH |
Definition at line 709 of file ATmega32C1.h.
| #define OCR1BH4_REG OCR1BH |
Definition at line 710 of file ATmega32C1.h.
| #define OCR1BH5_REG OCR1BH |
Definition at line 711 of file ATmega32C1.h.
| #define OCR1BH6_REG OCR1BH |
Definition at line 712 of file ATmega32C1.h.
| #define OCR1BH7_REG OCR1BH |
Definition at line 713 of file ATmega32C1.h.
| #define OCR1BL0_REG OCR1BL |
Definition at line 696 of file ATmega32C1.h.
| #define OCR1BL1_REG OCR1BL |
Definition at line 697 of file ATmega32C1.h.
| #define OCR1BL2_REG OCR1BL |
Definition at line 698 of file ATmega32C1.h.
| #define OCR1BL3_REG OCR1BL |
Definition at line 699 of file ATmega32C1.h.
| #define OCR1BL4_REG OCR1BL |
Definition at line 700 of file ATmega32C1.h.
| #define OCR1BL5_REG OCR1BL |
Definition at line 701 of file ATmega32C1.h.
| #define OCR1BL6_REG OCR1BL |
Definition at line 702 of file ATmega32C1.h.
| #define OCR1BL7_REG OCR1BL |
Definition at line 703 of file ATmega32C1.h.
| #define OVFG_REG CANGSTA |
Definition at line 259 of file ATmega32C1.h.
| #define OVRQ_REG CANGCON |
Definition at line 268 of file ATmega32C1.h.
| #define OVRTIM_REG CANGIT |
Definition at line 522 of file ATmega32C1.h.
| #define PCIE0_REG PCICR |
Definition at line 546 of file ATmega32C1.h.
| #define PCIE1_REG PCICR |
Definition at line 547 of file ATmega32C1.h.
| #define PCIE2_REG PCICR |
Definition at line 548 of file ATmega32C1.h.
| #define PCIE3_REG PCICR |
Definition at line 549 of file ATmega32C1.h.
| #define PCIF0_REG PCIFR |
Definition at line 760 of file ATmega32C1.h.
| #define PCIF1_REG PCIFR |
Definition at line 761 of file ATmega32C1.h.
| #define PCIF2_REG PCIFR |
Definition at line 762 of file ATmega32C1.h.
| #define PCIF3_REG PCIFR |
Definition at line 763 of file ATmega32C1.h.
| #define PCINT0_BIT 0 |
Definition at line 1112 of file ATmega32C1.h.
| #define PCINT0_PORT PORTB |
Definition at line 1111 of file ATmega32C1.h.
| #define PCINT0_REG PCMSK0 |
Definition at line 1004 of file ATmega32C1.h.
| #define PCINT10_BIT 2 |
Definition at line 1178 of file ATmega32C1.h.
| #define PCINT10_PORT PORTC |
Definition at line 1177 of file ATmega32C1.h.
| #define PCINT10_REG PCMSK1 |
Definition at line 1016 of file ATmega32C1.h.
| #define PCINT11_BIT 3 |
Definition at line 1187 of file ATmega32C1.h.
| #define PCINT11_PORT PORTC |
Definition at line 1186 of file ATmega32C1.h.
| #define PCINT11_REG PCMSK1 |
Definition at line 1017 of file ATmega32C1.h.
| #define PCINT12_BIT 4 |
Definition at line 1196 of file ATmega32C1.h.
| #define PCINT12_PORT PORTC |
Definition at line 1195 of file ATmega32C1.h.
| #define PCINT12_REG PCMSK1 |
Definition at line 1018 of file ATmega32C1.h.
| #define PCINT13_BIT 5 |
Definition at line 1205 of file ATmega32C1.h.
| #define PCINT13_PORT PORTC |
Definition at line 1204 of file ATmega32C1.h.
| #define PCINT13_REG PCMSK1 |
Definition at line 1019 of file ATmega32C1.h.
| #define PCINT14_BIT 6 |
Definition at line 1212 of file ATmega32C1.h.
| #define PCINT14_PORT PORTC |
Definition at line 1211 of file ATmega32C1.h.
| #define PCINT14_REG PCMSK1 |
Definition at line 1020 of file ATmega32C1.h.
| #define PCINT15_BIT 7 |
Definition at line 1219 of file ATmega32C1.h.
| #define PCINT15_PORT PORTC |
Definition at line 1218 of file ATmega32C1.h.
| #define PCINT15_REG PCMSK1 |
Definition at line 1021 of file ATmega32C1.h.
| #define PCINT16_BIT 0 |
Definition at line 1222 of file ATmega32C1.h.
| #define PCINT16_PORT PORTD |
Definition at line 1221 of file ATmega32C1.h.
| #define PCINT16_REG PCMSK2 |
Definition at line 1024 of file ATmega32C1.h.
| #define PCINT17_BIT 1 |
Definition at line 1227 of file ATmega32C1.h.
| #define PCINT17_PORT PORTD |
Definition at line 1226 of file ATmega32C1.h.
| #define PCINT17_REG PCMSK2 |
Definition at line 1025 of file ATmega32C1.h.
| #define PCINT18_BIT 2 |
Definition at line 1234 of file ATmega32C1.h.
| #define PCINT18_PORT PORTD |
Definition at line 1233 of file ATmega32C1.h.
| #define PCINT18_REG PCMSK2 |
Definition at line 1026 of file ATmega32C1.h.
| #define PCINT19_BIT 3 |
Definition at line 1247 of file ATmega32C1.h.
| #define PCINT19_PORT PORTD |
Definition at line 1246 of file ATmega32C1.h.
| #define PCINT19_REG PCMSK2 |
Definition at line 1027 of file ATmega32C1.h.
| #define PCINT1_BIT 1 |
Definition at line 1117 of file ATmega32C1.h.
| #define PCINT1_PORT PORTB |
Definition at line 1116 of file ATmega32C1.h.
| #define PCINT1_REG PCMSK0 |
Definition at line 1005 of file ATmega32C1.h.
| #define PCINT20_BIT 4 |
Definition at line 1260 of file ATmega32C1.h.
| #define PCINT20_PORT PORTD |
Definition at line 1259 of file ATmega32C1.h.
| #define PCINT20_REG PCMSK2 |
Definition at line 1028 of file ATmega32C1.h.
| #define PCINT21_BIT 5 |
Definition at line 1267 of file ATmega32C1.h.
| #define PCINT21_PORT PORTD |
Definition at line 1266 of file ATmega32C1.h.
| #define PCINT21_REG PCMSK2 |
Definition at line 1029 of file ATmega32C1.h.
| #define PCINT22_BIT 6 |
Definition at line 1276 of file ATmega32C1.h.
| #define PCINT22_PORT PORTD |
Definition at line 1275 of file ATmega32C1.h.
| #define PCINT22_REG PCMSK2 |
Definition at line 1030 of file ATmega32C1.h.
| #define PCINT23_BIT 7 |
Definition at line 1281 of file ATmega32C1.h.
| #define PCINT23_PORT PORTD |
Definition at line 1280 of file ATmega32C1.h.
| #define PCINT23_REG PCMSK2 |
Definition at line 1031 of file ATmega32C1.h.
| #define PCINT24_BIT 0 |
Definition at line 1288 of file ATmega32C1.h.
| #define PCINT24_PORT PORTE |
Definition at line 1287 of file ATmega32C1.h.
| #define PCINT24_REG PCMSK3 |
Definition at line 1034 of file ATmega32C1.h.
| #define PCINT25_BIT 1 |
Definition at line 1295 of file ATmega32C1.h.
| #define PCINT25_PORT PORTE |
Definition at line 1294 of file ATmega32C1.h.
| #define PCINT25_REG PCMSK3 |
Definition at line 1035 of file ATmega32C1.h.
| #define PCINT26_BIT 2 |
Definition at line 1302 of file ATmega32C1.h.
| #define PCINT26_PORT PORTE |
Definition at line 1301 of file ATmega32C1.h.
| #define PCINT26_REG PCMSK3 |
Definition at line 1036 of file ATmega32C1.h.
| #define PCINT2_BIT 2 |
Definition at line 1126 of file ATmega32C1.h.
| #define PCINT2_PORT PORTB |
Definition at line 1125 of file ATmega32C1.h.
| #define PCINT2_REG PCMSK0 |
Definition at line 1006 of file ATmega32C1.h.
| #define PCINT3_BIT 3 |
Definition at line 1131 of file ATmega32C1.h.
| #define PCINT3_PORT PORTB |
Definition at line 1130 of file ATmega32C1.h.
| #define PCINT3_REG PCMSK0 |
Definition at line 1007 of file ATmega32C1.h.
| #define PCINT4_BIT 4 |
Definition at line 1136 of file ATmega32C1.h.
| #define PCINT4_PORT PORTB |
Definition at line 1135 of file ATmega32C1.h.
| #define PCINT4_REG PCMSK0 |
Definition at line 1008 of file ATmega32C1.h.
| #define PCINT5_BIT 5 |
Definition at line 1147 of file ATmega32C1.h.
| #define PCINT5_PORT PORTB |
Definition at line 1146 of file ATmega32C1.h.
| #define PCINT5_REG PCMSK0 |
Definition at line 1009 of file ATmega32C1.h.
| #define PCINT6_BIT 6 |
Definition at line 1152 of file ATmega32C1.h.
| #define PCINT6_PORT PORTB |
Definition at line 1151 of file ATmega32C1.h.
| #define PCINT6_REG PCMSK0 |
Definition at line 1010 of file ATmega32C1.h.
| #define PCINT7_BIT 7 |
Definition at line 1159 of file ATmega32C1.h.
| #define PCINT7_PORT PORTB |
Definition at line 1158 of file ATmega32C1.h.
| #define PCINT7_REG PCMSK0 |
Definition at line 1011 of file ATmega32C1.h.
| #define PCINT8_BIT 0 |
Definition at line 1164 of file ATmega32C1.h.
| #define PCINT8_PORT PORTC |
Definition at line 1163 of file ATmega32C1.h.
| #define PCINT8_REG PCMSK1 |
Definition at line 1014 of file ATmega32C1.h.
| #define PCINT9_BIT 1 |
Definition at line 1171 of file ATmega32C1.h.
| #define PCINT9_PORT PORTC |
Definition at line 1170 of file ATmega32C1.h.
| #define PCINT9_REG PCMSK1 |
Definition at line 1015 of file ATmega32C1.h.
| #define PGERS_REG SPMCSR |
Definition at line 915 of file ATmega32C1.h.
| #define PGWRT_REG SPMCSR |
Definition at line 916 of file ATmega32C1.h.
| #define PHS10_REG CANBT3 |
Definition at line 932 of file ATmega32C1.h.
| #define PHS11_REG CANBT3 |
Definition at line 933 of file ATmega32C1.h.
| #define PHS12_REG CANBT3 |
Definition at line 934 of file ATmega32C1.h.
| #define PHS20_REG CANBT3 |
Definition at line 935 of file ATmega32C1.h.
| #define PHS21_REG CANBT3 |
Definition at line 936 of file ATmega32C1.h.
| #define PHS22_REG CANBT3 |
Definition at line 937 of file ATmega32C1.h.
| #define PINB0_REG PINB |
Definition at line 1049 of file ATmega32C1.h.
| #define PINB1_REG PINB |
Definition at line 1050 of file ATmega32C1.h.
| #define PINB2_REG PINB |
Definition at line 1051 of file ATmega32C1.h.
| #define PINB3_REG PINB |
Definition at line 1052 of file ATmega32C1.h.
| #define PINB4_REG PINB |
Definition at line 1053 of file ATmega32C1.h.
| #define PINB5_REG PINB |
Definition at line 1054 of file ATmega32C1.h.
| #define PINB6_REG PINB |
Definition at line 1055 of file ATmega32C1.h.
| #define PINB7_REG PINB |
Definition at line 1056 of file ATmega32C1.h.
| #define PINC0_REG PINC |
Definition at line 1039 of file ATmega32C1.h.
| #define PINC1_REG PINC |
Definition at line 1040 of file ATmega32C1.h.
| #define PINC2_REG PINC |
Definition at line 1041 of file ATmega32C1.h.
| #define PINC3_REG PINC |
Definition at line 1042 of file ATmega32C1.h.
| #define PINC4_REG PINC |
Definition at line 1043 of file ATmega32C1.h.
| #define PINC5_REG PINC |
Definition at line 1044 of file ATmega32C1.h.
| #define PINC6_REG PINC |
Definition at line 1045 of file ATmega32C1.h.
| #define PINC7_REG PINC |
Definition at line 1046 of file ATmega32C1.h.
| #define PIND0_REG PIND |
Definition at line 1074 of file ATmega32C1.h.
| #define PIND1_REG PIND |
Definition at line 1075 of file ATmega32C1.h.
| #define PIND2_REG PIND |
Definition at line 1076 of file ATmega32C1.h.
| #define PIND3_REG PIND |
Definition at line 1077 of file ATmega32C1.h.
| #define PIND4_REG PIND |
Definition at line 1078 of file ATmega32C1.h.
| #define PIND5_REG PIND |
Definition at line 1079 of file ATmega32C1.h.
| #define PIND6_REG PIND |
Definition at line 1080 of file ATmega32C1.h.
| #define PIND7_REG PIND |
Definition at line 1081 of file ATmega32C1.h.
| #define PINE0_REG PINE |
Definition at line 1069 of file ATmega32C1.h.
| #define PINE1_REG PINE |
Definition at line 1070 of file ATmega32C1.h.
| #define PINE2_REG PINE |
Definition at line 1071 of file ATmega32C1.h.
| #define PLLE_REG PLLCSR |
Definition at line 1000 of file ATmega32C1.h.
| #define PLLF_REG PLLCSR |
Definition at line 1001 of file ATmega32C1.h.
| #define PLOCK_REG PLLCSR |
Definition at line 999 of file ATmega32C1.h.
| #define PORF_REG MCUSR |
Definition at line 726 of file ATmega32C1.h.
| #define PORTB0_REG PORTB |
Definition at line 99 of file ATmega32C1.h.
| #define PORTB1_REG PORTB |
Definition at line 100 of file ATmega32C1.h.
| #define PORTB2_REG PORTB |
Definition at line 101 of file ATmega32C1.h.
| #define PORTB3_REG PORTB |
Definition at line 102 of file ATmega32C1.h.
| #define PORTB4_REG PORTB |
Definition at line 103 of file ATmega32C1.h.
| #define PORTB5_REG PORTB |
Definition at line 104 of file ATmega32C1.h.
| #define PORTB6_REG PORTB |
Definition at line 105 of file ATmega32C1.h.
| #define PORTB7_REG PORTB |
Definition at line 106 of file ATmega32C1.h.
| #define PORTC0_REG PORTC |
Definition at line 297 of file ATmega32C1.h.
| #define PORTC1_REG PORTC |
Definition at line 298 of file ATmega32C1.h.
| #define PORTC2_REG PORTC |
Definition at line 299 of file ATmega32C1.h.
| #define PORTC3_REG PORTC |
Definition at line 300 of file ATmega32C1.h.
| #define PORTC4_REG PORTC |
Definition at line 301 of file ATmega32C1.h.
| #define PORTC5_REG PORTC |
Definition at line 302 of file ATmega32C1.h.
| #define PORTC6_REG PORTC |
Definition at line 303 of file ATmega32C1.h.
| #define PORTC7_REG PORTC |
Definition at line 304 of file ATmega32C1.h.
| #define PORTD0_REG PORTD |
Definition at line 272 of file ATmega32C1.h.
| #define PORTD1_REG PORTD |
Definition at line 273 of file ATmega32C1.h.
| #define PORTD2_REG PORTD |
Definition at line 274 of file ATmega32C1.h.
| #define PORTD3_REG PORTD |
Definition at line 275 of file ATmega32C1.h.
| #define PORTD4_REG PORTD |
Definition at line 276 of file ATmega32C1.h.
| #define PORTD5_REG PORTD |
Definition at line 277 of file ATmega32C1.h.
| #define PORTD6_REG PORTD |
Definition at line 278 of file ATmega32C1.h.
| #define PORTD7_REG PORTD |
Definition at line 279 of file ATmega32C1.h.
| #define PORTE0_REG PORTE |
Definition at line 282 of file ATmega32C1.h.
| #define PORTE1_REG PORTE |
Definition at line 283 of file ATmega32C1.h.
| #define PORTE2_REG PORTE |
Definition at line 284 of file ATmega32C1.h.
| #define PRADC_REG PRR |
Definition at line 229 of file ATmega32C1.h.
| #define PRCAN_REG PRR |
Definition at line 235 of file ATmega32C1.h.
| #define PRLIN_REG PRR |
Definition at line 230 of file ATmega32C1.h.
| #define PRPSC_REG PRR |
Definition at line 234 of file ATmega32C1.h.
| #define PRS0_REG CANBT2 |
Definition at line 924 of file ATmega32C1.h.
| #define PRS1_REG CANBT2 |
Definition at line 925 of file ATmega32C1.h.
| #define PRS2_REG CANBT2 |
Definition at line 926 of file ATmega32C1.h.
| #define PRSPI_REG PRR |
Definition at line 231 of file ATmega32C1.h.
| #define PRTIM0_REG PRR |
Definition at line 232 of file ATmega32C1.h.
| #define PRTIM1_REG PRR |
Definition at line 233 of file ATmega32C1.h.
| #define PSR10_REG GTCCR |
Definition at line 660 of file ATmega32C1.h.
| #define PSRSYNC_REG GTCCR |
Definition at line 663 of file ATmega32C1.h.
| #define PUD_REG MCUCR |
Definition at line 812 of file ATmega32C1.h.
| #define PWM0A_NUM 0 |
Definition at line 87 of file ATmega32C1.h.
| #define PWM0B_NUM 1 |
Definition at line 88 of file ATmega32C1.h.
| #define PWM1A_NUM 2 |
Definition at line 89 of file ATmega32C1.h.
| #define PWM1B_NUM 3 |
Definition at line 90 of file ATmega32C1.h.
| #define PWM_TOTAL_NUM 4 |
Definition at line 91 of file ATmega32C1.h.
| #define RB0TAG_REG CANIDT4 |
Definition at line 620 of file ATmega32C1.h.
| #define RB1TAG_REG CANIDT4 |
Definition at line 621 of file ATmega32C1.h.
| #define REFS0_REG ADMUX |
Definition at line 124 of file ATmega32C1.h.
| #define REFS1_REG ADMUX |
Definition at line 125 of file ATmega32C1.h.
| #define RESET_BIT 0 |
Definition at line 1284 of file ATmega32C1.h.
| #define RESET_PORT PORTE |
Definition at line 1283 of file ATmega32C1.h.
| #define RPLV_REG CANCDMOB |
Definition at line 671 of file ATmega32C1.h.
| #define RTRMSK_REG CANIDM4 |
Definition at line 429 of file ATmega32C1.h.
| #define RTRTAG_REG CANIDT4 |
Definition at line 622 of file ATmega32C1.h.
| #define RWWSB_REG SPMCSR |
Definition at line 920 of file ATmega32C1.h.
| #define RWWSRE_REG SPMCSR |
Definition at line 918 of file ATmega32C1.h.
| #define RXBSY_REG CANGSTA |
Definition at line 257 of file ATmega32C1.h.
| #define RXCAN_BIT 3 |
Definition at line 1183 of file ATmega32C1.h.
| #define RXCAN_PORT PORTC |
Definition at line 1182 of file ATmega32C1.h.
| #define RXD_BIT 4 |
Definition at line 1252 of file ATmega32C1.h.
| #define RXD_PORT PORTD |
Definition at line 1251 of file ATmega32C1.h.
| #define RXLIN_BIT 4 |
Definition at line 1254 of file ATmega32C1.h.
| #define RXLIN_PORT PORTD |
Definition at line 1253 of file ATmega32C1.h.
| #define RXOK_REG CANSTMOB |
Definition at line 827 of file ATmega32C1.h.
| #define S_REG SREG |
Definition at line 392 of file ATmega32C1.h.
| #define SCK_A_BIT 4 |
Definition at line 1258 of file ATmega32C1.h.
| #define SCK_A_PORT PORTD |
Definition at line 1257 of file ATmega32C1.h.
| #define SCK_BIT 7 |
Definition at line 1157 of file ATmega32C1.h.
| #define SCK_PORT PORTB |
Definition at line 1156 of file ATmega32C1.h.
| #define SE_REG SMCR |
Definition at line 746 of file ATmega32C1.h.
| #define SERG_REG CANGIT |
Definition at line 520 of file ATmega32C1.h.
| #define SERR_REG CANSTMOB |
Definition at line 825 of file ATmega32C1.h.
| #define SIG_INPUT_CAPTURE1_NUM 0 |
Definition at line 94 of file ATmega32C1.h.
| #define SIG_INPUT_CAPTURE_TOTAL_NUM 1 |
Definition at line 95 of file ATmega32C1.h.
| #define SIG_OUTPUT_COMPARE0A_NUM 0 |
Definition at line 80 of file ATmega32C1.h.
| #define SIG_OUTPUT_COMPARE0B_NUM 1 |
Definition at line 81 of file ATmega32C1.h.
| #define SIG_OUTPUT_COMPARE1A_NUM 2 |
Definition at line 82 of file ATmega32C1.h.
| #define SIG_OUTPUT_COMPARE1B_NUM 3 |
Definition at line 83 of file ATmega32C1.h.
| #define SIG_OUTPUT_COMPARE_TOTAL_NUM 4 |
Definition at line 84 of file ATmega32C1.h.
| #define SIG_OVERFLOW0_NUM 0 |
Definition at line 75 of file ATmega32C1.h.
| #define SIG_OVERFLOW1_NUM 1 |
Definition at line 76 of file ATmega32C1.h.
| #define SIG_OVERFLOW_TOTAL_NUM 2 |
Definition at line 77 of file ATmega32C1.h.
| #define SIGRD_REG SPMCSR |
Definition at line 919 of file ATmega32C1.h.
| #define SIT0_REG CANSIT2 |
Definition at line 580 of file ATmega32C1.h.
| #define SIT1_REG CANSIT2 |
Definition at line 581 of file ATmega32C1.h.
| #define SIT2_REG CANSIT2 |
Definition at line 582 of file ATmega32C1.h.
| #define SIT3_REG CANSIT2 |
Definition at line 583 of file ATmega32C1.h.
| #define SIT4_REG CANSIT2 |
Definition at line 584 of file ATmega32C1.h.
| #define SIT5_REG CANSIT2 |
Definition at line 585 of file ATmega32C1.h.
| #define SJW0_REG CANBT2 |
Definition at line 927 of file ATmega32C1.h.
| #define SJW1_REG CANBT2 |
Definition at line 928 of file ATmega32C1.h.
| #define SM0_REG SMCR |
Definition at line 747 of file ATmega32C1.h.
| #define SM1_REG SMCR |
Definition at line 748 of file ATmega32C1.h.
| #define SM2_REG SMCR |
Definition at line 749 of file ATmega32C1.h.
| #define SMP_REG CANBT3 |
Definition at line 931 of file ATmega32C1.h.
| #define SP0_REG SPL |
Definition at line 716 of file ATmega32C1.h.
| #define SP10_REG SPH |
Definition at line 678 of file ATmega32C1.h.
| #define SP11_REG SPH |
Definition at line 679 of file ATmega32C1.h.
| #define SP12_REG SPH |
Definition at line 680 of file ATmega32C1.h.
| #define SP13_REG SPH |
Definition at line 681 of file ATmega32C1.h.
| #define SP14_REG SPH |
Definition at line 682 of file ATmega32C1.h.
| #define SP15_REG SPH |
Definition at line 683 of file ATmega32C1.h.
| #define SP1_REG SPL |
Definition at line 717 of file ATmega32C1.h.
| #define SP2_REG SPL |
Definition at line 718 of file ATmega32C1.h.
| #define SP3_REG SPL |
Definition at line 719 of file ATmega32C1.h.
| #define SP4_REG SPL |
Definition at line 720 of file ATmega32C1.h.
| #define SP5_REG SPL |
Definition at line 721 of file ATmega32C1.h.
| #define SP6_REG SPL |
Definition at line 722 of file ATmega32C1.h.
| #define SP7_REG SPL |
Definition at line 723 of file ATmega32C1.h.
| #define SP8_REG SPH |
Definition at line 676 of file ATmega32C1.h.
| #define SP9_REG SPH |
Definition at line 677 of file ATmega32C1.h.
| #define SPDR0_REG SPDR |
Definition at line 184 of file ATmega32C1.h.
| #define SPDR1_REG SPDR |
Definition at line 185 of file ATmega32C1.h.
| #define SPDR2_REG SPDR |
Definition at line 186 of file ATmega32C1.h.
| #define SPDR3_REG SPDR |
Definition at line 187 of file ATmega32C1.h.
| #define SPDR4_REG SPDR |
Definition at line 188 of file ATmega32C1.h.
| #define SPDR5_REG SPDR |
Definition at line 189 of file ATmega32C1.h.
| #define SPDR6_REG SPDR |
Definition at line 190 of file ATmega32C1.h.
| #define SPDR7_REG SPDR |
Definition at line 191 of file ATmega32C1.h.
| #define SPE_REG SPCR |
Definition at line 610 of file ATmega32C1.h.
| #define SPI2X_REG SPSR |
Definition at line 194 of file ATmega32C1.h.
| #define SPIE_REG SPCR |
Definition at line 611 of file ATmega32C1.h.
| #define SPIF_REG SPSR |
Definition at line 196 of file ATmega32C1.h.
| #define SPIPS_REG MCUCR |
Definition at line 813 of file ATmega32C1.h.
| #define SPMEN_REG SPMCSR |
Definition at line 914 of file ATmega32C1.h.
| #define SPMIE_REG SPMCSR |
Definition at line 921 of file ATmega32C1.h.
| #define SPR0_REG SPCR |
Definition at line 604 of file ATmega32C1.h.
| #define SPR1_REG SPCR |
Definition at line 605 of file ATmega32C1.h.
| #define SS_A_BIT 1 |
Definition at line 1169 of file ATmega32C1.h.
| #define SS_A_PORT PORTC |
Definition at line 1168 of file ATmega32C1.h.
| #define SS_BIT 3 |
Definition at line 1243 of file ATmega32C1.h.
| #define SS_PORT PORTD |
Definition at line 1242 of file ATmega32C1.h.
| #define SWRES_REG CANGCON |
Definition at line 262 of file ATmega32C1.h.
| #define SYNTTC_REG CANGCON |
Definition at line 266 of file ATmega32C1.h.
| #define T0_BIT 2 |
Definition at line 1174 of file ATmega32C1.h.
| #define T0_PORT PORTC |
Definition at line 1173 of file ATmega32C1.h.
| #define T1_BIT 3 |
Definition at line 1181 of file ATmega32C1.h.
| #define T1_PORT PORTC |
Definition at line 1180 of file ATmega32C1.h.
| #define T_REG SREG |
Definition at line 394 of file ATmega32C1.h.
| #define TCNT0_0_REG TCNT0 |
Definition at line 562 of file ATmega32C1.h.
| #define TCNT0_1_REG TCNT0 |
Definition at line 563 of file ATmega32C1.h.
| #define TCNT0_2_REG TCNT0 |
Definition at line 564 of file ATmega32C1.h.
| #define TCNT0_3_REG TCNT0 |
Definition at line 565 of file ATmega32C1.h.
| #define TCNT0_4_REG TCNT0 |
Definition at line 566 of file ATmega32C1.h.
| #define TCNT0_5_REG TCNT0 |
Definition at line 567 of file ATmega32C1.h.
| #define TCNT0_6_REG TCNT0 |
Definition at line 568 of file ATmega32C1.h.
| #define TCNT0_7_REG TCNT0 |
Definition at line 569 of file ATmega32C1.h.
| #define TCNT1H0_REG TCNT1H |
Definition at line 287 of file ATmega32C1.h.
| #define TCNT1H1_REG TCNT1H |
Definition at line 288 of file ATmega32C1.h.
| #define TCNT1H2_REG TCNT1H |
Definition at line 289 of file ATmega32C1.h.
| #define TCNT1H3_REG TCNT1H |
Definition at line 290 of file ATmega32C1.h.
| #define TCNT1H4_REG TCNT1H |
Definition at line 291 of file ATmega32C1.h.
| #define TCNT1H5_REG TCNT1H |
Definition at line 292 of file ATmega32C1.h.
| #define TCNT1H6_REG TCNT1H |
Definition at line 293 of file ATmega32C1.h.
| #define TCNT1H7_REG TCNT1H |
Definition at line 294 of file ATmega32C1.h.
| #define TCNT1L0_REG TCNT1L |
Definition at line 889 of file ATmega32C1.h.
| #define TCNT1L1_REG TCNT1L |
Definition at line 890 of file ATmega32C1.h.
| #define TCNT1L2_REG TCNT1L |
Definition at line 891 of file ATmega32C1.h.
| #define TCNT1L3_REG TCNT1L |
Definition at line 892 of file ATmega32C1.h.
| #define TCNT1L4_REG TCNT1L |
Definition at line 893 of file ATmega32C1.h.
| #define TCNT1L5_REG TCNT1L |
Definition at line 894 of file ATmega32C1.h.
| #define TCNT1L6_REG TCNT1L |
Definition at line 895 of file ATmega32C1.h.
| #define TCNT1L7_REG TCNT1L |
Definition at line 896 of file ATmega32C1.h.
| #define TEST_REG CANGCON |
Definition at line 264 of file ATmega32C1.h.
| #define TIMER0_AVAILABLE |
Definition at line 67 of file ATmega32C1.h.
| #define TIMER0_PRESCALER_DIV_0 0 |
Definition at line 28 of file ATmega32C1.h.
| #define TIMER0_PRESCALER_DIV_1 1 |
Definition at line 29 of file ATmega32C1.h.
| #define TIMER0_PRESCALER_DIV_1024 5 |
Definition at line 33 of file ATmega32C1.h.
| #define TIMER0_PRESCALER_DIV_256 4 |
Definition at line 32 of file ATmega32C1.h.
| #define TIMER0_PRESCALER_DIV_64 3 |
Definition at line 31 of file ATmega32C1.h.
| #define TIMER0_PRESCALER_DIV_8 2 |
Definition at line 30 of file ATmega32C1.h.
| #define TIMER0_PRESCALER_DIV_FALL 6 |
Definition at line 34 of file ATmega32C1.h.
| #define TIMER0_PRESCALER_DIV_RISE 7 |
Definition at line 35 of file ATmega32C1.h.
| #define TIMER0_PRESCALER_REG_0 0 |
Definition at line 37 of file ATmega32C1.h.
| #define TIMER0_PRESCALER_REG_1 1 |
Definition at line 38 of file ATmega32C1.h.
| #define TIMER0_PRESCALER_REG_2 8 |
Definition at line 39 of file ATmega32C1.h.
| #define TIMER0_PRESCALER_REG_3 64 |
Definition at line 40 of file ATmega32C1.h.
| #define TIMER0_PRESCALER_REG_4 256 |
Definition at line 41 of file ATmega32C1.h.
| #define TIMER0_PRESCALER_REG_5 1024 |
Definition at line 42 of file ATmega32C1.h.
| #define TIMER0_PRESCALER_REG_6 -1 |
Definition at line 43 of file ATmega32C1.h.
| #define TIMER0_PRESCALER_REG_7 -2 |
Definition at line 44 of file ATmega32C1.h.
| #define TIMER0A_AVAILABLE |
Definition at line 68 of file ATmega32C1.h.
| #define TIMER0B_AVAILABLE |
Definition at line 69 of file ATmega32C1.h.
| #define TIMER1_AVAILABLE |
Definition at line 70 of file ATmega32C1.h.
| #define TIMER1_PRESCALER_DIV_0 0 |
Definition at line 47 of file ATmega32C1.h.
| #define TIMER1_PRESCALER_DIV_1 1 |
Definition at line 48 of file ATmega32C1.h.
| #define TIMER1_PRESCALER_DIV_1024 5 |
Definition at line 52 of file ATmega32C1.h.
| #define TIMER1_PRESCALER_DIV_256 4 |
Definition at line 51 of file ATmega32C1.h.
| #define TIMER1_PRESCALER_DIV_64 3 |
Definition at line 50 of file ATmega32C1.h.
| #define TIMER1_PRESCALER_DIV_8 2 |
Definition at line 49 of file ATmega32C1.h.
| #define TIMER1_PRESCALER_DIV_FALL 6 |
Definition at line 53 of file ATmega32C1.h.
| #define TIMER1_PRESCALER_DIV_RISE 7 |
Definition at line 54 of file ATmega32C1.h.
| #define TIMER1_PRESCALER_REG_0 0 |
Definition at line 56 of file ATmega32C1.h.
| #define TIMER1_PRESCALER_REG_1 1 |
Definition at line 57 of file ATmega32C1.h.
| #define TIMER1_PRESCALER_REG_2 8 |
Definition at line 58 of file ATmega32C1.h.
| #define TIMER1_PRESCALER_REG_3 64 |
Definition at line 59 of file ATmega32C1.h.
| #define TIMER1_PRESCALER_REG_4 256 |
Definition at line 60 of file ATmega32C1.h.
| #define TIMER1_PRESCALER_REG_5 1024 |
Definition at line 61 of file ATmega32C1.h.
| #define TIMER1_PRESCALER_REG_6 -1 |
Definition at line 62 of file ATmega32C1.h.
| #define TIMER1_PRESCALER_REG_7 -2 |
Definition at line 63 of file ATmega32C1.h.
| #define TIMER1A_AVAILABLE |
Definition at line 71 of file ATmega32C1.h.
| #define TIMER1B_AVAILABLE |
Definition at line 72 of file ATmega32C1.h.
| #define TOIE0_REG TIMSK0 |
Definition at line 978 of file ATmega32C1.h.
| #define TOIE1_REG TIMSK1 |
Definition at line 983 of file ATmega32C1.h.
| #define TOV0_REG TIFR0 |
Definition at line 1104 of file ATmega32C1.h.
| #define TOV1_REG TIFR1 |
Definition at line 614 of file ATmega32C1.h.
| #define TSM_REG GTCCR |
Definition at line 662 of file ATmega32C1.h.
| #define TTC_REG CANGCON |
Definition at line 267 of file ATmega32C1.h.
| #define TXBSY_REG CANGSTA |
Definition at line 258 of file ATmega32C1.h.
| #define TXCAN_BIT 2 |
Definition at line 1176 of file ATmega32C1.h.
| #define TXCAN_PORT PORTC |
Definition at line 1175 of file ATmega32C1.h.
| #define TXD_BIT 3 |
Definition at line 1237 of file ATmega32C1.h.
| #define TXD_PORT PORTD |
Definition at line 1236 of file ATmega32C1.h.
| #define TXLIN_BIT 3 |
Definition at line 1239 of file ATmega32C1.h.
| #define TXLIN_PORT PORTD |
Definition at line 1238 of file ATmega32C1.h.
| #define TXOK_REG CANSTMOB |
Definition at line 828 of file ATmega32C1.h.
| #define V_REG SREG |
Definition at line 391 of file ATmega32C1.h.
| #define WCOL_REG SPSR |
Definition at line 195 of file ATmega32C1.h.
| #define WDCE_REG WDTCSR |
Definition at line 142 of file ATmega32C1.h.
| #define WDE_REG WDTCSR |
Definition at line 141 of file ATmega32C1.h.
| #define WDIE_REG WDTCSR |
Definition at line 144 of file ATmega32C1.h.
| #define WDIF_REG WDTCSR |
Definition at line 145 of file ATmega32C1.h.
| #define WDP0_REG WDTCSR |
Definition at line 138 of file ATmega32C1.h.
| #define WDP1_REG WDTCSR |
Definition at line 139 of file ATmega32C1.h.
| #define WDP2_REG WDTCSR |
Definition at line 140 of file ATmega32C1.h.
| #define WDP3_REG WDTCSR |
Definition at line 143 of file ATmega32C1.h.
| #define WDRF_REG MCUSR |
Definition at line 729 of file ATmega32C1.h.
| #define WGM00_REG TCCR0A |
Definition at line 596 of file ATmega32C1.h.
| #define WGM01_REG TCCR0A |
Definition at line 597 of file ATmega32C1.h.
| #define WGM02_REG TCCR0B |
Definition at line 591 of file ATmega32C1.h.
| #define WGM10_REG TCCR1A |
Definition at line 457 of file ATmega32C1.h.
| #define WGM11_REG TCCR1A |
Definition at line 458 of file ATmega32C1.h.
| #define WGM12_REG TCCR1B |
Definition at line 472 of file ATmega32C1.h.
| #define WGM13_REG TCCR1B |
Definition at line 473 of file ATmega32C1.h.
| #define XTAL1_BIT 1 |
Definition at line 1293 of file ATmega32C1.h.
| #define XTAL1_PORT PORTE |
Definition at line 1292 of file ATmega32C1.h.
| #define XTAL2_BIT 2 |
Definition at line 1300 of file ATmega32C1.h.
| #define XTAL2_PORT PORTE |
Definition at line 1299 of file ATmega32C1.h.
| #define Z_REG SREG |
Definition at line 389 of file ATmega32C1.h.
1.5.6