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Defines | |
| #define | TIMER0_PRESCALER_DIV_0 0 |
| #define | TIMER0_PRESCALER_DIV_1 1 |
| #define | TIMER0_PRESCALER_DIV_8 2 |
| #define | TIMER0_PRESCALER_DIV_64 3 |
| #define | TIMER0_PRESCALER_DIV_256 4 |
| #define | TIMER0_PRESCALER_DIV_1024 5 |
| #define | TIMER0_PRESCALER_DIV_FALL 6 |
| #define | TIMER0_PRESCALER_DIV_RISE 7 |
| #define | TIMER0_PRESCALER_REG_0 0 |
| #define | TIMER0_PRESCALER_REG_1 1 |
| #define | TIMER0_PRESCALER_REG_2 8 |
| #define | TIMER0_PRESCALER_REG_3 64 |
| #define | TIMER0_PRESCALER_REG_4 256 |
| #define | TIMER0_PRESCALER_REG_5 1024 |
| #define | TIMER0_PRESCALER_REG_6 -1 |
| #define | TIMER0_PRESCALER_REG_7 -2 |
| #define | TIMER1_PRESCALER_DIV_0 0 |
| #define | TIMER1_PRESCALER_DIV_1 1 |
| #define | TIMER1_PRESCALER_DIV_8 2 |
| #define | TIMER1_PRESCALER_DIV_64 3 |
| #define | TIMER1_PRESCALER_DIV_256 4 |
| #define | TIMER1_PRESCALER_DIV_1024 5 |
| #define | TIMER1_PRESCALER_DIV_FALL 6 |
| #define | TIMER1_PRESCALER_DIV_RISE 7 |
| #define | TIMER1_PRESCALER_REG_0 0 |
| #define | TIMER1_PRESCALER_REG_1 1 |
| #define | TIMER1_PRESCALER_REG_2 8 |
| #define | TIMER1_PRESCALER_REG_3 64 |
| #define | TIMER1_PRESCALER_REG_4 256 |
| #define | TIMER1_PRESCALER_REG_5 1024 |
| #define | TIMER1_PRESCALER_REG_6 -1 |
| #define | TIMER1_PRESCALER_REG_7 -2 |
| #define | TIMER2_PRESCALER_DIV_0 0 |
| #define | TIMER2_PRESCALER_DIV_1 1 |
| #define | TIMER2_PRESCALER_DIV_8 2 |
| #define | TIMER2_PRESCALER_DIV_32 3 |
| #define | TIMER2_PRESCALER_DIV_64 4 |
| #define | TIMER2_PRESCALER_DIV_128 5 |
| #define | TIMER2_PRESCALER_DIV_256 6 |
| #define | TIMER2_PRESCALER_DIV_1024 7 |
| #define | TIMER2_PRESCALER_REG_0 0 |
| #define | TIMER2_PRESCALER_REG_1 1 |
| #define | TIMER2_PRESCALER_REG_2 8 |
| #define | TIMER2_PRESCALER_REG_3 32 |
| #define | TIMER2_PRESCALER_REG_4 64 |
| #define | TIMER2_PRESCALER_REG_5 128 |
| #define | TIMER2_PRESCALER_REG_6 256 |
| #define | TIMER2_PRESCALER_REG_7 1024 |
| #define | TIMER0_AVAILABLE |
| #define | TIMER1_AVAILABLE |
| #define | TIMER1A_AVAILABLE |
| #define | TIMER1B_AVAILABLE |
| #define | TIMER2_AVAILABLE |
| #define | SIG_OVERFLOW0_NUM 0 |
| #define | SIG_OVERFLOW1_NUM 1 |
| #define | SIG_OVERFLOW2_NUM 2 |
| #define | SIG_OVERFLOW_TOTAL_NUM 3 |
| #define | SIG_OUTPUT_COMPARE1A_NUM 0 |
| #define | SIG_OUTPUT_COMPARE1B_NUM 1 |
| #define | SIG_OUTPUT_COMPARE2_NUM 2 |
| #define | SIG_OUTPUT_COMPARE_TOTAL_NUM 3 |
| #define | PWM1A_NUM 0 |
| #define | PWM1B_NUM 1 |
| #define | PWM2_NUM 2 |
| #define | PWM_TOTAL_NUM 3 |
| #define | SIG_INPUT_CAPTURE1_NUM 0 |
| #define | SIG_INPUT_CAPTURE_TOTAL_NUM 1 |
| #define | WDP0_REG WDTCR |
| #define | WDP1_REG WDTCR |
| #define | WDP2_REG WDTCR |
| #define | WDE_REG WDTCR |
| #define | WDTOE_REG WDTCR |
| #define | INT0_REG GIMSK |
| #define | INT1_REG GIMSK |
| #define | ICR1H0_REG ICR1H |
| #define | ICR1H1_REG ICR1H |
| #define | ICR1H2_REG ICR1H |
| #define | ICR1H3_REG ICR1H |
| #define | ICR1H4_REG ICR1H |
| #define | ICR1H5_REG ICR1H |
| #define | ICR1H6_REG ICR1H |
| #define | ICR1H7_REG ICR1H |
| #define | MUX0_REG ADMUX |
| #define | MUX1_REG ADMUX |
| #define | MUX2_REG ADMUX |
| #define | MUX3_REG ADMUX |
| #define | MUX4_REG ADMUX |
| #define | ADLAR_REG ADMUX |
| #define | REFS0_REG ADMUX |
| #define | REFS1_REG ADMUX |
| #define | CS00_REG TCCR0 |
| #define | CS01_REG TCCR0 |
| #define | CS02_REG TCCR0 |
| #define | C_REG SREG |
| #define | Z_REG SREG |
| #define | N_REG SREG |
| #define | V_REG SREG |
| #define | S_REG SREG |
| #define | H_REG SREG |
| #define | T_REG SREG |
| #define | I_REG SREG |
| #define | DDB0_REG DDRB |
| #define | DDB1_REG DDRB |
| #define | DDB2_REG DDRB |
| #define | DDB3_REG DDRB |
| #define | DDB4_REG DDRB |
| #define | DDB5_REG DDRB |
| #define | DDB6_REG DDRB |
| #define | DDB7_REG DDRB |
| #define | SPI2X_REG SPSR |
| #define | WCOL_REG SPSR |
| #define | SPIF_REG SPSR |
| #define | TWD0_REG TWDR |
| #define | TWD1_REG TWDR |
| #define | TWD2_REG TWDR |
| #define | TWD3_REG TWDR |
| #define | TWD4_REG TWDR |
| #define | TWD5_REG TWDR |
| #define | TWD6_REG TWDR |
| #define | TWD7_REG TWDR |
| #define | EEDR0_REG EEDR |
| #define | EEDR1_REG EEDR |
| #define | EEDR2_REG EEDR |
| #define | EEDR3_REG EEDR |
| #define | EEDR4_REG EEDR |
| #define | EEDR5_REG EEDR |
| #define | EEDR6_REG EEDR |
| #define | EEDR7_REG EEDR |
| #define | DDC0_REG DDRC |
| #define | DDC1_REG DDRC |
| #define | DDC2_REG DDRC |
| #define | DDC3_REG DDRC |
| #define | DDC4_REG DDRC |
| #define | DDC5_REG DDRC |
| #define | DDC6_REG DDRC |
| #define | DDC7_REG DDRC |
| #define | DDA0_REG DDRA |
| #define | DDA1_REG DDRA |
| #define | DDA2_REG DDRA |
| #define | DDA3_REG DDRA |
| #define | DDA4_REG DDRA |
| #define | DDA5_REG DDRA |
| #define | DDA6_REG DDRA |
| #define | DDA7_REG DDRA |
| #define | PWM10_REG TCCR1A |
| #define | PWM11_REG TCCR1A |
| #define | FOC1B_REG TCCR1A |
| #define | FOC1A_REG TCCR1A |
| #define | COM1B0_REG TCCR1A |
| #define | COM1B1_REG TCCR1A |
| #define | COM1A0_REG TCCR1A |
| #define | COM1A1_REG TCCR1A |
| #define | DDD0_REG DDRD |
| #define | DDD1_REG DDRD |
| #define | DDD2_REG DDRD |
| #define | DDD3_REG DDRD |
| #define | DDD4_REG DDRD |
| #define | DDD5_REG DDRD |
| #define | DDD6_REG DDRD |
| #define | DDD7_REG DDRD |
| #define | CS10_REG TCCR1B |
| #define | CS11_REG TCCR1B |
| #define | CS12_REG TCCR1B |
| #define | CTC1_REG TCCR1B |
| #define | ICES1_REG TCCR1B |
| #define | ICNC1_REG TCCR1B |
| #define | INTF0_REG GIFR |
| #define | INTF1_REG GIFR |
| #define | TOIE0_REG TIMSK |
| #define | TOIE1_REG TIMSK |
| #define | OCIE1B_REG TIMSK |
| #define | OCIE1A_REG TIMSK |
| #define | TICIE1_REG TIMSK |
| #define | TOIE2_REG TIMSK |
| #define | OCIE2_REG TIMSK |
| #define | MPCM_REG UCSRA |
| #define | U2X_REG UCSRA |
| #define | OR_REG UCSRA |
| #define | FE_REG UCSRA |
| #define | UDRE_REG UCSRA |
| #define | TXC_REG UCSRA |
| #define | RXC_REG UCSRA |
| #define | SPDR0_REG SPDR |
| #define | SPDR1_REG SPDR |
| #define | SPDR2_REG SPDR |
| #define | SPDR3_REG SPDR |
| #define | SPDR4_REG SPDR |
| #define | SPDR5_REG SPDR |
| #define | SPDR6_REG SPDR |
| #define | SPDR7_REG SPDR |
| #define | TXB8_REG UCSRB |
| #define | RXB8_REG UCSRB |
| #define | CHR9_REG UCSRB |
| #define | TXEN_REG UCSRB |
| #define | RXEN_REG UCSRB |
| #define | UDRIE_REG UCSRB |
| #define | TXCIE_REG UCSRB |
| #define | RXCIE_REG UCSRB |
| #define | PSR10_REG SFIOR |
| #define | PSR2_REG SFIOR |
| #define | PUD_REG SFIOR |
| #define | ACME_REG SFIOR |
| #define | ACIS0_REG ACSR |
| #define | ACIS1_REG ACSR |
| #define | ACIC_REG ACSR |
| #define | ACIE_REG ACSR |
| #define | ACI_REG ACSR |
| #define | ACO_REG ACSR |
| #define | ACBG_REG ACSR |
| #define | ACD_REG ACSR |
| #define | SP8_REG SPH |
| #define | SP9_REG SPH |
| #define | SP10_REG SPH |
| #define | OCR1BL0_REG OCR1BL |
| #define | OCR1BL1_REG OCR1BL |
| #define | OCR1BL2_REG OCR1BL |
| #define | OCR1BL3_REG OCR1BL |
| #define | OCR1BL4_REG OCR1BL |
| #define | OCR1BL5_REG OCR1BL |
| #define | OCR1BL6_REG OCR1BL |
| #define | OCR1BL7_REG OCR1BL |
| #define | UBRRHI0_REG UBRRHI |
| #define | UBRRHI1_REG UBRRHI |
| #define | UBRRHI2_REG UBRRHI |
| #define | UBRRHI3_REG UBRRHI |
| #define | SP0_REG SPL |
| #define | SP1_REG SPL |
| #define | SP2_REG SPL |
| #define | SP3_REG SPL |
| #define | SP4_REG SPL |
| #define | SP5_REG SPL |
| #define | SP6_REG SPL |
| #define | SP7_REG SPL |
| #define | OCR1BH0_REG OCR1BH |
| #define | OCR1BH1_REG OCR1BH |
| #define | OCR1BH2_REG OCR1BH |
| #define | OCR1BH3_REG OCR1BH |
| #define | OCR1BH4_REG OCR1BH |
| #define | OCR1BH5_REG OCR1BH |
| #define | OCR1BH6_REG OCR1BH |
| #define | OCR1BH7_REG OCR1BH |
| #define | PIND0_REG PIND |
| #define | PIND1_REG PIND |
| #define | PIND2_REG PIND |
| #define | PIND3_REG PIND |
| #define | PIND4_REG PIND |
| #define | PIND5_REG PIND |
| #define | PIND6_REG PIND |
| #define | PIND7_REG PIND |
| #define | SPMEN_REG SPMCR |
| #define | PGERS_REG SPMCR |
| #define | PGWRT_REG SPMCR |
| #define | BLBSET_REG SPMCR |
| #define | ASRE_REG SPMCR |
| #define | ASB_REG SPMCR |
| #define | TWBR0_REG TWBR |
| #define | TWBR1_REG TWBR |
| #define | TWBR2_REG TWBR |
| #define | TWBR3_REG TWBR |
| #define | TWBR4_REG TWBR |
| #define | TWBR5_REG TWBR |
| #define | TWBR6_REG TWBR |
| #define | TWBR7_REG TWBR |
| #define | ADCL0_REG ADCL |
| #define | ADCL1_REG ADCL |
| #define | ADCL2_REG ADCL |
| #define | ADCL3_REG ADCL |
| #define | ADCL4_REG ADCL |
| #define | ADCL5_REG ADCL |
| #define | ADCL6_REG ADCL |
| #define | ADCL7_REG ADCL |
| #define | PORF_REG MCUSR |
| #define | EXTRF_REG MCUSR |
| #define | BORF_REG MCUSR |
| #define | WDRF_REG MCUSR |
| #define | EERE_REG EECR |
| #define | EEWE_REG EECR |
| #define | EEMWE_REG EECR |
| #define | EERIE_REG EECR |
| #define | CAL0_REG OSCCAL |
| #define | CAL1_REG OSCCAL |
| #define | CAL2_REG OSCCAL |
| #define | CAL3_REG OSCCAL |
| #define | CAL4_REG OSCCAL |
| #define | CAL5_REG OSCCAL |
| #define | CAL6_REG OSCCAL |
| #define | CAL7_REG OSCCAL |
| #define | TCNT1L0_REG TCNT1L |
| #define | TCNT1L1_REG TCNT1L |
| #define | TCNT1L2_REG TCNT1L |
| #define | TCNT1L3_REG TCNT1L |
| #define | TCNT1L4_REG TCNT1L |
| #define | TCNT1L5_REG TCNT1L |
| #define | TCNT1L6_REG TCNT1L |
| #define | TCNT1L7_REG TCNT1L |
| #define | PORTB0_REG PORTB |
| #define | PORTB1_REG PORTB |
| #define | PORTB2_REG PORTB |
| #define | PORTB3_REG PORTB |
| #define | PORTB4_REG PORTB |
| #define | PORTB5_REG PORTB |
| #define | PORTB6_REG PORTB |
| #define | PORTB7_REG PORTB |
| #define | PORTD0_REG PORTD |
| #define | PORTD1_REG PORTD |
| #define | PORTD2_REG PORTD |
| #define | PORTD3_REG PORTD |
| #define | PORTD4_REG PORTD |
| #define | PORTD5_REG PORTD |
| #define | PORTD6_REG PORTD |
| #define | PORTD7_REG PORTD |
| #define | TCNT1H0_REG TCNT1H |
| #define | TCNT1H1_REG TCNT1H |
| #define | TCNT1H2_REG TCNT1H |
| #define | TCNT1H3_REG TCNT1H |
| #define | TCNT1H4_REG TCNT1H |
| #define | TCNT1H5_REG TCNT1H |
| #define | TCNT1H6_REG TCNT1H |
| #define | TCNT1H7_REG TCNT1H |
| #define | PORTC0_REG PORTC |
| #define | PORTC1_REG PORTC |
| #define | PORTC2_REG PORTC |
| #define | PORTC3_REG PORTC |
| #define | PORTC4_REG PORTC |
| #define | PORTC5_REG PORTC |
| #define | PORTC6_REG PORTC |
| #define | PORTC7_REG PORTC |
| #define | ADCH0_REG ADCH |
| #define | ADCH1_REG ADCH |
| #define | ADCH2_REG ADCH |
| #define | ADCH3_REG ADCH |
| #define | ADCH4_REG ADCH |
| #define | ADCH5_REG ADCH |
| #define | ADCH6_REG ADCH |
| #define | ADCH7_REG ADCH |
| #define | PORTA0_REG PORTA |
| #define | PORTA1_REG PORTA |
| #define | PORTA2_REG PORTA |
| #define | PORTA3_REG PORTA |
| #define | PORTA4_REG PORTA |
| #define | PORTA5_REG PORTA |
| #define | PORTA6_REG PORTA |
| #define | PORTA7_REG PORTA |
| #define | TWIE_REG TWCR |
| #define | TWEN_REG TWCR |
| #define | TWWC_REG TWCR |
| #define | TWSTO_REG TWCR |
| #define | TWSTA_REG TWCR |
| #define | TWEA_REG TWCR |
| #define | TWINT_REG TWCR |
| #define | TCNT00_REG TCNT0 |
| #define | TCNT01_REG TCNT0 |
| #define | TCNT02_REG TCNT0 |
| #define | TCNT03_REG TCNT0 |
| #define | TCNT04_REG TCNT0 |
| #define | TCNT05_REG TCNT0 |
| #define | TCNT06_REG TCNT0 |
| #define | TCNT07_REG TCNT0 |
| #define | UDR0_REG UDR |
| #define | UDR1_REG UDR |
| #define | UDR2_REG UDR |
| #define | UDR3_REG UDR |
| #define | UDR4_REG UDR |
| #define | UDR5_REG UDR |
| #define | UDR6_REG UDR |
| #define | UDR7_REG UDR |
| #define | TWGCE_REG TWAR |
| #define | TWA0_REG TWAR |
| #define | TWA1_REG TWAR |
| #define | TWA2_REG TWAR |
| #define | TWA3_REG TWAR |
| #define | TWA4_REG TWAR |
| #define | TWA5_REG TWAR |
| #define | TWA6_REG TWAR |
| #define | UBRR0_REG UBRR |
| #define | UBRR1_REG UBRR |
| #define | UBRR2_REG UBRR |
| #define | UBRR3_REG UBRR |
| #define | UBRR4_REG UBRR |
| #define | UBRR5_REG UBRR |
| #define | UBRR6_REG UBRR |
| #define | UBRR7_REG UBRR |
| #define | ADPS0_REG ADCSR |
| #define | ADPS1_REG ADCSR |
| #define | ADPS2_REG ADCSR |
| #define | ADIE_REG ADCSR |
| #define | ADIF_REG ADCSR |
| #define | ADFR_REG ADCSR |
| #define | ADSC_REG ADCSR |
| #define | ADEN_REG ADCSR |
| #define | CS20_REG TCCR2 |
| #define | CS21_REG TCCR2 |
| #define | CS22_REG TCCR2 |
| #define | WGM21_REG TCCR2 |
| #define | COM20_REG TCCR2 |
| #define | COM21_REG TCCR2 |
| #define | WGM20_REG TCCR2 |
| #define | FOC2_REG TCCR2 |
| #define | TOV0_REG TIFR |
| #define | TOV1_REG TIFR |
| #define | OCF1B_REG TIFR |
| #define | OCF1A_REG TIFR |
| #define | ICF1_REG TIFR |
| #define | TOV2_REG TIFR |
| #define | OCF2_REG TIFR |
| #define | EEAR8_REG EEARH |
| #define | TCNT2_0_REG TCNT2 |
| #define | TCNT2_1_REG TCNT2 |
| #define | TCNT2_2_REG TCNT2 |
| #define | TCNT2_3_REG TCNT2 |
| #define | TCNT2_4_REG TCNT2 |
| #define | TCNT2_5_REG TCNT2 |
| #define | TCNT2_6_REG TCNT2 |
| #define | TCNT2_7_REG TCNT2 |
| #define | EEAR0_REG EEARL |
| #define | EEAR1_REG EEARL |
| #define | EEAR2_REG EEARL |
| #define | EEAR3_REG EEARL |
| #define | EEAR4_REG EEARL |
| #define | EEAR5_REG EEARL |
| #define | EEAR6_REG EEARL |
| #define | EEAR7_REG EEARL |
| #define | TWS3_REG TWSR |
| #define | TWS4_REG TWSR |
| #define | TWS5_REG TWSR |
| #define | TWS6_REG TWSR |
| #define | TWS7_REG TWSR |
| #define | PINC0_REG PINC |
| #define | PINC1_REG PINC |
| #define | PINC2_REG PINC |
| #define | PINC3_REG PINC |
| #define | PINC4_REG PINC |
| #define | PINC5_REG PINC |
| #define | PINC6_REG PINC |
| #define | PINC7_REG PINC |
| #define | PINB0_REG PINB |
| #define | PINB1_REG PINB |
| #define | PINB2_REG PINB |
| #define | PINB3_REG PINB |
| #define | PINB4_REG PINB |
| #define | PINB5_REG PINB |
| #define | PINB6_REG PINB |
| #define | PINB7_REG PINB |
| #define | PINA0_REG PINA |
| #define | PINA1_REG PINA |
| #define | PINA2_REG PINA |
| #define | PINA3_REG PINA |
| #define | PINA4_REG PINA |
| #define | PINA5_REG PINA |
| #define | PINA6_REG PINA |
| #define | PINA7_REG PINA |
| #define | ISC00_REG MCUCR |
| #define | ISC01_REG MCUCR |
| #define | ISC10_REG MCUCR |
| #define | ISC11_REG MCUCR |
| #define | SM0_REG MCUCR |
| #define | SM1_REG MCUCR |
| #define | SE_REG MCUCR |
| #define | OCR1AH0_REG OCR1AH |
| #define | OCR1AH1_REG OCR1AH |
| #define | OCR1AH2_REG OCR1AH |
| #define | OCR1AH3_REG OCR1AH |
| #define | OCR1AH4_REG OCR1AH |
| #define | OCR1AH5_REG OCR1AH |
| #define | OCR1AH6_REG OCR1AH |
| #define | OCR1AH7_REG OCR1AH |
| #define | OCR1AL0_REG OCR1AL |
| #define | OCR1AL1_REG OCR1AL |
| #define | OCR1AL2_REG OCR1AL |
| #define | OCR1AL3_REG OCR1AL |
| #define | OCR1AL4_REG OCR1AL |
| #define | OCR1AL5_REG OCR1AL |
| #define | OCR1AL6_REG OCR1AL |
| #define | OCR1AL7_REG OCR1AL |
| #define | SPR0_REG SPCR |
| #define | SPR1_REG SPCR |
| #define | CPHA_REG SPCR |
| #define | CPOL_REG SPCR |
| #define | MSTR_REG SPCR |
| #define | DORD_REG SPCR |
| #define | SPE_REG SPCR |
| #define | SPIE_REG SPCR |
| #define | TCR2UB_REG ASSR |
| #define | OCR2UB_REG ASSR |
| #define | TCN2UB_REG ASSR |
| #define | AS2_REG ASSR |
| #define | OCR2_0_REG OCR2 |
| #define | OCR2_1_REG OCR2 |
| #define | OCR2_2_REG OCR2 |
| #define | OCR2_3_REG OCR2 |
| #define | OCR2_4_REG OCR2 |
| #define | OCR2_5_REG OCR2 |
| #define | OCR2_6_REG OCR2 |
| #define | OCR2_7_REG OCR2 |
| #define | ICR1L0_REG ICR1L |
| #define | ICR1L1_REG ICR1L |
| #define | ICR1L2_REG ICR1L |
| #define | ICR1L3_REG ICR1L |
| #define | ICR1L4_REG ICR1L |
| #define | ICR1L5_REG ICR1L |
| #define | ICR1L6_REG ICR1L |
| #define | ICR1L7_REG ICR1L |
| #define | ADC0_PORT PORTA |
| #define | ADC0_BIT 0 |
| #define | ADC1_PORT PORTA |
| #define | ADC1_BIT 1 |
| #define | ADC2_PORT PORTA |
| #define | ADC2_BIT 2 |
| #define | ADC3_PORT PORTA |
| #define | ADC3_BIT 3 |
| #define | ADC4_PORT PORTA |
| #define | ADC4_BIT 4 |
| #define | ADc5_PORT PORTA |
| #define | ADc5_BIT 5 |
| #define | ADC6_PORT PORTA |
| #define | ADC6_BIT 6 |
| #define | ADC7_PORT PORTA |
| #define | ADC7_BIT 7 |
| #define | T0_PORT PORTB |
| #define | T0_BIT 0 |
| #define | T1_PORT PORTB |
| #define | T1_BIT 1 |
| #define | AIN0_PORT PORTB |
| #define | AIN0_BIT 2 |
| #define | AIN1_PORT PORTB |
| #define | AIN1_BIT 3 |
| #define | SS_PORT PORTB |
| #define | SS_BIT 4 |
| #define | MOSI_PORT PORTB |
| #define | MOSI_BIT 5 |
| #define | MISO_PORT PORTB |
| #define | MISO_BIT 6 |
| #define | SCL_PORT PORTC |
| #define | SCL_BIT 0 |
| #define | SDA_PORT PORTC |
| #define | SDA_BIT 1 |
| #define | TOSC1_PORT PORTC |
| #define | TOSC1_BIT 6 |
| #define | TOSC2_PORT PORTC |
| #define | TOSC2_BIT 7 |
| #define | RXD_PORT PORTD |
| #define | RXD_BIT 0 |
| #define | TXD_PORT PORTD |
| #define | TXD_BIT 1 |
| #define | INT0_PORT PORTD |
| #define | INT0_BIT 2 |
| #define | INT1_PORT PORTD |
| #define | INT1_BIT 3 |
| #define | OC1B_PORT PORTD |
| #define | OC1B_BIT 4 |
| #define | OC1A_PORT PORTD |
| #define | OC1A_BIT 5 |
| #define | ICP_PORT PORTD |
| #define | ICP_BIT 6 |
| #define | OC2_PORT PORTD |
| #define | OC2_BIT 7 |
| #define ACBG_REG ACSR |
Definition at line 299 of file ATmega163.h.
| #define ACD_REG ACSR |
Definition at line 300 of file ATmega163.h.
| #define ACI_REG ACSR |
Definition at line 297 of file ATmega163.h.
| #define ACIC_REG ACSR |
Definition at line 295 of file ATmega163.h.
| #define ACIE_REG ACSR |
Definition at line 296 of file ATmega163.h.
| #define ACIS0_REG ACSR |
Definition at line 293 of file ATmega163.h.
| #define ACIS1_REG ACSR |
Definition at line 294 of file ATmega163.h.
| #define ACME_REG SFIOR |
Definition at line 290 of file ATmega163.h.
| #define ACO_REG ACSR |
Definition at line 298 of file ATmega163.h.
| #define ADC0_BIT 0 |
Definition at line 678 of file ATmega163.h.
| #define ADC0_PORT PORTA |
Definition at line 677 of file ATmega163.h.
| #define ADC1_BIT 1 |
Definition at line 681 of file ATmega163.h.
| #define ADC1_PORT PORTA |
Definition at line 680 of file ATmega163.h.
| #define ADC2_BIT 2 |
Definition at line 684 of file ATmega163.h.
| #define ADC2_PORT PORTA |
Definition at line 683 of file ATmega163.h.
| #define ADC3_BIT 3 |
Definition at line 687 of file ATmega163.h.
| #define ADC3_PORT PORTA |
Definition at line 686 of file ATmega163.h.
| #define ADC4_BIT 4 |
Definition at line 690 of file ATmega163.h.
| #define ADC4_PORT PORTA |
Definition at line 689 of file ATmega163.h.
| #define ADc5_BIT 5 |
Definition at line 693 of file ATmega163.h.
| #define ADc5_PORT PORTA |
Definition at line 692 of file ATmega163.h.
| #define ADC6_BIT 6 |
Definition at line 696 of file ATmega163.h.
| #define ADC6_PORT PORTA |
Definition at line 695 of file ATmega163.h.
| #define ADC7_BIT 7 |
Definition at line 699 of file ATmega163.h.
| #define ADC7_PORT PORTA |
Definition at line 698 of file ATmega163.h.
| #define ADCH0_REG ADCH |
Definition at line 454 of file ATmega163.h.
| #define ADCH1_REG ADCH |
Definition at line 455 of file ATmega163.h.
| #define ADCH2_REG ADCH |
Definition at line 456 of file ATmega163.h.
| #define ADCH3_REG ADCH |
Definition at line 457 of file ATmega163.h.
| #define ADCH4_REG ADCH |
Definition at line 458 of file ATmega163.h.
| #define ADCH5_REG ADCH |
Definition at line 459 of file ATmega163.h.
| #define ADCH6_REG ADCH |
Definition at line 460 of file ATmega163.h.
| #define ADCH7_REG ADCH |
Definition at line 461 of file ATmega163.h.
| #define ADCL0_REG ADCL |
Definition at line 372 of file ATmega163.h.
| #define ADCL1_REG ADCL |
Definition at line 373 of file ATmega163.h.
| #define ADCL2_REG ADCL |
Definition at line 374 of file ATmega163.h.
| #define ADCL3_REG ADCL |
Definition at line 375 of file ATmega163.h.
| #define ADCL4_REG ADCL |
Definition at line 376 of file ATmega163.h.
| #define ADCL5_REG ADCL |
Definition at line 377 of file ATmega163.h.
| #define ADCL6_REG ADCL |
Definition at line 378 of file ATmega163.h.
| #define ADCL7_REG ADCL |
Definition at line 379 of file ATmega163.h.
| #define ADEN_REG ADCSR |
Definition at line 530 of file ATmega163.h.
| #define ADFR_REG ADCSR |
Definition at line 528 of file ATmega163.h.
| #define ADIE_REG ADCSR |
Definition at line 526 of file ATmega163.h.
| #define ADIF_REG ADCSR |
Definition at line 527 of file ATmega163.h.
| #define ADLAR_REG ADMUX |
Definition at line 142 of file ATmega163.h.
| #define ADPS0_REG ADCSR |
Definition at line 523 of file ATmega163.h.
| #define ADPS1_REG ADCSR |
Definition at line 524 of file ATmega163.h.
| #define ADPS2_REG ADCSR |
Definition at line 525 of file ATmega163.h.
| #define ADSC_REG ADCSR |
Definition at line 529 of file ATmega163.h.
| #define AIN0_BIT 2 |
Definition at line 708 of file ATmega163.h.
| #define AIN0_PORT PORTB |
Definition at line 707 of file ATmega163.h.
| #define AIN1_BIT 3 |
Definition at line 711 of file ATmega163.h.
| #define AIN1_PORT PORTB |
Definition at line 710 of file ATmega163.h.
| #define AS2_REG ASSR |
Definition at line 654 of file ATmega163.h.
| #define ASB_REG SPMCR |
Definition at line 359 of file ATmega163.h.
| #define ASRE_REG SPMCR |
Definition at line 358 of file ATmega163.h.
| #define BLBSET_REG SPMCR |
Definition at line 357 of file ATmega163.h.
| #define BORF_REG MCUSR |
Definition at line 384 of file ATmega163.h.
| #define C_REG SREG |
Definition at line 152 of file ATmega163.h.
| #define CAL0_REG OSCCAL |
Definition at line 394 of file ATmega163.h.
| #define CAL1_REG OSCCAL |
Definition at line 395 of file ATmega163.h.
| #define CAL2_REG OSCCAL |
Definition at line 396 of file ATmega163.h.
| #define CAL3_REG OSCCAL |
Definition at line 397 of file ATmega163.h.
| #define CAL4_REG OSCCAL |
Definition at line 398 of file ATmega163.h.
| #define CAL5_REG OSCCAL |
Definition at line 399 of file ATmega163.h.
| #define CAL6_REG OSCCAL |
Definition at line 400 of file ATmega163.h.
| #define CAL7_REG OSCCAL |
Definition at line 401 of file ATmega163.h.
| #define CHR9_REG UCSRB |
Definition at line 279 of file ATmega163.h.
| #define COM1A0_REG TCCR1A |
Definition at line 223 of file ATmega163.h.
| #define COM1A1_REG TCCR1A |
Definition at line 224 of file ATmega163.h.
| #define COM1B0_REG TCCR1A |
Definition at line 221 of file ATmega163.h.
| #define COM1B1_REG TCCR1A |
Definition at line 222 of file ATmega163.h.
| #define COM20_REG TCCR2 |
Definition at line 537 of file ATmega163.h.
| #define COM21_REG TCCR2 |
Definition at line 538 of file ATmega163.h.
| #define CPHA_REG SPCR |
Definition at line 643 of file ATmega163.h.
| #define CPOL_REG SPCR |
Definition at line 644 of file ATmega163.h.
| #define CS00_REG TCCR0 |
Definition at line 147 of file ATmega163.h.
| #define CS01_REG TCCR0 |
Definition at line 148 of file ATmega163.h.
| #define CS02_REG TCCR0 |
Definition at line 149 of file ATmega163.h.
| #define CS10_REG TCCR1B |
Definition at line 237 of file ATmega163.h.
| #define CS11_REG TCCR1B |
Definition at line 238 of file ATmega163.h.
| #define CS12_REG TCCR1B |
Definition at line 239 of file ATmega163.h.
| #define CS20_REG TCCR2 |
Definition at line 533 of file ATmega163.h.
| #define CS21_REG TCCR2 |
Definition at line 534 of file ATmega163.h.
| #define CS22_REG TCCR2 |
Definition at line 535 of file ATmega163.h.
| #define CTC1_REG TCCR1B |
Definition at line 240 of file ATmega163.h.
| #define DDA0_REG DDRA |
Definition at line 207 of file ATmega163.h.
| #define DDA1_REG DDRA |
Definition at line 208 of file ATmega163.h.
| #define DDA2_REG DDRA |
Definition at line 209 of file ATmega163.h.
| #define DDA3_REG DDRA |
Definition at line 210 of file ATmega163.h.
| #define DDA4_REG DDRA |
Definition at line 211 of file ATmega163.h.
| #define DDA5_REG DDRA |
Definition at line 212 of file ATmega163.h.
| #define DDA6_REG DDRA |
Definition at line 213 of file ATmega163.h.
| #define DDA7_REG DDRA |
Definition at line 214 of file ATmega163.h.
| #define DDB0_REG DDRB |
Definition at line 162 of file ATmega163.h.
| #define DDB1_REG DDRB |
Definition at line 163 of file ATmega163.h.
| #define DDB2_REG DDRB |
Definition at line 164 of file ATmega163.h.
| #define DDB3_REG DDRB |
Definition at line 165 of file ATmega163.h.
| #define DDB4_REG DDRB |
Definition at line 166 of file ATmega163.h.
| #define DDB5_REG DDRB |
Definition at line 167 of file ATmega163.h.
| #define DDB6_REG DDRB |
Definition at line 168 of file ATmega163.h.
| #define DDB7_REG DDRB |
Definition at line 169 of file ATmega163.h.
| #define DDC0_REG DDRC |
Definition at line 197 of file ATmega163.h.
| #define DDC1_REG DDRC |
Definition at line 198 of file ATmega163.h.
| #define DDC2_REG DDRC |
Definition at line 199 of file ATmega163.h.
| #define DDC3_REG DDRC |
Definition at line 200 of file ATmega163.h.
| #define DDC4_REG DDRC |
Definition at line 201 of file ATmega163.h.
| #define DDC5_REG DDRC |
Definition at line 202 of file ATmega163.h.
| #define DDC6_REG DDRC |
Definition at line 203 of file ATmega163.h.
| #define DDC7_REG DDRC |
Definition at line 204 of file ATmega163.h.
| #define DDD0_REG DDRD |
Definition at line 227 of file ATmega163.h.
| #define DDD1_REG DDRD |
Definition at line 228 of file ATmega163.h.
| #define DDD2_REG DDRD |
Definition at line 229 of file ATmega163.h.
| #define DDD3_REG DDRD |
Definition at line 230 of file ATmega163.h.
| #define DDD4_REG DDRD |
Definition at line 231 of file ATmega163.h.
| #define DDD5_REG DDRD |
Definition at line 232 of file ATmega163.h.
| #define DDD6_REG DDRD |
Definition at line 233 of file ATmega163.h.
| #define DDD7_REG DDRD |
Definition at line 234 of file ATmega163.h.
| #define DORD_REG SPCR |
Definition at line 646 of file ATmega163.h.
| #define EEAR0_REG EEARL |
Definition at line 565 of file ATmega163.h.
| #define EEAR1_REG EEARL |
Definition at line 566 of file ATmega163.h.
| #define EEAR2_REG EEARL |
Definition at line 567 of file ATmega163.h.
| #define EEAR3_REG EEARL |
Definition at line 568 of file ATmega163.h.
| #define EEAR4_REG EEARL |
Definition at line 569 of file ATmega163.h.
| #define EEAR5_REG EEARL |
Definition at line 570 of file ATmega163.h.
| #define EEAR6_REG EEARL |
Definition at line 571 of file ATmega163.h.
| #define EEAR7_REG EEARL |
Definition at line 572 of file ATmega163.h.
| #define EEAR8_REG EEARH |
Definition at line 552 of file ATmega163.h.
| #define EEDR0_REG EEDR |
Definition at line 187 of file ATmega163.h.
| #define EEDR1_REG EEDR |
Definition at line 188 of file ATmega163.h.
| #define EEDR2_REG EEDR |
Definition at line 189 of file ATmega163.h.
| #define EEDR3_REG EEDR |
Definition at line 190 of file ATmega163.h.
| #define EEDR4_REG EEDR |
Definition at line 191 of file ATmega163.h.
| #define EEDR5_REG EEDR |
Definition at line 192 of file ATmega163.h.
| #define EEDR6_REG EEDR |
Definition at line 193 of file ATmega163.h.
| #define EEDR7_REG EEDR |
Definition at line 194 of file ATmega163.h.
| #define EEMWE_REG EECR |
Definition at line 390 of file ATmega163.h.
| #define EERE_REG EECR |
Definition at line 388 of file ATmega163.h.
| #define EERIE_REG EECR |
Definition at line 391 of file ATmega163.h.
| #define EEWE_REG EECR |
Definition at line 389 of file ATmega163.h.
| #define EXTRF_REG MCUSR |
Definition at line 383 of file ATmega163.h.
| #define FE_REG UCSRA |
Definition at line 261 of file ATmega163.h.
| #define FOC1A_REG TCCR1A |
Definition at line 220 of file ATmega163.h.
| #define FOC1B_REG TCCR1A |
Definition at line 219 of file ATmega163.h.
| #define FOC2_REG TCCR2 |
Definition at line 540 of file ATmega163.h.
| #define H_REG SREG |
Definition at line 157 of file ATmega163.h.
| #define I_REG SREG |
Definition at line 159 of file ATmega163.h.
| #define ICES1_REG TCCR1B |
Definition at line 241 of file ATmega163.h.
| #define ICF1_REG TIFR |
Definition at line 547 of file ATmega163.h.
| #define ICNC1_REG TCCR1B |
Definition at line 242 of file ATmega163.h.
| #define ICP_BIT 6 |
Definition at line 758 of file ATmega163.h.
| #define ICP_PORT PORTD |
Definition at line 757 of file ATmega163.h.
| #define ICR1H0_REG ICR1H |
Definition at line 127 of file ATmega163.h.
| #define ICR1H1_REG ICR1H |
Definition at line 128 of file ATmega163.h.
| #define ICR1H2_REG ICR1H |
Definition at line 129 of file ATmega163.h.
| #define ICR1H3_REG ICR1H |
Definition at line 130 of file ATmega163.h.
| #define ICR1H4_REG ICR1H |
Definition at line 131 of file ATmega163.h.
| #define ICR1H5_REG ICR1H |
Definition at line 132 of file ATmega163.h.
| #define ICR1H6_REG ICR1H |
Definition at line 133 of file ATmega163.h.
| #define ICR1H7_REG ICR1H |
Definition at line 134 of file ATmega163.h.
| #define ICR1L0_REG ICR1L |
Definition at line 667 of file ATmega163.h.
| #define ICR1L1_REG ICR1L |
Definition at line 668 of file ATmega163.h.
| #define ICR1L2_REG ICR1L |
Definition at line 669 of file ATmega163.h.
| #define ICR1L3_REG ICR1L |
Definition at line 670 of file ATmega163.h.
| #define ICR1L4_REG ICR1L |
Definition at line 671 of file ATmega163.h.
| #define ICR1L5_REG ICR1L |
Definition at line 672 of file ATmega163.h.
| #define ICR1L6_REG ICR1L |
Definition at line 673 of file ATmega163.h.
| #define ICR1L7_REG ICR1L |
Definition at line 674 of file ATmega163.h.
| #define INT0_BIT 2 |
Definition at line 746 of file ATmega163.h.
| #define INT0_PORT PORTD |
Definition at line 745 of file ATmega163.h.
| #define INT0_REG GIMSK |
Definition at line 123 of file ATmega163.h.
| #define INT1_BIT 3 |
Definition at line 749 of file ATmega163.h.
| #define INT1_PORT PORTD |
Definition at line 748 of file ATmega163.h.
| #define INT1_REG GIMSK |
Definition at line 124 of file ATmega163.h.
| #define INTF0_REG GIFR |
Definition at line 245 of file ATmega163.h.
| #define INTF1_REG GIFR |
Definition at line 246 of file ATmega163.h.
| #define ISC00_REG MCUCR |
Definition at line 612 of file ATmega163.h.
| #define ISC01_REG MCUCR |
Definition at line 613 of file ATmega163.h.
| #define ISC10_REG MCUCR |
Definition at line 614 of file ATmega163.h.
| #define ISC11_REG MCUCR |
Definition at line 615 of file ATmega163.h.
| #define MISO_BIT 6 |
Definition at line 720 of file ATmega163.h.
| #define MISO_PORT PORTB |
Definition at line 719 of file ATmega163.h.
| #define MOSI_BIT 5 |
Definition at line 717 of file ATmega163.h.
| #define MOSI_PORT PORTB |
Definition at line 716 of file ATmega163.h.
| #define MPCM_REG UCSRA |
Definition at line 258 of file ATmega163.h.
| #define MSTR_REG SPCR |
Definition at line 645 of file ATmega163.h.
| #define MUX0_REG ADMUX |
Definition at line 137 of file ATmega163.h.
| #define MUX1_REG ADMUX |
Definition at line 138 of file ATmega163.h.
| #define MUX2_REG ADMUX |
Definition at line 139 of file ATmega163.h.
| #define MUX3_REG ADMUX |
Definition at line 140 of file ATmega163.h.
| #define MUX4_REG ADMUX |
Definition at line 141 of file ATmega163.h.
| #define N_REG SREG |
Definition at line 154 of file ATmega163.h.
| #define OC1A_BIT 5 |
Definition at line 755 of file ATmega163.h.
| #define OC1A_PORT PORTD |
Definition at line 754 of file ATmega163.h.
| #define OC1B_BIT 4 |
Definition at line 752 of file ATmega163.h.
| #define OC1B_PORT PORTD |
Definition at line 751 of file ATmega163.h.
| #define OC2_BIT 7 |
Definition at line 761 of file ATmega163.h.
| #define OC2_PORT PORTD |
Definition at line 760 of file ATmega163.h.
| #define OCF1A_REG TIFR |
Definition at line 546 of file ATmega163.h.
| #define OCF1B_REG TIFR |
Definition at line 545 of file ATmega163.h.
| #define OCF2_REG TIFR |
Definition at line 549 of file ATmega163.h.
| #define OCIE1A_REG TIMSK |
Definition at line 252 of file ATmega163.h.
| #define OCIE1B_REG TIMSK |
Definition at line 251 of file ATmega163.h.
| #define OCIE2_REG TIMSK |
Definition at line 255 of file ATmega163.h.
| #define OCR1AH0_REG OCR1AH |
Definition at line 621 of file ATmega163.h.
| #define OCR1AH1_REG OCR1AH |
Definition at line 622 of file ATmega163.h.
| #define OCR1AH2_REG OCR1AH |
Definition at line 623 of file ATmega163.h.
| #define OCR1AH3_REG OCR1AH |
Definition at line 624 of file ATmega163.h.
| #define OCR1AH4_REG OCR1AH |
Definition at line 625 of file ATmega163.h.
| #define OCR1AH5_REG OCR1AH |
Definition at line 626 of file ATmega163.h.
| #define OCR1AH6_REG OCR1AH |
Definition at line 627 of file ATmega163.h.
| #define OCR1AH7_REG OCR1AH |
Definition at line 628 of file ATmega163.h.
| #define OCR1AL0_REG OCR1AL |
Definition at line 631 of file ATmega163.h.
| #define OCR1AL1_REG OCR1AL |
Definition at line 632 of file ATmega163.h.
| #define OCR1AL2_REG OCR1AL |
Definition at line 633 of file ATmega163.h.
| #define OCR1AL3_REG OCR1AL |
Definition at line 634 of file ATmega163.h.
| #define OCR1AL4_REG OCR1AL |
Definition at line 635 of file ATmega163.h.
| #define OCR1AL5_REG OCR1AL |
Definition at line 636 of file ATmega163.h.
| #define OCR1AL6_REG OCR1AL |
Definition at line 637 of file ATmega163.h.
| #define OCR1AL7_REG OCR1AL |
Definition at line 638 of file ATmega163.h.
| #define OCR1BH0_REG OCR1BH |
Definition at line 334 of file ATmega163.h.
| #define OCR1BH1_REG OCR1BH |
Definition at line 335 of file ATmega163.h.
| #define OCR1BH2_REG OCR1BH |
Definition at line 336 of file ATmega163.h.
| #define OCR1BH3_REG OCR1BH |
Definition at line 337 of file ATmega163.h.
| #define OCR1BH4_REG OCR1BH |
Definition at line 338 of file ATmega163.h.
| #define OCR1BH5_REG OCR1BH |
Definition at line 339 of file ATmega163.h.
| #define OCR1BH6_REG OCR1BH |
Definition at line 340 of file ATmega163.h.
| #define OCR1BH7_REG OCR1BH |
Definition at line 341 of file ATmega163.h.
| #define OCR1BL0_REG OCR1BL |
Definition at line 308 of file ATmega163.h.
| #define OCR1BL1_REG OCR1BL |
Definition at line 309 of file ATmega163.h.
| #define OCR1BL2_REG OCR1BL |
Definition at line 310 of file ATmega163.h.
| #define OCR1BL3_REG OCR1BL |
Definition at line 311 of file ATmega163.h.
| #define OCR1BL4_REG OCR1BL |
Definition at line 312 of file ATmega163.h.
| #define OCR1BL5_REG OCR1BL |
Definition at line 313 of file ATmega163.h.
| #define OCR1BL6_REG OCR1BL |
Definition at line 314 of file ATmega163.h.
| #define OCR1BL7_REG OCR1BL |
Definition at line 315 of file ATmega163.h.
| #define OCR2_0_REG OCR2 |
Definition at line 657 of file ATmega163.h.
| #define OCR2_1_REG OCR2 |
Definition at line 658 of file ATmega163.h.
| #define OCR2_2_REG OCR2 |
Definition at line 659 of file ATmega163.h.
| #define OCR2_3_REG OCR2 |
Definition at line 660 of file ATmega163.h.
| #define OCR2_4_REG OCR2 |
Definition at line 661 of file ATmega163.h.
| #define OCR2_5_REG OCR2 |
Definition at line 662 of file ATmega163.h.
| #define OCR2_6_REG OCR2 |
Definition at line 663 of file ATmega163.h.
| #define OCR2_7_REG OCR2 |
Definition at line 664 of file ATmega163.h.
| #define OCR2UB_REG ASSR |
Definition at line 652 of file ATmega163.h.
| #define OR_REG UCSRA |
Definition at line 260 of file ATmega163.h.
| #define PGERS_REG SPMCR |
Definition at line 355 of file ATmega163.h.
| #define PGWRT_REG SPMCR |
Definition at line 356 of file ATmega163.h.
| #define PINA0_REG PINA |
Definition at line 602 of file ATmega163.h.
| #define PINA1_REG PINA |
Definition at line 603 of file ATmega163.h.
| #define PINA2_REG PINA |
Definition at line 604 of file ATmega163.h.
| #define PINA3_REG PINA |
Definition at line 605 of file ATmega163.h.
| #define PINA4_REG PINA |
Definition at line 606 of file ATmega163.h.
| #define PINA5_REG PINA |
Definition at line 607 of file ATmega163.h.
| #define PINA6_REG PINA |
Definition at line 608 of file ATmega163.h.
| #define PINA7_REG PINA |
Definition at line 609 of file ATmega163.h.
| #define PINB0_REG PINB |
Definition at line 592 of file ATmega163.h.
| #define PINB1_REG PINB |
Definition at line 593 of file ATmega163.h.
| #define PINB2_REG PINB |
Definition at line 594 of file ATmega163.h.
| #define PINB3_REG PINB |
Definition at line 595 of file ATmega163.h.
| #define PINB4_REG PINB |
Definition at line 596 of file ATmega163.h.
| #define PINB5_REG PINB |
Definition at line 597 of file ATmega163.h.
| #define PINB6_REG PINB |
Definition at line 598 of file ATmega163.h.
| #define PINB7_REG PINB |
Definition at line 599 of file ATmega163.h.
| #define PINC0_REG PINC |
Definition at line 582 of file ATmega163.h.
| #define PINC1_REG PINC |
Definition at line 583 of file ATmega163.h.
| #define PINC2_REG PINC |
Definition at line 584 of file ATmega163.h.
| #define PINC3_REG PINC |
Definition at line 585 of file ATmega163.h.
| #define PINC4_REG PINC |
Definition at line 586 of file ATmega163.h.
| #define PINC5_REG PINC |
Definition at line 587 of file ATmega163.h.
| #define PINC6_REG PINC |
Definition at line 588 of file ATmega163.h.
| #define PINC7_REG PINC |
Definition at line 589 of file ATmega163.h.
| #define PIND0_REG PIND |
Definition at line 344 of file ATmega163.h.
| #define PIND1_REG PIND |
Definition at line 345 of file ATmega163.h.
| #define PIND2_REG PIND |
Definition at line 346 of file ATmega163.h.
| #define PIND3_REG PIND |
Definition at line 347 of file ATmega163.h.
| #define PIND4_REG PIND |
Definition at line 348 of file ATmega163.h.
| #define PIND5_REG PIND |
Definition at line 349 of file ATmega163.h.
| #define PIND6_REG PIND |
Definition at line 350 of file ATmega163.h.
| #define PIND7_REG PIND |
Definition at line 351 of file ATmega163.h.
| #define PORF_REG MCUSR |
Definition at line 382 of file ATmega163.h.
| #define PORTA0_REG PORTA |
Definition at line 464 of file ATmega163.h.
| #define PORTA1_REG PORTA |
Definition at line 465 of file ATmega163.h.
| #define PORTA2_REG PORTA |
Definition at line 466 of file ATmega163.h.
| #define PORTA3_REG PORTA |
Definition at line 467 of file ATmega163.h.
| #define PORTA4_REG PORTA |
Definition at line 468 of file ATmega163.h.
| #define PORTA5_REG PORTA |
Definition at line 469 of file ATmega163.h.
| #define PORTA6_REG PORTA |
Definition at line 470 of file ATmega163.h.
| #define PORTA7_REG PORTA |
Definition at line 471 of file ATmega163.h.
| #define PORTB0_REG PORTB |
Definition at line 414 of file ATmega163.h.
| #define PORTB1_REG PORTB |
Definition at line 415 of file ATmega163.h.
| #define PORTB2_REG PORTB |
Definition at line 416 of file ATmega163.h.
| #define PORTB3_REG PORTB |
Definition at line 417 of file ATmega163.h.
| #define PORTB4_REG PORTB |
Definition at line 418 of file ATmega163.h.
| #define PORTB5_REG PORTB |
Definition at line 419 of file ATmega163.h.
| #define PORTB6_REG PORTB |
Definition at line 420 of file ATmega163.h.
| #define PORTB7_REG PORTB |
Definition at line 421 of file ATmega163.h.
| #define PORTC0_REG PORTC |
Definition at line 444 of file ATmega163.h.
| #define PORTC1_REG PORTC |
Definition at line 445 of file ATmega163.h.
| #define PORTC2_REG PORTC |
Definition at line 446 of file ATmega163.h.
| #define PORTC3_REG PORTC |
Definition at line 447 of file ATmega163.h.
| #define PORTC4_REG PORTC |
Definition at line 448 of file ATmega163.h.
| #define PORTC5_REG PORTC |
Definition at line 449 of file ATmega163.h.
| #define PORTC6_REG PORTC |
Definition at line 450 of file ATmega163.h.
| #define PORTC7_REG PORTC |
Definition at line 451 of file ATmega163.h.
| #define PORTD0_REG PORTD |
Definition at line 424 of file ATmega163.h.
| #define PORTD1_REG PORTD |
Definition at line 425 of file ATmega163.h.
| #define PORTD2_REG PORTD |
Definition at line 426 of file ATmega163.h.
| #define PORTD3_REG PORTD |
Definition at line 427 of file ATmega163.h.
| #define PORTD4_REG PORTD |
Definition at line 428 of file ATmega163.h.
| #define PORTD5_REG PORTD |
Definition at line 429 of file ATmega163.h.
| #define PORTD6_REG PORTD |
Definition at line 430 of file ATmega163.h.
| #define PORTD7_REG PORTD |
Definition at line 431 of file ATmega163.h.
| #define PSR10_REG SFIOR |
Definition at line 287 of file ATmega163.h.
| #define PSR2_REG SFIOR |
Definition at line 288 of file ATmega163.h.
| #define PUD_REG SFIOR |
Definition at line 289 of file ATmega163.h.
| #define PWM10_REG TCCR1A |
Definition at line 217 of file ATmega163.h.
| #define PWM11_REG TCCR1A |
Definition at line 218 of file ATmega163.h.
| #define PWM1A_NUM 0 |
Definition at line 105 of file ATmega163.h.
| #define PWM1B_NUM 1 |
Definition at line 106 of file ATmega163.h.
| #define PWM2_NUM 2 |
Definition at line 107 of file ATmega163.h.
| #define PWM_TOTAL_NUM 3 |
Definition at line 108 of file ATmega163.h.
| #define REFS0_REG ADMUX |
Definition at line 143 of file ATmega163.h.
| #define REFS1_REG ADMUX |
Definition at line 144 of file ATmega163.h.
| #define RXB8_REG UCSRB |
Definition at line 278 of file ATmega163.h.
| #define RXC_REG UCSRA |
Definition at line 264 of file ATmega163.h.
| #define RXCIE_REG UCSRB |
Definition at line 284 of file ATmega163.h.
| #define RXD_BIT 0 |
Definition at line 740 of file ATmega163.h.
| #define RXD_PORT PORTD |
Definition at line 739 of file ATmega163.h.
| #define RXEN_REG UCSRB |
Definition at line 281 of file ATmega163.h.
| #define S_REG SREG |
Definition at line 156 of file ATmega163.h.
| #define SCL_BIT 0 |
Definition at line 724 of file ATmega163.h.
| #define SCL_PORT PORTC |
Definition at line 723 of file ATmega163.h.
| #define SDA_BIT 1 |
Definition at line 727 of file ATmega163.h.
| #define SDA_PORT PORTC |
Definition at line 726 of file ATmega163.h.
| #define SE_REG MCUCR |
Definition at line 618 of file ATmega163.h.
| #define SIG_INPUT_CAPTURE1_NUM 0 |
Definition at line 111 of file ATmega163.h.
| #define SIG_INPUT_CAPTURE_TOTAL_NUM 1 |
Definition at line 112 of file ATmega163.h.
| #define SIG_OUTPUT_COMPARE1A_NUM 0 |
Definition at line 99 of file ATmega163.h.
| #define SIG_OUTPUT_COMPARE1B_NUM 1 |
Definition at line 100 of file ATmega163.h.
| #define SIG_OUTPUT_COMPARE2_NUM 2 |
Definition at line 101 of file ATmega163.h.
| #define SIG_OUTPUT_COMPARE_TOTAL_NUM 3 |
Definition at line 102 of file ATmega163.h.
| #define SIG_OVERFLOW0_NUM 0 |
Definition at line 93 of file ATmega163.h.
| #define SIG_OVERFLOW1_NUM 1 |
Definition at line 94 of file ATmega163.h.
| #define SIG_OVERFLOW2_NUM 2 |
Definition at line 95 of file ATmega163.h.
| #define SIG_OVERFLOW_TOTAL_NUM 3 |
Definition at line 96 of file ATmega163.h.
| #define SM0_REG MCUCR |
Definition at line 616 of file ATmega163.h.
| #define SM1_REG MCUCR |
Definition at line 617 of file ATmega163.h.
| #define SP0_REG SPL |
Definition at line 324 of file ATmega163.h.
| #define SP10_REG SPH |
Definition at line 305 of file ATmega163.h.
| #define SP1_REG SPL |
Definition at line 325 of file ATmega163.h.
| #define SP2_REG SPL |
Definition at line 326 of file ATmega163.h.
| #define SP3_REG SPL |
Definition at line 327 of file ATmega163.h.
| #define SP4_REG SPL |
Definition at line 328 of file ATmega163.h.
| #define SP5_REG SPL |
Definition at line 329 of file ATmega163.h.
| #define SP6_REG SPL |
Definition at line 330 of file ATmega163.h.
| #define SP7_REG SPL |
Definition at line 331 of file ATmega163.h.
| #define SP8_REG SPH |
Definition at line 303 of file ATmega163.h.
| #define SP9_REG SPH |
Definition at line 304 of file ATmega163.h.
| #define SPDR0_REG SPDR |
Definition at line 267 of file ATmega163.h.
| #define SPDR1_REG SPDR |
Definition at line 268 of file ATmega163.h.
| #define SPDR2_REG SPDR |
Definition at line 269 of file ATmega163.h.
| #define SPDR3_REG SPDR |
Definition at line 270 of file ATmega163.h.
| #define SPDR4_REG SPDR |
Definition at line 271 of file ATmega163.h.
| #define SPDR5_REG SPDR |
Definition at line 272 of file ATmega163.h.
| #define SPDR6_REG SPDR |
Definition at line 273 of file ATmega163.h.
| #define SPDR7_REG SPDR |
Definition at line 274 of file ATmega163.h.
| #define SPE_REG SPCR |
Definition at line 647 of file ATmega163.h.
| #define SPI2X_REG SPSR |
Definition at line 172 of file ATmega163.h.
| #define SPIE_REG SPCR |
Definition at line 648 of file ATmega163.h.
| #define SPIF_REG SPSR |
Definition at line 174 of file ATmega163.h.
| #define SPMEN_REG SPMCR |
Definition at line 354 of file ATmega163.h.
| #define SPR0_REG SPCR |
Definition at line 641 of file ATmega163.h.
| #define SPR1_REG SPCR |
Definition at line 642 of file ATmega163.h.
| #define SS_BIT 4 |
Definition at line 714 of file ATmega163.h.
| #define SS_PORT PORTB |
Definition at line 713 of file ATmega163.h.
| #define T0_BIT 0 |
Definition at line 702 of file ATmega163.h.
| #define T0_PORT PORTB |
Definition at line 701 of file ATmega163.h.
| #define T1_BIT 1 |
Definition at line 705 of file ATmega163.h.
| #define T1_PORT PORTB |
Definition at line 704 of file ATmega163.h.
| #define T_REG SREG |
Definition at line 158 of file ATmega163.h.
| #define TCN2UB_REG ASSR |
Definition at line 653 of file ATmega163.h.
| #define TCNT00_REG TCNT0 |
Definition at line 483 of file ATmega163.h.
| #define TCNT01_REG TCNT0 |
Definition at line 484 of file ATmega163.h.
| #define TCNT02_REG TCNT0 |
Definition at line 485 of file ATmega163.h.
| #define TCNT03_REG TCNT0 |
Definition at line 486 of file ATmega163.h.
| #define TCNT04_REG TCNT0 |
Definition at line 487 of file ATmega163.h.
| #define TCNT05_REG TCNT0 |
Definition at line 488 of file ATmega163.h.
| #define TCNT06_REG TCNT0 |
Definition at line 489 of file ATmega163.h.
| #define TCNT07_REG TCNT0 |
Definition at line 490 of file ATmega163.h.
| #define TCNT1H0_REG TCNT1H |
Definition at line 434 of file ATmega163.h.
| #define TCNT1H1_REG TCNT1H |
Definition at line 435 of file ATmega163.h.
| #define TCNT1H2_REG TCNT1H |
Definition at line 436 of file ATmega163.h.
| #define TCNT1H3_REG TCNT1H |
Definition at line 437 of file ATmega163.h.
| #define TCNT1H4_REG TCNT1H |
Definition at line 438 of file ATmega163.h.
| #define TCNT1H5_REG TCNT1H |
Definition at line 439 of file ATmega163.h.
| #define TCNT1H6_REG TCNT1H |
Definition at line 440 of file ATmega163.h.
| #define TCNT1H7_REG TCNT1H |
Definition at line 441 of file ATmega163.h.
| #define TCNT1L0_REG TCNT1L |
Definition at line 404 of file ATmega163.h.
| #define TCNT1L1_REG TCNT1L |
Definition at line 405 of file ATmega163.h.
| #define TCNT1L2_REG TCNT1L |
Definition at line 406 of file ATmega163.h.
| #define TCNT1L3_REG TCNT1L |
Definition at line 407 of file ATmega163.h.
| #define TCNT1L4_REG TCNT1L |
Definition at line 408 of file ATmega163.h.
| #define TCNT1L5_REG TCNT1L |
Definition at line 409 of file ATmega163.h.
| #define TCNT1L6_REG TCNT1L |
Definition at line 410 of file ATmega163.h.
| #define TCNT1L7_REG TCNT1L |
Definition at line 411 of file ATmega163.h.
| #define TCNT2_0_REG TCNT2 |
Definition at line 555 of file ATmega163.h.
| #define TCNT2_1_REG TCNT2 |
Definition at line 556 of file ATmega163.h.
| #define TCNT2_2_REG TCNT2 |
Definition at line 557 of file ATmega163.h.
| #define TCNT2_3_REG TCNT2 |
Definition at line 558 of file ATmega163.h.
| #define TCNT2_4_REG TCNT2 |
Definition at line 559 of file ATmega163.h.
| #define TCNT2_5_REG TCNT2 |
Definition at line 560 of file ATmega163.h.
| #define TCNT2_6_REG TCNT2 |
Definition at line 561 of file ATmega163.h.
| #define TCNT2_7_REG TCNT2 |
Definition at line 562 of file ATmega163.h.
| #define TCR2UB_REG ASSR |
Definition at line 651 of file ATmega163.h.
| #define TICIE1_REG TIMSK |
Definition at line 253 of file ATmega163.h.
| #define TIMER0_AVAILABLE |
Definition at line 86 of file ATmega163.h.
| #define TIMER0_PRESCALER_DIV_0 0 |
Definition at line 28 of file ATmega163.h.
| #define TIMER0_PRESCALER_DIV_1 1 |
Definition at line 29 of file ATmega163.h.
| #define TIMER0_PRESCALER_DIV_1024 5 |
Definition at line 33 of file ATmega163.h.
| #define TIMER0_PRESCALER_DIV_256 4 |
Definition at line 32 of file ATmega163.h.
| #define TIMER0_PRESCALER_DIV_64 3 |
Definition at line 31 of file ATmega163.h.
| #define TIMER0_PRESCALER_DIV_8 2 |
Definition at line 30 of file ATmega163.h.
| #define TIMER0_PRESCALER_DIV_FALL 6 |
Definition at line 34 of file ATmega163.h.
| #define TIMER0_PRESCALER_DIV_RISE 7 |
Definition at line 35 of file ATmega163.h.
| #define TIMER0_PRESCALER_REG_0 0 |
Definition at line 37 of file ATmega163.h.
| #define TIMER0_PRESCALER_REG_1 1 |
Definition at line 38 of file ATmega163.h.
| #define TIMER0_PRESCALER_REG_2 8 |
Definition at line 39 of file ATmega163.h.
| #define TIMER0_PRESCALER_REG_3 64 |
Definition at line 40 of file ATmega163.h.
| #define TIMER0_PRESCALER_REG_4 256 |
Definition at line 41 of file ATmega163.h.
| #define TIMER0_PRESCALER_REG_5 1024 |
Definition at line 42 of file ATmega163.h.
| #define TIMER0_PRESCALER_REG_6 -1 |
Definition at line 43 of file ATmega163.h.
| #define TIMER0_PRESCALER_REG_7 -2 |
Definition at line 44 of file ATmega163.h.
| #define TIMER1_AVAILABLE |
Definition at line 87 of file ATmega163.h.
| #define TIMER1_PRESCALER_DIV_0 0 |
Definition at line 47 of file ATmega163.h.
| #define TIMER1_PRESCALER_DIV_1 1 |
Definition at line 48 of file ATmega163.h.
| #define TIMER1_PRESCALER_DIV_1024 5 |
Definition at line 52 of file ATmega163.h.
| #define TIMER1_PRESCALER_DIV_256 4 |
Definition at line 51 of file ATmega163.h.
| #define TIMER1_PRESCALER_DIV_64 3 |
Definition at line 50 of file ATmega163.h.
| #define TIMER1_PRESCALER_DIV_8 2 |
Definition at line 49 of file ATmega163.h.
| #define TIMER1_PRESCALER_DIV_FALL 6 |
Definition at line 53 of file ATmega163.h.
| #define TIMER1_PRESCALER_DIV_RISE 7 |
Definition at line 54 of file ATmega163.h.
| #define TIMER1_PRESCALER_REG_0 0 |
Definition at line 56 of file ATmega163.h.
| #define TIMER1_PRESCALER_REG_1 1 |
Definition at line 57 of file ATmega163.h.
| #define TIMER1_PRESCALER_REG_2 8 |
Definition at line 58 of file ATmega163.h.
| #define TIMER1_PRESCALER_REG_3 64 |
Definition at line 59 of file ATmega163.h.
| #define TIMER1_PRESCALER_REG_4 256 |
Definition at line 60 of file ATmega163.h.
| #define TIMER1_PRESCALER_REG_5 1024 |
Definition at line 61 of file ATmega163.h.
| #define TIMER1_PRESCALER_REG_6 -1 |
Definition at line 62 of file ATmega163.h.
| #define TIMER1_PRESCALER_REG_7 -2 |
Definition at line 63 of file ATmega163.h.
| #define TIMER1A_AVAILABLE |
Definition at line 88 of file ATmega163.h.
| #define TIMER1B_AVAILABLE |
Definition at line 89 of file ATmega163.h.
| #define TIMER2_AVAILABLE |
Definition at line 90 of file ATmega163.h.
| #define TIMER2_PRESCALER_DIV_0 0 |
Definition at line 66 of file ATmega163.h.
| #define TIMER2_PRESCALER_DIV_1 1 |
Definition at line 67 of file ATmega163.h.
| #define TIMER2_PRESCALER_DIV_1024 7 |
Definition at line 73 of file ATmega163.h.
| #define TIMER2_PRESCALER_DIV_128 5 |
Definition at line 71 of file ATmega163.h.
| #define TIMER2_PRESCALER_DIV_256 6 |
Definition at line 72 of file ATmega163.h.
| #define TIMER2_PRESCALER_DIV_32 3 |
Definition at line 69 of file ATmega163.h.
| #define TIMER2_PRESCALER_DIV_64 4 |
Definition at line 70 of file ATmega163.h.
| #define TIMER2_PRESCALER_DIV_8 2 |
Definition at line 68 of file ATmega163.h.
| #define TIMER2_PRESCALER_REG_0 0 |
Definition at line 75 of file ATmega163.h.
| #define TIMER2_PRESCALER_REG_1 1 |
Definition at line 76 of file ATmega163.h.
| #define TIMER2_PRESCALER_REG_2 8 |
Definition at line 77 of file ATmega163.h.
| #define TIMER2_PRESCALER_REG_3 32 |
Definition at line 78 of file ATmega163.h.
| #define TIMER2_PRESCALER_REG_4 64 |
Definition at line 79 of file ATmega163.h.
| #define TIMER2_PRESCALER_REG_5 128 |
Definition at line 80 of file ATmega163.h.
| #define TIMER2_PRESCALER_REG_6 256 |
Definition at line 81 of file ATmega163.h.
| #define TIMER2_PRESCALER_REG_7 1024 |
Definition at line 82 of file ATmega163.h.
| #define TOIE0_REG TIMSK |
Definition at line 249 of file ATmega163.h.
| #define TOIE1_REG TIMSK |
Definition at line 250 of file ATmega163.h.
| #define TOIE2_REG TIMSK |
Definition at line 254 of file ATmega163.h.
| #define TOSC1_BIT 6 |
Definition at line 734 of file ATmega163.h.
| #define TOSC1_PORT PORTC |
Definition at line 733 of file ATmega163.h.
| #define TOSC2_BIT 7 |
Definition at line 737 of file ATmega163.h.
| #define TOSC2_PORT PORTC |
Definition at line 736 of file ATmega163.h.
| #define TOV0_REG TIFR |
Definition at line 543 of file ATmega163.h.
| #define TOV1_REG TIFR |
Definition at line 544 of file ATmega163.h.
| #define TOV2_REG TIFR |
Definition at line 548 of file ATmega163.h.
| #define TWA0_REG TWAR |
Definition at line 504 of file ATmega163.h.
| #define TWA1_REG TWAR |
Definition at line 505 of file ATmega163.h.
| #define TWA2_REG TWAR |
Definition at line 506 of file ATmega163.h.
| #define TWA3_REG TWAR |
Definition at line 507 of file ATmega163.h.
| #define TWA4_REG TWAR |
Definition at line 508 of file ATmega163.h.
| #define TWA5_REG TWAR |
Definition at line 509 of file ATmega163.h.
| #define TWA6_REG TWAR |
Definition at line 510 of file ATmega163.h.
| #define TWBR0_REG TWBR |
Definition at line 362 of file ATmega163.h.
| #define TWBR1_REG TWBR |
Definition at line 363 of file ATmega163.h.
| #define TWBR2_REG TWBR |
Definition at line 364 of file ATmega163.h.
| #define TWBR3_REG TWBR |
Definition at line 365 of file ATmega163.h.
| #define TWBR4_REG TWBR |
Definition at line 366 of file ATmega163.h.
| #define TWBR5_REG TWBR |
Definition at line 367 of file ATmega163.h.
| #define TWBR6_REG TWBR |
Definition at line 368 of file ATmega163.h.
| #define TWBR7_REG TWBR |
Definition at line 369 of file ATmega163.h.
| #define TWD0_REG TWDR |
Definition at line 177 of file ATmega163.h.
| #define TWD1_REG TWDR |
Definition at line 178 of file ATmega163.h.
| #define TWD2_REG TWDR |
Definition at line 179 of file ATmega163.h.
| #define TWD3_REG TWDR |
Definition at line 180 of file ATmega163.h.
| #define TWD4_REG TWDR |
Definition at line 181 of file ATmega163.h.
| #define TWD5_REG TWDR |
Definition at line 182 of file ATmega163.h.
| #define TWD6_REG TWDR |
Definition at line 183 of file ATmega163.h.
| #define TWD7_REG TWDR |
Definition at line 184 of file ATmega163.h.
| #define TWEA_REG TWCR |
Definition at line 479 of file ATmega163.h.
| #define TWEN_REG TWCR |
Definition at line 475 of file ATmega163.h.
| #define TWGCE_REG TWAR |
Definition at line 503 of file ATmega163.h.
| #define TWIE_REG TWCR |
Definition at line 474 of file ATmega163.h.
| #define TWINT_REG TWCR |
Definition at line 480 of file ATmega163.h.
| #define TWS3_REG TWSR |
Definition at line 575 of file ATmega163.h.
| #define TWS4_REG TWSR |
Definition at line 576 of file ATmega163.h.
| #define TWS5_REG TWSR |
Definition at line 577 of file ATmega163.h.
| #define TWS6_REG TWSR |
Definition at line 578 of file ATmega163.h.
| #define TWS7_REG TWSR |
Definition at line 579 of file ATmega163.h.
| #define TWSTA_REG TWCR |
Definition at line 478 of file ATmega163.h.
| #define TWSTO_REG TWCR |
Definition at line 477 of file ATmega163.h.
| #define TWWC_REG TWCR |
Definition at line 476 of file ATmega163.h.
| #define TXB8_REG UCSRB |
Definition at line 277 of file ATmega163.h.
| #define TXC_REG UCSRA |
Definition at line 263 of file ATmega163.h.
| #define TXCIE_REG UCSRB |
Definition at line 283 of file ATmega163.h.
| #define TXD_BIT 1 |
Definition at line 743 of file ATmega163.h.
| #define TXD_PORT PORTD |
Definition at line 742 of file ATmega163.h.
| #define TXEN_REG UCSRB |
Definition at line 280 of file ATmega163.h.
| #define U2X_REG UCSRA |
Definition at line 259 of file ATmega163.h.
| #define UBRR0_REG UBRR |
Definition at line 513 of file ATmega163.h.
| #define UBRR1_REG UBRR |
Definition at line 514 of file ATmega163.h.
| #define UBRR2_REG UBRR |
Definition at line 515 of file ATmega163.h.
| #define UBRR3_REG UBRR |
Definition at line 516 of file ATmega163.h.
| #define UBRR4_REG UBRR |
Definition at line 517 of file ATmega163.h.
| #define UBRR5_REG UBRR |
Definition at line 518 of file ATmega163.h.
| #define UBRR6_REG UBRR |
Definition at line 519 of file ATmega163.h.
| #define UBRR7_REG UBRR |
Definition at line 520 of file ATmega163.h.
| #define UBRRHI0_REG UBRRHI |
Definition at line 318 of file ATmega163.h.
| #define UBRRHI1_REG UBRRHI |
Definition at line 319 of file ATmega163.h.
| #define UBRRHI2_REG UBRRHI |
Definition at line 320 of file ATmega163.h.
| #define UBRRHI3_REG UBRRHI |
Definition at line 321 of file ATmega163.h.
| #define UDR0_REG UDR |
Definition at line 493 of file ATmega163.h.
| #define UDR1_REG UDR |
Definition at line 494 of file ATmega163.h.
| #define UDR2_REG UDR |
Definition at line 495 of file ATmega163.h.
| #define UDR3_REG UDR |
Definition at line 496 of file ATmega163.h.
| #define UDR4_REG UDR |
Definition at line 497 of file ATmega163.h.
| #define UDR5_REG UDR |
Definition at line 498 of file ATmega163.h.
| #define UDR6_REG UDR |
Definition at line 499 of file ATmega163.h.
| #define UDR7_REG UDR |
Definition at line 500 of file ATmega163.h.
| #define UDRE_REG UCSRA |
Definition at line 262 of file ATmega163.h.
| #define UDRIE_REG UCSRB |
Definition at line 282 of file ATmega163.h.
| #define V_REG SREG |
Definition at line 155 of file ATmega163.h.
| #define WCOL_REG SPSR |
Definition at line 173 of file ATmega163.h.
| #define WDE_REG WDTCR |
Definition at line 119 of file ATmega163.h.
| #define WDP0_REG WDTCR |
Definition at line 116 of file ATmega163.h.
| #define WDP1_REG WDTCR |
Definition at line 117 of file ATmega163.h.
| #define WDP2_REG WDTCR |
Definition at line 118 of file ATmega163.h.
| #define WDRF_REG MCUSR |
Definition at line 385 of file ATmega163.h.
| #define WDTOE_REG WDTCR |
Definition at line 120 of file ATmega163.h.
| #define WGM20_REG TCCR2 |
Definition at line 539 of file ATmega163.h.
| #define WGM21_REG TCCR2 |
Definition at line 536 of file ATmega163.h.
| #define Z_REG SREG |
Definition at line 153 of file ATmega163.h.
1.5.6