AVR: aversive_10-03-12/modules/comm/uart/uart

00001 /*  
00002  *  Copyright Droids Corporation, Microb Technology, Eirbot (2005)
00003  * 
00004  *  This program is free software; you can redistribute it and/or modify
00005  *  it under the terms of the GNU General Public License as published by
00006  *  the Free Software Foundation; either version 2 of the License, or
00007  *  (at your option) any later version.
00008  *
00009  *  This program is distributed in the hope that it will be useful,
00010  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
00011  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
00012  *  GNU General Public License for more details.
00013  *
00014  *  You should have received a copy of the GNU General Public License
00015  *  along with this program; if not, write to the Free Software
00016  *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
00017  *
00018  *  Revision : $Id: uart_setconf.c,v 1.2 2009-03-15 21:51:18 zer0 Exp $
00019  *
00020  */
00021 
00022 /* Olivier MATZ, Droids-corp 2004 - 2009 */
00023 
00024 #include <uart.h>
00025 #include <uart_defs.h>
00026 #include <uart_private.h>
00027 
00029 #ifdef UART0_COMPILE
00030 char g_tx0_buf[UART0_TX_FIFO_SIZE];
00031 char g_rx0_buf[UART0_RX_FIFO_SIZE];
00032 #endif
00033 #ifdef UART1_COMPILE
00034 char g_tx1_buf[UART1_TX_FIFO_SIZE];
00035 char g_rx1_buf[UART1_RX_FIFO_SIZE];
00036 #endif
00037 #ifdef UART2_COMPILE
00038 char g_tx2_buf[UART2_TX_FIFO_SIZE];
00039 char g_rx2_buf[UART2_RX_FIFO_SIZE];
00040 #endif
00041 #ifdef UART3_COMPILE
00042 char g_tx3_buf[UART3_TX_FIFO_SIZE];
00043 char g_rx3_buf[UART3_RX_FIFO_SIZE];
00044 #endif
00045 
00046 #if UART_IS_USART
00047 
00048 static int8_t uart_set_nbits_parity(uint8_t num, struct uart_config * u)
00049 {
00050         uint8_t ucsrc = 0;
00051 
00052         /* number of bit in the frame */
00053 #ifdef CONFIG_MODULE_UART_9BITS
00054         if (u->nbits < 5 || u->nbits > 9) {
00055                 return ENOTSUP;
00056         }
00057 #else
00058         if (u->nbits < 5 || u->nbits > 8) {
00059                 return ENOTSUP;
00060         }
00061 #endif
00062 
00063         ucsrc |= ( ((u->nbits - 5) & 0x03) << UCSZ0 );
00064 #ifdef CONFIG_MODULE_UART_9BITS
00065         if (u->nbits == 9)
00066                 *uart_regs[num].ucsrb |= (1 << UCSZ2);
00067         else
00068 #endif
00069                 *uart_regs[num].ucsrb &= ~(1 << UCSZ2);
00070 
00071         /* parity */
00072         if (u->parity == UART_PARTITY_ODD)
00073                 ucsrc |= ((1 << UPM0) | (1 << UPM1));
00074         else if (u->parity == UART_PARTITY_EVEN)
00075                 ucsrc |= (1 << UPM1);
00076         else if (u->parity != UART_PARTITY_NONE) {
00077                 return EINVAL;
00078         }
00079 
00080         /* nb of stop bits */
00081         if (u->stop_bits == UART_STOP_BITS_2)
00082                 ucsrc |= (1 << USBS);
00083         else if (u->stop_bits != UART_STOP_BITS_1)
00084                 return EINVAL;
00085 
00086 #ifdef URSEL
00087         /* some uC use a special bit URSEL to access to UCSRC */
00088         ucsrc |= (1<<URSEL);
00089 #endif
00090         *uart_regs[num].ucsrc = ucsrc;
00091 
00092         return ESUCCESS;
00093 }
00094 
00095 #else /* UART_IS_USART */
00096 
00097 static int8_t uart_set_nbits_parity(int8_t num, struct uart_config * u)
00098 {
00099         /* number of bit in the frame */
00100         if (u->nbits == 8)
00101                 *uart_regs[num].ucsrb &= ~(1 << CHR9);
00102 #ifdef CONFIG_MODULE_UART_9BITS
00103         else if (u->nbits == 9)
00104                 *uart_regs[num].ucsrb |= (1 << CHR9);
00105 #endif
00106         else
00107                 return ENOTSUP;
00108 
00109         /* parity and stop */
00110         if (u->parity != UART_PARTITY_NONE ||
00111             u->stop_bits != UART_STOP_BITS_1) {
00112                 return ENOTSUP;
00113         }
00114 
00115         return ESUCCESS;
00116 }
00117 #endif  /* UART_IS_USART */
00118 
00119 
00120 #if UART_IS_USART
00121 
00122 static int8_t uart_set_baudreg(uint8_t num, uint16_t baudreg)
00123 {
00124         uint8_t lo, hi;
00125 
00126         /* set msb bit of hi to 0 (useful fot uC with URSEL, and not
00127          * important for the others because the baudreg will never be
00128          * as big */
00129         lo = (uint8_t)baudreg;
00130         hi = (uint8_t)(baudreg>>8) & 0x7F;
00131 
00132         *uart_regs[num].ubrrl = lo;
00133         *uart_regs[num].ubrrh = hi;
00134 
00135         return ESUCCESS;
00136 }
00137 
00138 #else /* UART_IS_USART */
00139 
00140 static int8_t uart_set_baudreg(uint8_t num, uint16_t baudreg)
00141 {
00142         uint8_t lo, hi;
00143 
00144         lo=(uint8_t)baudreg;
00145         hi=(uint8_t)(baudreg>>8);
00146 
00147         if (hi != 0)
00148                 return EINVAL;
00149         *uart_regs[num].ubrrl = lo;
00150 
00151         return ESUCCESS;
00152 }
00153 #endif /* UART_IS_USART */
00154 
00155 /* configuration from uart_config.h */
00156 #define UART_SET_STATICCONF(x)                                          \
00157         u->enabled = UART##x##_ENABLED;                                 \
00158         u->intr_enabled = UART##x##_INTERRUPT_ENABLED;                  \
00159         u->use_double_speed = UART##x##_USE_DOUBLE_SPEED;               \
00160         u->parity =  UART##x##_PARITY;                                  \
00161         u->stop_bits = UART##x##_STOP_BIT;                              \
00162         u->nbits = UART##x##_NBITS;                                     \
00163         u->baudrate = UART##x##_BAUDRATE;                               \
00164         break
00165 
00166 int8_t uart_setconf(uint8_t num, struct uart_config *u)
00167 {
00168         uint8_t ret = ESUCCESS;
00169         uint16_t baudrate_reg;
00170         struct uart_config static_conf;
00171         uint8_t flags;
00172 
00173         IRQ_LOCK(flags);
00174 
00175         /* static configuration */
00176         if (!u) {
00177                 u = &static_conf;
00178                 switch (num) {
00179 #ifdef UART0_COMPILE
00180                 case 0:
00181                         UART_SET_STATICCONF(0);
00182 #endif
00183 #ifdef UART1_COMPILE
00184                 case 1:
00185                         UART_SET_STATICCONF(1);
00186 #endif
00187 #ifdef UART2_COMPILE
00188                 case 2:
00189                         UART_SET_STATICCONF(2);
00190 #endif
00191 #ifdef UART3_COMPILE
00192                 case 3:
00193                         UART_SET_STATICCONF(3);
00194 #endif
00195                 default:
00196                         ret = EINVAL;
00197                         goto out;
00198                 }
00199         }
00200 
00201         /* wait xmit finished (UDRE = 1) */
00202         while( !(*uart_regs[num].ucsra & (1<<UDRE)) );
00203 
00204         switch (num) {
00205 #ifdef UART0_COMPILE
00206         case 0:
00207                 cirbuf_init(&g_tx_fifo[0], g_tx0_buf, 0, UART0_TX_FIFO_SIZE);
00208                 cirbuf_init(&g_rx_fifo[0], g_rx0_buf, 0, UART0_RX_FIFO_SIZE);
00209                 break;
00210 #endif
00211 #ifdef UART1_COMPILE
00212         case 1:
00213                 cirbuf_init(&g_tx_fifo[1], g_tx1_buf, 0, UART1_TX_FIFO_SIZE);
00214                 cirbuf_init(&g_rx_fifo[1], g_rx1_buf, 0, UART1_RX_FIFO_SIZE);
00215                 break;
00216 #endif
00217 #ifdef UART2_COMPILE
00218         case 2:
00219                 cirbuf_init(&g_tx_fifo[2], g_tx2_buf, 0, UART2_TX_FIFO_SIZE);
00220                 cirbuf_init(&g_rx_fifo[2], g_rx2_buf, 0, UART2_RX_FIFO_SIZE);
00221                 break;
00222 #endif
00223 #ifdef UART3_COMPILE
00224         case 3:
00225                 cirbuf_init(&g_tx_fifo[3], g_tx3_buf, 0, UART3_TX_FIFO_SIZE);
00226                 cirbuf_init(&g_rx_fifo[3], g_rx3_buf, 0, UART3_RX_FIFO_SIZE);
00227                 break;
00228 #endif
00229         default:
00230                 ret = EINVAL;
00231                 goto out;
00232         }
00233         *uart_regs[num].ucsra = 0;
00234         
00235         if (u->enabled)
00236                 *uart_regs[num].ucsrb = ((1 << TXEN) | (1 << RXEN));
00237         else {
00238                 *uart_regs[num].ucsrb = 0;
00239                 goto out; /* no more conf */
00240         }
00241 
00242         /* we only enable recv interrupt, the xmit intrpt will be
00243          * enabled in the xmit function */
00244         if (u->intr_enabled)
00245                 *uart_regs[num].ucsrb |= (1 << RXCIE);
00246 
00247         if (UART_HAS_U2X) { /* if u2x is supported */
00248                 if (u->use_double_speed) /* u2x is enabled */
00249                         *uart_regs[num].ucsra |= (1 << U2X);
00250                 else
00251                         *uart_regs[num].ucsra &= ~(1 << U2X);
00252         }
00253         else if (u->use_double_speed) {
00254                 ret = ENOTSUP;
00255                 goto out;
00256         }
00257 
00258         uart_set_nbits_parity(num, u);
00259 
00260         /* baudrate */
00261         if(u->use_double_speed)
00262                 baudrate_reg = (F_CPU / (u->baudrate*8l)) - 1;
00263         else
00264                 baudrate_reg = (F_CPU / (u->baudrate*16l)) - 1;
00265 
00266         uart_set_baudreg(num, baudrate_reg);
00267 
00268         /* exit */
00269  out:
00270         IRQ_UNLOCK(flags);
00271         return ret;
00272 }
aversive_10-03-12/modules/comm/uart/uart_setconf.c
