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Defines | |
| #define | TIMER0_PRESCALER_DIV_0 0 |
| #define | TIMER0_PRESCALER_DIV_1 1 |
| #define | TIMER0_PRESCALER_DIV_8 2 |
| #define | TIMER0_PRESCALER_DIV_64 3 |
| #define | TIMER0_PRESCALER_DIV_256 4 |
| #define | TIMER0_PRESCALER_DIV_1024 5 |
| #define | TIMER0_PRESCALER_DIV_FALL 6 |
| #define | TIMER0_PRESCALER_DIV_RISE 7 |
| #define | TIMER0_PRESCALER_REG_0 0 |
| #define | TIMER0_PRESCALER_REG_1 1 |
| #define | TIMER0_PRESCALER_REG_2 8 |
| #define | TIMER0_PRESCALER_REG_3 64 |
| #define | TIMER0_PRESCALER_REG_4 256 |
| #define | TIMER0_PRESCALER_REG_5 1024 |
| #define | TIMER0_PRESCALER_REG_6 -1 |
| #define | TIMER0_PRESCALER_REG_7 -2 |
| #define | TIMER1_PRESCALER_DIV_0 0 |
| #define | TIMER1_PRESCALER_DIV_1 1 |
| #define | TIMER1_PRESCALER_DIV_2 2 |
| #define | TIMER1_PRESCALER_DIV_4 3 |
| #define | TIMER1_PRESCALER_DIV_8 4 |
| #define | TIMER1_PRESCALER_DIV_16 5 |
| #define | TIMER1_PRESCALER_DIV_32 6 |
| #define | TIMER1_PRESCALER_DIV_64 7 |
| #define | TIMER1_PRESCALER_DIV_128 8 |
| #define | TIMER1_PRESCALER_DIV_256 9 |
| #define | TIMER1_PRESCALER_DIV_512 10 |
| #define | TIMER1_PRESCALER_DIV_1024 11 |
| #define | TIMER1_PRESCALER_DIV_2048 12 |
| #define | TIMER1_PRESCALER_DIV_4096 13 |
| #define | TIMER1_PRESCALER_DIV_8192 14 |
| #define | TIMER1_PRESCALER_DIV_16384 15 |
| #define | TIMER1_PRESCALER_REG_0 0 |
| #define | TIMER1_PRESCALER_REG_1 1 |
| #define | TIMER1_PRESCALER_REG_2 2 |
| #define | TIMER1_PRESCALER_REG_3 4 |
| #define | TIMER1_PRESCALER_REG_4 8 |
| #define | TIMER1_PRESCALER_REG_5 16 |
| #define | TIMER1_PRESCALER_REG_6 32 |
| #define | TIMER1_PRESCALER_REG_7 64 |
| #define | TIMER1_PRESCALER_REG_8 128 |
| #define | TIMER1_PRESCALER_REG_9 256 |
| #define | TIMER1_PRESCALER_REG_10 512 |
| #define | TIMER1_PRESCALER_REG_11 1024 |
| #define | TIMER1_PRESCALER_REG_12 2048 |
| #define | TIMER1_PRESCALER_REG_13 4096 |
| #define | TIMER1_PRESCALER_REG_14 8192 |
| #define | TIMER1_PRESCALER_REG_15 16384 |
| #define | TIMER0_AVAILABLE |
| #define | TIMER0A_AVAILABLE |
| #define | TIMER0B_AVAILABLE |
| #define | TIMER1_AVAILABLE |
| #define | TIMER1A_AVAILABLE |
| #define | TIMER1B_AVAILABLE |
| #define | SIG_OVERFLOW0_NUM 0 |
| #define | SIG_OVERFLOW1_NUM 1 |
| #define | SIG_OVERFLOW_TOTAL_NUM 2 |
| #define | SIG_OUTPUT_COMPARE0A_NUM 0 |
| #define | SIG_OUTPUT_COMPARE0B_NUM 1 |
| #define | SIG_OUTPUT_COMPARE1A_NUM 2 |
| #define | SIG_OUTPUT_COMPARE1B_NUM 3 |
| #define | SIG_OUTPUT_COMPARE_TOTAL_NUM 4 |
| #define | PWM0A_NUM 0 |
| #define | PWM0B_NUM 1 |
| #define | PWM1A_NUM 2 |
| #define | PWM1B_NUM 3 |
| #define | PWM_TOTAL_NUM 4 |
| #define | SIG_INPUT_CAPTURE_TOTAL_NUM 0 |
| #define | CLKPS0_REG CLKPR |
| #define | CLKPS1_REG CLKPR |
| #define | CLKPS2_REG CLKPR |
| #define | CLKPS3_REG CLKPR |
| #define | CLKPCE_REG CLKPR |
| #define | WDP0_REG WDTCR |
| #define | WDP1_REG WDTCR |
| #define | WDP2_REG WDTCR |
| #define | WDE_REG WDTCR |
| #define | WDCE_REG WDTCR |
| #define | WDP3_REG WDTCR |
| #define | WDIE_REG WDTCR |
| #define | WDIF_REG WDTCR |
| #define | PCIE_REG GIMSK |
| #define | INT0_REG GIMSK |
| #define | AIN0D_REG DIDR0 |
| #define | AIN1D_REG DIDR0 |
| #define | ADC1D_REG DIDR0 |
| #define | ADC3D_REG DIDR0 |
| #define | ADC2D_REG DIDR0 |
| #define | ADC0D_REG DIDR0 |
| #define | MUX0_REG ADMUX |
| #define | MUX1_REG ADMUX |
| #define | MUX2_REG ADMUX |
| #define | MUX3_REG ADMUX |
| #define | REFS2_REG ADMUX |
| #define | ADLAR_REG ADMUX |
| #define | REFS0_REG ADMUX |
| #define | REFS1_REG ADMUX |
| #define | CS10_REG TCCR1 |
| #define | CS11_REG TCCR1 |
| #define | CS12_REG TCCR1 |
| #define | CS13_REG TCCR1 |
| #define | COM1A0_REG TCCR1 |
| #define | COM1A1_REG TCCR1 |
| #define | PWM1A_REG TCCR1 |
| #define | CTC1_REG TCCR1 |
| #define | C_REG SREG |
| #define | Z_REG SREG |
| #define | N_REG SREG |
| #define | V_REG SREG |
| #define | S_REG SREG |
| #define | H_REG SREG |
| #define | T_REG SREG |
| #define | I_REG SREG |
| #define | DDB0_REG DDRB |
| #define | DDB1_REG DDRB |
| #define | DDB2_REG DDRB |
| #define | DDB3_REG DDRB |
| #define | DDB4_REG DDRB |
| #define | DDB5_REG DDRB |
| #define | EEDR0_REG EEDR |
| #define | EEDR1_REG EEDR |
| #define | EEDR2_REG EEDR |
| #define | EEDR3_REG EEDR |
| #define | EEDR4_REG EEDR |
| #define | EEDR5_REG EEDR |
| #define | EEDR6_REG EEDR |
| #define | EEDR7_REG EEDR |
| #define | ISC00_REG MCUCR |
| #define | ISC01_REG MCUCR |
| #define | SM0_REG MCUCR |
| #define | SM1_REG MCUCR |
| #define | SE_REG MCUCR |
| #define | PUD_REG MCUCR |
| #define | PSR0_REG GTCCR |
| #define | TSM_REG GTCCR |
| #define | PSR1_REG GTCCR |
| #define | FOC1A_REG GTCCR |
| #define | FOC1B_REG GTCCR |
| #define | COM1B0_REG GTCCR |
| #define | COM1B1_REG GTCCR |
| #define | PWM1B_REG GTCCR |
| #define | DTPS0_REG DTPS |
| #define | DTPS1_REG DTPS |
| #define | PCIF_REG GIFR |
| #define | INTF0_REG GIFR |
| #define | TOIE0_REG TIMSK |
| #define | OCIE0B_REG TIMSK |
| #define | OCIE0A_REG TIMSK |
| #define | TOIE1_REG TIMSK |
| #define | OCIE1B_REG TIMSK |
| #define | OCIE1A_REG TIMSK |
| #define | ADPS0_REG ADCSRA |
| #define | ADPS1_REG ADCSRA |
| #define | ADPS2_REG ADCSRA |
| #define | ADIE_REG ADCSRA |
| #define | ADIF_REG ADCSRA |
| #define | ADATE_REG ADCSRA |
| #define | ADSC_REG ADCSRA |
| #define | ADEN_REG ADCSRA |
| #define | SP8_REG SPH |
| #define | SP9_REG SPH |
| #define | SP0_REG SPL |
| #define | SP1_REG SPL |
| #define | SP2_REG SPL |
| #define | SP3_REG SPL |
| #define | SP4_REG SPL |
| #define | SP5_REG SPL |
| #define | SP6_REG SPL |
| #define | SP7_REG SPL |
| #define | PRADC_REG PRR |
| #define | PRUSI_REG PRR |
| #define | PRTIM0_REG PRR |
| #define | PRTIM1_REG PRR |
| #define | GPIOR10_REG GPIOR1 |
| #define | GPIOR11_REG GPIOR1 |
| #define | GPIOR12_REG GPIOR1 |
| #define | GPIOR13_REG GPIOR1 |
| #define | GPIOR14_REG GPIOR1 |
| #define | GPIOR15_REG GPIOR1 |
| #define | GPIOR16_REG GPIOR1 |
| #define | GPIOR17_REG GPIOR1 |
| #define | GPIOR00_REG GPIOR0 |
| #define | GPIOR01_REG GPIOR0 |
| #define | GPIOR02_REG GPIOR0 |
| #define | GPIOR03_REG GPIOR0 |
| #define | GPIOR04_REG GPIOR0 |
| #define | GPIOR05_REG GPIOR0 |
| #define | GPIOR06_REG GPIOR0 |
| #define | GPIOR07_REG GPIOR0 |
| #define | GPIOR20_REG GPIOR2 |
| #define | GPIOR21_REG GPIOR2 |
| #define | GPIOR22_REG GPIOR2 |
| #define | GPIOR23_REG GPIOR2 |
| #define | GPIOR24_REG GPIOR2 |
| #define | GPIOR25_REG GPIOR2 |
| #define | GPIOR26_REG GPIOR2 |
| #define | GPIOR27_REG GPIOR2 |
| #define | PORF_REG MCUSR |
| #define | EXTRF_REG MCUSR |
| #define | BORF_REG MCUSR |
| #define | WDRF_REG MCUSR |
| #define | EERE_REG EECR |
| #define | EEPE_REG EECR |
| #define | EEMPE_REG EECR |
| #define | EERIE_REG EECR |
| #define | EEPM0_REG EECR |
| #define | EEPM1_REG EECR |
| #define | PCINT0_REG PCMSK |
| #define | PCINT1_REG PCMSK |
| #define | PCINT2_REG PCMSK |
| #define | PCINT3_REG PCMSK |
| #define | PCINT4_REG PCMSK |
| #define | PCINT5_REG PCMSK |
| #define | SPMEN_REG SPMCSR |
| #define | PGERS_REG SPMCSR |
| #define | PGWRT_REG SPMCSR |
| #define | RFLB_REG SPMCSR |
| #define | CTPB_REG SPMCSR |
| #define | CAL0_REG OSCCAL |
| #define | CAL1_REG OSCCAL |
| #define | CAL2_REG OSCCAL |
| #define | CAL3_REG OSCCAL |
| #define | CAL4_REG OSCCAL |
| #define | CAL5_REG OSCCAL |
| #define | CAL6_REG OSCCAL |
| #define | CAL7_REG OSCCAL |
| #define | ADCL0_REG ADCL |
| #define | ADCL1_REG ADCL |
| #define | ADCL2_REG ADCL |
| #define | ADCL3_REG ADCL |
| #define | ADCL4_REG ADCL |
| #define | ADCL5_REG ADCL |
| #define | ADCL6_REG ADCL |
| #define | ADCL7_REG ADCL |
| #define | USICNT0_REG USISR |
| #define | USICNT1_REG USISR |
| #define | USICNT2_REG USISR |
| #define | USICNT3_REG USISR |
| #define | USIDC_REG USISR |
| #define | USIPF_REG USISR |
| #define | USIOIF_REG USISR |
| #define | USISIF_REG USISR |
| #define | PORTB0_REG PORTB |
| #define | PORTB1_REG PORTB |
| #define | PORTB2_REG PORTB |
| #define | PORTB3_REG PORTB |
| #define | PORTB4_REG PORTB |
| #define | PORTB5_REG PORTB |
| #define | ADCH0_REG ADCH |
| #define | ADCH1_REG ADCH |
| #define | ADCH2_REG ADCH |
| #define | ADCH3_REG ADCH |
| #define | ADCH4_REG ADCH |
| #define | ADCH5_REG ADCH |
| #define | ADCH6_REG ADCH |
| #define | ADCH7_REG ADCH |
| #define | TCNT0_0_REG TCNT0 |
| #define | TCNT0_1_REG TCNT0 |
| #define | TCNT0_2_REG TCNT0 |
| #define | TCNT0_3_REG TCNT0 |
| #define | TCNT0_4_REG TCNT0 |
| #define | TCNT0_5_REG TCNT0 |
| #define | TCNT0_6_REG TCNT0 |
| #define | TCNT0_7_REG TCNT0 |
| #define | TCNT1_0_REG TCNT1 |
| #define | TCNT1_1_REG TCNT1 |
| #define | TCNT1_2_REG TCNT1 |
| #define | TCNT1_3_REG TCNT1 |
| #define | TCNT1_4_REG TCNT1 |
| #define | TCNT1_5_REG TCNT1 |
| #define | TCNT1_6_REG TCNT1 |
| #define | TCNT1_7_REG TCNT1 |
| #define | CS00_REG TCCR0B |
| #define | CS01_REG TCCR0B |
| #define | CS02_REG TCCR0B |
| #define | WGM02_REG TCCR0B |
| #define | FOC0B_REG TCCR0B |
| #define | FOC0A_REG TCCR0B |
| #define | TOV0_REG TIFR |
| #define | OCF0B_REG TIFR |
| #define | OCF0A_REG TIFR |
| #define | TOV1_REG TIFR |
| #define | OCF1B_REG TIFR |
| #define | OCF1A_REG TIFR |
| #define | WGM00_REG TCCR0A |
| #define | WGM01_REG TCCR0A |
| #define | COM0B0_REG TCCR0A |
| #define | COM0B1_REG TCCR0A |
| #define | COM0A0_REG TCCR0A |
| #define | COM0A1_REG TCCR0A |
| #define | EEAR8_REG EEARH |
| #define | PLOCK_REG PLLCSR |
| #define | PLLE_REG PLLCSR |
| #define | PCKE_REG PLLCSR |
| #define | LSM_REG PLLCSR |
| #define | USITC_REG USICR |
| #define | USICLK_REG USICR |
| #define | USICS0_REG USICR |
| #define | USICS1_REG USICR |
| #define | USIWM0_REG USICR |
| #define | USIWM1_REG USICR |
| #define | USIOIE_REG USICR |
| #define | USISIE_REG USICR |
| #define | EEAR0_REG EEARL |
| #define | EEAR1_REG EEARL |
| #define | EEAR2_REG EEARL |
| #define | EEAR3_REG EEARL |
| #define | EEAR4_REG EEARL |
| #define | EEAR5_REG EEARL |
| #define | EEAR6_REG EEARL |
| #define | EEAR7_REG EEARL |
| #define | DWDR0_REG DWDR |
| #define | DWDR1_REG DWDR |
| #define | DWDR2_REG DWDR |
| #define | DWDR3_REG DWDR |
| #define | DWDR4_REG DWDR |
| #define | DWDR5_REG DWDR |
| #define | DWDR6_REG DWDR |
| #define | DWDR7_REG DWDR |
| #define | ACME_REG ADCSRB |
| #define | ADTS0_REG ADCSRB |
| #define | ADTS1_REG ADCSRB |
| #define | ADTS2_REG ADCSRB |
| #define | IPR_REG ADCSRB |
| #define | BIN_REG ADCSRB |
| #define | OCR1B0_REG OCR1B |
| #define | OCR1B1_REG OCR1B |
| #define | OCR1B2_REG OCR1B |
| #define | OCR1B3_REG OCR1B |
| #define | OCR1B4_REG OCR1B |
| #define | OCR1B5_REG OCR1B |
| #define | OCR1B6_REG OCR1B |
| #define | OCR1B7_REG OCR1B |
| #define | OCR1C0_REG OCR1C |
| #define | OCR1C1_REG OCR1C |
| #define | OCR1C2_REG OCR1C |
| #define | OCR1C3_REG OCR1C |
| #define | OCR1C4_REG OCR1C |
| #define | OCR1C5_REG OCR1C |
| #define | OCR1C6_REG OCR1C |
| #define | OCR1C7_REG OCR1C |
| #define | OCR1A0_REG OCR1A |
| #define | OCR1A1_REG OCR1A |
| #define | OCR1A2_REG OCR1A |
| #define | OCR1A3_REG OCR1A |
| #define | OCR1A4_REG OCR1A |
| #define | OCR1A5_REG OCR1A |
| #define | OCR1A6_REG OCR1A |
| #define | OCR1A7_REG OCR1A |
| #define | ACIS0_REG ACSR |
| #define | ACIS1_REG ACSR |
| #define | ACIE_REG ACSR |
| #define | ACI_REG ACSR |
| #define | ACO_REG ACSR |
| #define | ACBG_REG ACSR |
| #define | ACD_REG ACSR |
| #define | PINB0_REG PINB |
| #define | PINB1_REG PINB |
| #define | PINB2_REG PINB |
| #define | PINB3_REG PINB |
| #define | PINB4_REG PINB |
| #define | PINB5_REG PINB |
| #define | USIBR0_REG USIBR |
| #define | USIBR1_REG USIBR |
| #define | USIBR2_REG USIBR |
| #define | USIBR3_REG USIBR |
| #define | USIBR4_REG USIBR |
| #define | USIBR5_REG USIBR |
| #define | USIBR6_REG USIBR |
| #define | USIBR7_REG USIBR |
| #define | USIDR0_REG USIDR |
| #define | USIDR1_REG USIDR |
| #define | USIDR2_REG USIDR |
| #define | USIDR3_REG USIDR |
| #define | USIDR4_REG USIDR |
| #define | USIDR5_REG USIDR |
| #define | USIDR6_REG USIDR |
| #define | USIDR7_REG USIDR |
| #define | MOSI_PORT PORTB |
| #define | MOSI_BIT 0 |
| #define | DI_PORT PORTB |
| #define | DI_BIT 0 |
| #define | SDA_PORT PORTB |
| #define | SDA_BIT 0 |
| #define | AIN0_PORT PORTB |
| #define | AIN0_BIT 0 |
| #define | OC0A_PORT PORTB |
| #define | OC0A_BIT 0 |
| #define | OC1A_PORT PORTB |
| #define | OC1A_BIT 0 |
| #define | AREF_PORT PORTB |
| #define | AREF_BIT 0 |
| #define | PCINT0_PORT PORTB |
| #define | PCINT0_BIT 0 |
| #define | MISO_PORT PORTB |
| #define | MISO_BIT 1 |
| #define | DO_PORT PORTB |
| #define | DO_BIT 1 |
| #define | AIN1_PORT PORTB |
| #define | AIN1_BIT 1 |
| #define | OC0B_PORT PORTB |
| #define | OC0B_BIT 1 |
| #define | OC1A_PORT PORTB |
| #define | OC1A_BIT 1 |
| #define | PCINT1_PORT PORTB |
| #define | PCINT1_BIT 1 |
| #define | SCK_PORT PORTB |
| #define | SCK_BIT 2 |
| #define | USCK_PORT PORTB |
| #define | USCK_BIT 2 |
| #define | SCL_PORT PORTB |
| #define | SCL_BIT 2 |
| #define | ADC1_PORT PORTB |
| #define | ADC1_BIT 2 |
| #define | T0_PORT PORTB |
| #define | T0_BIT 2 |
| #define | INT0_PORT PORTB |
| #define | INT0_BIT 2 |
| #define | PCINT2_PORT PORTB |
| #define | PCINT2_BIT 2 |
| #define | ADC3_PORT PORTB |
| #define | ADC3_BIT 3 |
| #define | OC1B_PORT PORTB |
| #define | OC1B_BIT 3 |
| #define | XTAL1_PORT PORTB |
| #define | XTAL1_BIT 3 |
| #define | PCINT4_PORT PORTB |
| #define | PCINT4_BIT 3 |
| #define | ADC2_PORT PORTB |
| #define | ADC2_BIT 4 |
| #define | OC1B_PORT PORTB |
| #define | OC1B_BIT 4 |
| #define | XTAL2_PORT PORTB |
| #define | XTAL2_BIT 4 |
| #define | PCINT3_PORT PORTB |
| #define | PCINT3_BIT 4 |
| #define | RESET_PORT PORTB |
| #define | RESET_BIT 5 |
| #define | ADC0_PORT PORTB |
| #define | ADC0_BIT 5 |
| #define | PCINT5_PORT PORTB |
| #define | PCINT5_BIT 5 |
| #define | dW_PORT PORTB |
| #define | dW_BIT 5 |
| #define ACBG_REG ACSR |
Definition at line 528 of file ATtiny85.h.
| #define ACD_REG ACSR |
Definition at line 529 of file ATtiny85.h.
| #define ACI_REG ACSR |
Definition at line 526 of file ATtiny85.h.
| #define ACIE_REG ACSR |
Definition at line 525 of file ATtiny85.h.
| #define ACIS0_REG ACSR |
Definition at line 523 of file ATtiny85.h.
| #define ACIS1_REG ACSR |
Definition at line 524 of file ATtiny85.h.
| #define ACME_REG ADCSRB |
Definition at line 475 of file ATtiny85.h.
| #define ACO_REG ACSR |
Definition at line 527 of file ATtiny85.h.
| #define ADATE_REG ADCSRA |
Definition at line 230 of file ATtiny85.h.
| #define ADC0_BIT 5 |
Definition at line 626 of file ATtiny85.h.
| #define ADC0_PORT PORTB |
Definition at line 625 of file ATtiny85.h.
| #define ADC0D_REG DIDR0 |
Definition at line 140 of file ATtiny85.h.
| #define ADC1_BIT 2 |
Definition at line 597 of file ATtiny85.h.
| #define ADC1_PORT PORTB |
Definition at line 596 of file ATtiny85.h.
| #define ADC1D_REG DIDR0 |
Definition at line 137 of file ATtiny85.h.
| #define ADC2_BIT 4 |
Definition at line 615 of file ATtiny85.h.
| #define ADC2_PORT PORTB |
Definition at line 614 of file ATtiny85.h.
| #define ADC2D_REG DIDR0 |
Definition at line 139 of file ATtiny85.h.
| #define ADC3_BIT 3 |
Definition at line 606 of file ATtiny85.h.
| #define ADC3_PORT PORTB |
Definition at line 605 of file ATtiny85.h.
| #define ADC3D_REG DIDR0 |
Definition at line 138 of file ATtiny85.h.
| #define ADCH0_REG ADCH |
Definition at line 382 of file ATtiny85.h.
| #define ADCH1_REG ADCH |
Definition at line 383 of file ATtiny85.h.
| #define ADCH2_REG ADCH |
Definition at line 384 of file ATtiny85.h.
| #define ADCH3_REG ADCH |
Definition at line 385 of file ATtiny85.h.
| #define ADCH4_REG ADCH |
Definition at line 386 of file ATtiny85.h.
| #define ADCH5_REG ADCH |
Definition at line 387 of file ATtiny85.h.
| #define ADCH6_REG ADCH |
Definition at line 388 of file ATtiny85.h.
| #define ADCH7_REG ADCH |
Definition at line 389 of file ATtiny85.h.
| #define ADCL0_REG ADCL |
Definition at line 354 of file ATtiny85.h.
| #define ADCL1_REG ADCL |
Definition at line 355 of file ATtiny85.h.
| #define ADCL2_REG ADCL |
Definition at line 356 of file ATtiny85.h.
| #define ADCL3_REG ADCL |
Definition at line 357 of file ATtiny85.h.
| #define ADCL4_REG ADCL |
Definition at line 358 of file ATtiny85.h.
| #define ADCL5_REG ADCL |
Definition at line 359 of file ATtiny85.h.
| #define ADCL6_REG ADCL |
Definition at line 360 of file ATtiny85.h.
| #define ADCL7_REG ADCL |
Definition at line 361 of file ATtiny85.h.
| #define ADEN_REG ADCSRA |
Definition at line 232 of file ATtiny85.h.
| #define ADIE_REG ADCSRA |
Definition at line 228 of file ATtiny85.h.
| #define ADIF_REG ADCSRA |
Definition at line 229 of file ATtiny85.h.
| #define ADLAR_REG ADMUX |
Definition at line 148 of file ATtiny85.h.
| #define ADPS0_REG ADCSRA |
Definition at line 225 of file ATtiny85.h.
| #define ADPS1_REG ADCSRA |
Definition at line 226 of file ATtiny85.h.
| #define ADPS2_REG ADCSRA |
Definition at line 227 of file ATtiny85.h.
| #define ADSC_REG ADCSRA |
Definition at line 231 of file ATtiny85.h.
| #define ADTS0_REG ADCSRB |
Definition at line 476 of file ATtiny85.h.
| #define ADTS1_REG ADCSRB |
Definition at line 477 of file ATtiny85.h.
| #define ADTS2_REG ADCSRB |
Definition at line 478 of file ATtiny85.h.
| #define AIN0_BIT 0 |
Definition at line 567 of file ATtiny85.h.
| #define AIN0_PORT PORTB |
Definition at line 566 of file ATtiny85.h.
| #define AIN0D_REG DIDR0 |
Definition at line 135 of file ATtiny85.h.
| #define AIN1_BIT 1 |
Definition at line 582 of file ATtiny85.h.
| #define AIN1_PORT PORTB |
Definition at line 581 of file ATtiny85.h.
| #define AIN1D_REG DIDR0 |
Definition at line 136 of file ATtiny85.h.
| #define AREF_BIT 0 |
Definition at line 573 of file ATtiny85.h.
| #define AREF_PORT PORTB |
Definition at line 572 of file ATtiny85.h.
| #define BIN_REG ADCSRB |
Definition at line 480 of file ATtiny85.h.
| #define BORF_REG MCUSR |
Definition at line 317 of file ATtiny85.h.
| #define C_REG SREG |
Definition at line 163 of file ATtiny85.h.
| #define CAL0_REG OSCCAL |
Definition at line 344 of file ATtiny85.h.
| #define CAL1_REG OSCCAL |
Definition at line 345 of file ATtiny85.h.
| #define CAL2_REG OSCCAL |
Definition at line 346 of file ATtiny85.h.
| #define CAL3_REG OSCCAL |
Definition at line 347 of file ATtiny85.h.
| #define CAL4_REG OSCCAL |
Definition at line 348 of file ATtiny85.h.
| #define CAL5_REG OSCCAL |
Definition at line 349 of file ATtiny85.h.
| #define CAL6_REG OSCCAL |
Definition at line 350 of file ATtiny85.h.
| #define CAL7_REG OSCCAL |
Definition at line 351 of file ATtiny85.h.
| #define CLKPCE_REG CLKPR |
Definition at line 118 of file ATtiny85.h.
| #define CLKPS0_REG CLKPR |
Definition at line 114 of file ATtiny85.h.
| #define CLKPS1_REG CLKPR |
Definition at line 115 of file ATtiny85.h.
| #define CLKPS2_REG CLKPR |
Definition at line 116 of file ATtiny85.h.
| #define CLKPS3_REG CLKPR |
Definition at line 117 of file ATtiny85.h.
| #define COM0A0_REG TCCR0A |
Definition at line 432 of file ATtiny85.h.
| #define COM0A1_REG TCCR0A |
Definition at line 433 of file ATtiny85.h.
| #define COM0B0_REG TCCR0A |
Definition at line 430 of file ATtiny85.h.
| #define COM0B1_REG TCCR0A |
Definition at line 431 of file ATtiny85.h.
| #define COM1A0_REG TCCR1 |
Definition at line 157 of file ATtiny85.h.
| #define COM1A1_REG TCCR1 |
Definition at line 158 of file ATtiny85.h.
| #define COM1B0_REG GTCCR |
Definition at line 204 of file ATtiny85.h.
| #define COM1B1_REG GTCCR |
Definition at line 205 of file ATtiny85.h.
| #define CS00_REG TCCR0B |
Definition at line 412 of file ATtiny85.h.
| #define CS01_REG TCCR0B |
Definition at line 413 of file ATtiny85.h.
| #define CS02_REG TCCR0B |
Definition at line 414 of file ATtiny85.h.
| #define CS10_REG TCCR1 |
Definition at line 153 of file ATtiny85.h.
| #define CS11_REG TCCR1 |
Definition at line 154 of file ATtiny85.h.
| #define CS12_REG TCCR1 |
Definition at line 155 of file ATtiny85.h.
| #define CS13_REG TCCR1 |
Definition at line 156 of file ATtiny85.h.
| #define CTC1_REG TCCR1 |
Definition at line 160 of file ATtiny85.h.
| #define CTPB_REG SPMCSR |
Definition at line 341 of file ATtiny85.h.
| #define DDB0_REG DDRB |
Definition at line 173 of file ATtiny85.h.
| #define DDB1_REG DDRB |
Definition at line 174 of file ATtiny85.h.
| #define DDB2_REG DDRB |
Definition at line 175 of file ATtiny85.h.
| #define DDB3_REG DDRB |
Definition at line 176 of file ATtiny85.h.
| #define DDB4_REG DDRB |
Definition at line 177 of file ATtiny85.h.
| #define DDB5_REG DDRB |
Definition at line 178 of file ATtiny85.h.
| #define DI_BIT 0 |
Definition at line 563 of file ATtiny85.h.
| #define DI_PORT PORTB |
Definition at line 562 of file ATtiny85.h.
| #define DO_BIT 1 |
Definition at line 580 of file ATtiny85.h.
| #define DO_PORT PORTB |
Definition at line 579 of file ATtiny85.h.
| #define DTPS0_REG DTPS |
Definition at line 209 of file ATtiny85.h.
| #define DTPS1_REG DTPS |
Definition at line 210 of file ATtiny85.h.
| #define dW_BIT 5 |
Definition at line 630 of file ATtiny85.h.
| #define dW_PORT PORTB |
Definition at line 629 of file ATtiny85.h.
| #define DWDR0_REG DWDR |
Definition at line 465 of file ATtiny85.h.
| #define DWDR1_REG DWDR |
Definition at line 466 of file ATtiny85.h.
| #define DWDR2_REG DWDR |
Definition at line 467 of file ATtiny85.h.
| #define DWDR3_REG DWDR |
Definition at line 468 of file ATtiny85.h.
| #define DWDR4_REG DWDR |
Definition at line 469 of file ATtiny85.h.
| #define DWDR5_REG DWDR |
Definition at line 470 of file ATtiny85.h.
| #define DWDR6_REG DWDR |
Definition at line 471 of file ATtiny85.h.
| #define DWDR7_REG DWDR |
Definition at line 472 of file ATtiny85.h.
| #define EEAR0_REG EEARL |
Definition at line 455 of file ATtiny85.h.
| #define EEAR1_REG EEARL |
Definition at line 456 of file ATtiny85.h.
| #define EEAR2_REG EEARL |
Definition at line 457 of file ATtiny85.h.
| #define EEAR3_REG EEARL |
Definition at line 458 of file ATtiny85.h.
| #define EEAR4_REG EEARL |
Definition at line 459 of file ATtiny85.h.
| #define EEAR5_REG EEARL |
Definition at line 460 of file ATtiny85.h.
| #define EEAR6_REG EEARL |
Definition at line 461 of file ATtiny85.h.
| #define EEAR7_REG EEARL |
Definition at line 462 of file ATtiny85.h.
| #define EEAR8_REG EEARH |
Definition at line 436 of file ATtiny85.h.
| #define EEDR0_REG EEDR |
Definition at line 181 of file ATtiny85.h.
| #define EEDR1_REG EEDR |
Definition at line 182 of file ATtiny85.h.
| #define EEDR2_REG EEDR |
Definition at line 183 of file ATtiny85.h.
| #define EEDR3_REG EEDR |
Definition at line 184 of file ATtiny85.h.
| #define EEDR4_REG EEDR |
Definition at line 185 of file ATtiny85.h.
| #define EEDR5_REG EEDR |
Definition at line 186 of file ATtiny85.h.
| #define EEDR6_REG EEDR |
Definition at line 187 of file ATtiny85.h.
| #define EEDR7_REG EEDR |
Definition at line 188 of file ATtiny85.h.
| #define EEMPE_REG EECR |
Definition at line 323 of file ATtiny85.h.
| #define EEPE_REG EECR |
Definition at line 322 of file ATtiny85.h.
| #define EEPM0_REG EECR |
Definition at line 325 of file ATtiny85.h.
| #define EEPM1_REG EECR |
Definition at line 326 of file ATtiny85.h.
| #define EERE_REG EECR |
Definition at line 321 of file ATtiny85.h.
| #define EERIE_REG EECR |
Definition at line 324 of file ATtiny85.h.
| #define EXTRF_REG MCUSR |
Definition at line 316 of file ATtiny85.h.
| #define FOC0A_REG TCCR0B |
Definition at line 417 of file ATtiny85.h.
| #define FOC0B_REG TCCR0B |
Definition at line 416 of file ATtiny85.h.
| #define FOC1A_REG GTCCR |
Definition at line 202 of file ATtiny85.h.
| #define FOC1B_REG GTCCR |
Definition at line 203 of file ATtiny85.h.
| #define GPIOR00_REG GPIOR0 |
Definition at line 295 of file ATtiny85.h.
| #define GPIOR01_REG GPIOR0 |
Definition at line 296 of file ATtiny85.h.
| #define GPIOR02_REG GPIOR0 |
Definition at line 297 of file ATtiny85.h.
| #define GPIOR03_REG GPIOR0 |
Definition at line 298 of file ATtiny85.h.
| #define GPIOR04_REG GPIOR0 |
Definition at line 299 of file ATtiny85.h.
| #define GPIOR05_REG GPIOR0 |
Definition at line 300 of file ATtiny85.h.
| #define GPIOR06_REG GPIOR0 |
Definition at line 301 of file ATtiny85.h.
| #define GPIOR07_REG GPIOR0 |
Definition at line 302 of file ATtiny85.h.
| #define GPIOR10_REG GPIOR1 |
Definition at line 285 of file ATtiny85.h.
| #define GPIOR11_REG GPIOR1 |
Definition at line 286 of file ATtiny85.h.
| #define GPIOR12_REG GPIOR1 |
Definition at line 287 of file ATtiny85.h.
| #define GPIOR13_REG GPIOR1 |
Definition at line 288 of file ATtiny85.h.
| #define GPIOR14_REG GPIOR1 |
Definition at line 289 of file ATtiny85.h.
| #define GPIOR15_REG GPIOR1 |
Definition at line 290 of file ATtiny85.h.
| #define GPIOR16_REG GPIOR1 |
Definition at line 291 of file ATtiny85.h.
| #define GPIOR17_REG GPIOR1 |
Definition at line 292 of file ATtiny85.h.
| #define GPIOR20_REG GPIOR2 |
Definition at line 305 of file ATtiny85.h.
| #define GPIOR21_REG GPIOR2 |
Definition at line 306 of file ATtiny85.h.
| #define GPIOR22_REG GPIOR2 |
Definition at line 307 of file ATtiny85.h.
| #define GPIOR23_REG GPIOR2 |
Definition at line 308 of file ATtiny85.h.
| #define GPIOR24_REG GPIOR2 |
Definition at line 309 of file ATtiny85.h.
| #define GPIOR25_REG GPIOR2 |
Definition at line 310 of file ATtiny85.h.
| #define GPIOR26_REG GPIOR2 |
Definition at line 311 of file ATtiny85.h.
| #define GPIOR27_REG GPIOR2 |
Definition at line 312 of file ATtiny85.h.
| #define H_REG SREG |
Definition at line 168 of file ATtiny85.h.
| #define I_REG SREG |
Definition at line 170 of file ATtiny85.h.
| #define INT0_BIT 2 |
Definition at line 601 of file ATtiny85.h.
| #define INT0_PORT PORTB |
Definition at line 600 of file ATtiny85.h.
| #define INT0_REG GIMSK |
Definition at line 132 of file ATtiny85.h.
| #define INTF0_REG GIFR |
Definition at line 214 of file ATtiny85.h.
| #define IPR_REG ADCSRB |
Definition at line 479 of file ATtiny85.h.
| #define ISC00_REG MCUCR |
Definition at line 191 of file ATtiny85.h.
| #define ISC01_REG MCUCR |
Definition at line 192 of file ATtiny85.h.
| #define LSM_REG PLLCSR |
Definition at line 442 of file ATtiny85.h.
| #define MISO_BIT 1 |
Definition at line 578 of file ATtiny85.h.
| #define MISO_PORT PORTB |
Definition at line 577 of file ATtiny85.h.
| #define MOSI_BIT 0 |
Definition at line 561 of file ATtiny85.h.
| #define MOSI_PORT PORTB |
Definition at line 560 of file ATtiny85.h.
| #define MUX0_REG ADMUX |
Definition at line 143 of file ATtiny85.h.
| #define MUX1_REG ADMUX |
Definition at line 144 of file ATtiny85.h.
| #define MUX2_REG ADMUX |
Definition at line 145 of file ATtiny85.h.
| #define MUX3_REG ADMUX |
Definition at line 146 of file ATtiny85.h.
| #define N_REG SREG |
Definition at line 165 of file ATtiny85.h.
| #define OC0A_BIT 0 |
Definition at line 569 of file ATtiny85.h.
| #define OC0A_PORT PORTB |
Definition at line 568 of file ATtiny85.h.
| #define OC0B_BIT 1 |
Definition at line 584 of file ATtiny85.h.
| #define OC0B_PORT PORTB |
Definition at line 583 of file ATtiny85.h.
| #define OC1A_BIT 1 |
Definition at line 586 of file ATtiny85.h.
| #define OC1A_BIT 0 |
Definition at line 586 of file ATtiny85.h.
| #define OC1A_PORT PORTB |
Definition at line 585 of file ATtiny85.h.
| #define OC1A_PORT PORTB |
Definition at line 585 of file ATtiny85.h.
| #define OC1B_BIT 4 |
Definition at line 617 of file ATtiny85.h.
| #define OC1B_BIT 3 |
Definition at line 617 of file ATtiny85.h.
| #define OC1B_PORT PORTB |
Definition at line 616 of file ATtiny85.h.
| #define OC1B_PORT PORTB |
Definition at line 616 of file ATtiny85.h.
| #define OCF0A_REG TIFR |
Definition at line 422 of file ATtiny85.h.
| #define OCF0B_REG TIFR |
Definition at line 421 of file ATtiny85.h.
| #define OCF1A_REG TIFR |
Definition at line 425 of file ATtiny85.h.
| #define OCF1B_REG TIFR |
Definition at line 424 of file ATtiny85.h.
| #define OCIE0A_REG TIMSK |
Definition at line 219 of file ATtiny85.h.
| #define OCIE0B_REG TIMSK |
Definition at line 218 of file ATtiny85.h.
| #define OCIE1A_REG TIMSK |
Definition at line 222 of file ATtiny85.h.
| #define OCIE1B_REG TIMSK |
Definition at line 221 of file ATtiny85.h.
| #define OCR1A0_REG OCR1A |
Definition at line 513 of file ATtiny85.h.
| #define OCR1A1_REG OCR1A |
Definition at line 514 of file ATtiny85.h.
| #define OCR1A2_REG OCR1A |
Definition at line 515 of file ATtiny85.h.
| #define OCR1A3_REG OCR1A |
Definition at line 516 of file ATtiny85.h.
| #define OCR1A4_REG OCR1A |
Definition at line 517 of file ATtiny85.h.
| #define OCR1A5_REG OCR1A |
Definition at line 518 of file ATtiny85.h.
| #define OCR1A6_REG OCR1A |
Definition at line 519 of file ATtiny85.h.
| #define OCR1A7_REG OCR1A |
Definition at line 520 of file ATtiny85.h.
| #define OCR1B0_REG OCR1B |
Definition at line 483 of file ATtiny85.h.
| #define OCR1B1_REG OCR1B |
Definition at line 484 of file ATtiny85.h.
| #define OCR1B2_REG OCR1B |
Definition at line 485 of file ATtiny85.h.
| #define OCR1B3_REG OCR1B |
Definition at line 486 of file ATtiny85.h.
| #define OCR1B4_REG OCR1B |
Definition at line 487 of file ATtiny85.h.
| #define OCR1B5_REG OCR1B |
Definition at line 488 of file ATtiny85.h.
| #define OCR1B6_REG OCR1B |
Definition at line 489 of file ATtiny85.h.
| #define OCR1B7_REG OCR1B |
Definition at line 490 of file ATtiny85.h.
| #define OCR1C0_REG OCR1C |
Definition at line 493 of file ATtiny85.h.
| #define OCR1C1_REG OCR1C |
Definition at line 494 of file ATtiny85.h.
| #define OCR1C2_REG OCR1C |
Definition at line 495 of file ATtiny85.h.
| #define OCR1C3_REG OCR1C |
Definition at line 496 of file ATtiny85.h.
| #define OCR1C4_REG OCR1C |
Definition at line 497 of file ATtiny85.h.
| #define OCR1C5_REG OCR1C |
Definition at line 498 of file ATtiny85.h.
| #define OCR1C6_REG OCR1C |
Definition at line 499 of file ATtiny85.h.
| #define OCR1C7_REG OCR1C |
Definition at line 500 of file ATtiny85.h.
| #define PCIE_REG GIMSK |
Definition at line 131 of file ATtiny85.h.
| #define PCIF_REG GIFR |
Definition at line 213 of file ATtiny85.h.
| #define PCINT0_BIT 0 |
Definition at line 575 of file ATtiny85.h.
| #define PCINT0_PORT PORTB |
Definition at line 574 of file ATtiny85.h.
| #define PCINT0_REG PCMSK |
Definition at line 329 of file ATtiny85.h.
| #define PCINT1_BIT 1 |
Definition at line 588 of file ATtiny85.h.
| #define PCINT1_PORT PORTB |
Definition at line 587 of file ATtiny85.h.
| #define PCINT1_REG PCMSK |
Definition at line 330 of file ATtiny85.h.
| #define PCINT2_BIT 2 |
Definition at line 603 of file ATtiny85.h.
| #define PCINT2_PORT PORTB |
Definition at line 602 of file ATtiny85.h.
| #define PCINT2_REG PCMSK |
Definition at line 331 of file ATtiny85.h.
| #define PCINT3_BIT 4 |
Definition at line 621 of file ATtiny85.h.
| #define PCINT3_PORT PORTB |
Definition at line 620 of file ATtiny85.h.
| #define PCINT3_REG PCMSK |
Definition at line 332 of file ATtiny85.h.
| #define PCINT4_BIT 3 |
Definition at line 612 of file ATtiny85.h.
| #define PCINT4_PORT PORTB |
Definition at line 611 of file ATtiny85.h.
| #define PCINT4_REG PCMSK |
Definition at line 333 of file ATtiny85.h.
| #define PCINT5_BIT 5 |
Definition at line 628 of file ATtiny85.h.
| #define PCINT5_PORT PORTB |
Definition at line 627 of file ATtiny85.h.
| #define PCINT5_REG PCMSK |
Definition at line 334 of file ATtiny85.h.
| #define PCKE_REG PLLCSR |
Definition at line 441 of file ATtiny85.h.
| #define PGERS_REG SPMCSR |
Definition at line 338 of file ATtiny85.h.
| #define PGWRT_REG SPMCSR |
Definition at line 339 of file ATtiny85.h.
| #define PINB0_REG PINB |
Definition at line 532 of file ATtiny85.h.
| #define PINB1_REG PINB |
Definition at line 533 of file ATtiny85.h.
| #define PINB2_REG PINB |
Definition at line 534 of file ATtiny85.h.
| #define PINB3_REG PINB |
Definition at line 535 of file ATtiny85.h.
| #define PINB4_REG PINB |
Definition at line 536 of file ATtiny85.h.
| #define PINB5_REG PINB |
Definition at line 537 of file ATtiny85.h.
| #define PLLE_REG PLLCSR |
Definition at line 440 of file ATtiny85.h.
| #define PLOCK_REG PLLCSR |
Definition at line 439 of file ATtiny85.h.
| #define PORF_REG MCUSR |
Definition at line 315 of file ATtiny85.h.
| #define PORTB0_REG PORTB |
Definition at line 374 of file ATtiny85.h.
| #define PORTB1_REG PORTB |
Definition at line 375 of file ATtiny85.h.
| #define PORTB2_REG PORTB |
Definition at line 376 of file ATtiny85.h.
| #define PORTB3_REG PORTB |
Definition at line 377 of file ATtiny85.h.
| #define PORTB4_REG PORTB |
Definition at line 378 of file ATtiny85.h.
| #define PORTB5_REG PORTB |
Definition at line 379 of file ATtiny85.h.
| #define PRADC_REG PRR |
Definition at line 279 of file ATtiny85.h.
| #define PRTIM0_REG PRR |
Definition at line 281 of file ATtiny85.h.
| #define PRTIM1_REG PRR |
Definition at line 282 of file ATtiny85.h.
| #define PRUSI_REG PRR |
Definition at line 280 of file ATtiny85.h.
| #define PSR0_REG GTCCR |
Definition at line 199 of file ATtiny85.h.
| #define PSR1_REG GTCCR |
Definition at line 201 of file ATtiny85.h.
| #define PUD_REG MCUCR |
Definition at line 196 of file ATtiny85.h.
| #define PWM0A_NUM 0 |
Definition at line 103 of file ATtiny85.h.
| #define PWM0B_NUM 1 |
Definition at line 104 of file ATtiny85.h.
| #define PWM1A_NUM 2 |
Definition at line 105 of file ATtiny85.h.
| #define PWM1A_REG TCCR1 |
Definition at line 159 of file ATtiny85.h.
| #define PWM1B_NUM 3 |
Definition at line 106 of file ATtiny85.h.
| #define PWM1B_REG GTCCR |
Definition at line 206 of file ATtiny85.h.
| #define PWM_TOTAL_NUM 4 |
Definition at line 107 of file ATtiny85.h.
| #define REFS0_REG ADMUX |
Definition at line 149 of file ATtiny85.h.
| #define REFS1_REG ADMUX |
Definition at line 150 of file ATtiny85.h.
| #define REFS2_REG ADMUX |
Definition at line 147 of file ATtiny85.h.
| #define RESET_BIT 5 |
Definition at line 624 of file ATtiny85.h.
| #define RESET_PORT PORTB |
Definition at line 623 of file ATtiny85.h.
| #define RFLB_REG SPMCSR |
Definition at line 340 of file ATtiny85.h.
| #define S_REG SREG |
Definition at line 167 of file ATtiny85.h.
| #define SCK_BIT 2 |
Definition at line 591 of file ATtiny85.h.
| #define SCK_PORT PORTB |
Definition at line 590 of file ATtiny85.h.
| #define SCL_BIT 2 |
Definition at line 595 of file ATtiny85.h.
| #define SCL_PORT PORTB |
Definition at line 594 of file ATtiny85.h.
| #define SDA_BIT 0 |
Definition at line 565 of file ATtiny85.h.
| #define SDA_PORT PORTB |
Definition at line 564 of file ATtiny85.h.
| #define SE_REG MCUCR |
Definition at line 195 of file ATtiny85.h.
| #define SIG_INPUT_CAPTURE_TOTAL_NUM 0 |
Definition at line 110 of file ATtiny85.h.
| #define SIG_OUTPUT_COMPARE0A_NUM 0 |
Definition at line 96 of file ATtiny85.h.
| #define SIG_OUTPUT_COMPARE0B_NUM 1 |
Definition at line 97 of file ATtiny85.h.
| #define SIG_OUTPUT_COMPARE1A_NUM 2 |
Definition at line 98 of file ATtiny85.h.
| #define SIG_OUTPUT_COMPARE1B_NUM 3 |
Definition at line 99 of file ATtiny85.h.
| #define SIG_OUTPUT_COMPARE_TOTAL_NUM 4 |
Definition at line 100 of file ATtiny85.h.
| #define SIG_OVERFLOW0_NUM 0 |
Definition at line 91 of file ATtiny85.h.
| #define SIG_OVERFLOW1_NUM 1 |
Definition at line 92 of file ATtiny85.h.
| #define SIG_OVERFLOW_TOTAL_NUM 2 |
Definition at line 93 of file ATtiny85.h.
| #define SM0_REG MCUCR |
Definition at line 193 of file ATtiny85.h.
| #define SM1_REG MCUCR |
Definition at line 194 of file ATtiny85.h.
| #define SP0_REG SPL |
Definition at line 269 of file ATtiny85.h.
| #define SP1_REG SPL |
Definition at line 270 of file ATtiny85.h.
| #define SP2_REG SPL |
Definition at line 271 of file ATtiny85.h.
| #define SP3_REG SPL |
Definition at line 272 of file ATtiny85.h.
| #define SP4_REG SPL |
Definition at line 273 of file ATtiny85.h.
| #define SP5_REG SPL |
Definition at line 274 of file ATtiny85.h.
| #define SP6_REG SPL |
Definition at line 275 of file ATtiny85.h.
| #define SP7_REG SPL |
Definition at line 276 of file ATtiny85.h.
| #define SP8_REG SPH |
Definition at line 265 of file ATtiny85.h.
| #define SP9_REG SPH |
Definition at line 266 of file ATtiny85.h.
| #define SPMEN_REG SPMCSR |
Definition at line 337 of file ATtiny85.h.
| #define T0_BIT 2 |
Definition at line 599 of file ATtiny85.h.
| #define T0_PORT PORTB |
Definition at line 598 of file ATtiny85.h.
| #define T_REG SREG |
Definition at line 169 of file ATtiny85.h.
| #define TCNT0_0_REG TCNT0 |
Definition at line 392 of file ATtiny85.h.
| #define TCNT0_1_REG TCNT0 |
Definition at line 393 of file ATtiny85.h.
| #define TCNT0_2_REG TCNT0 |
Definition at line 394 of file ATtiny85.h.
| #define TCNT0_3_REG TCNT0 |
Definition at line 395 of file ATtiny85.h.
| #define TCNT0_4_REG TCNT0 |
Definition at line 396 of file ATtiny85.h.
| #define TCNT0_5_REG TCNT0 |
Definition at line 397 of file ATtiny85.h.
| #define TCNT0_6_REG TCNT0 |
Definition at line 398 of file ATtiny85.h.
| #define TCNT0_7_REG TCNT0 |
Definition at line 399 of file ATtiny85.h.
| #define TCNT1_0_REG TCNT1 |
Definition at line 402 of file ATtiny85.h.
| #define TCNT1_1_REG TCNT1 |
Definition at line 403 of file ATtiny85.h.
| #define TCNT1_2_REG TCNT1 |
Definition at line 404 of file ATtiny85.h.
| #define TCNT1_3_REG TCNT1 |
Definition at line 405 of file ATtiny85.h.
| #define TCNT1_4_REG TCNT1 |
Definition at line 406 of file ATtiny85.h.
| #define TCNT1_5_REG TCNT1 |
Definition at line 407 of file ATtiny85.h.
| #define TCNT1_6_REG TCNT1 |
Definition at line 408 of file ATtiny85.h.
| #define TCNT1_7_REG TCNT1 |
Definition at line 409 of file ATtiny85.h.
| #define TIMER0_AVAILABLE |
Definition at line 83 of file ATtiny85.h.
| #define TIMER0_PRESCALER_DIV_0 0 |
Definition at line 28 of file ATtiny85.h.
| #define TIMER0_PRESCALER_DIV_1 1 |
Definition at line 29 of file ATtiny85.h.
| #define TIMER0_PRESCALER_DIV_1024 5 |
Definition at line 33 of file ATtiny85.h.
| #define TIMER0_PRESCALER_DIV_256 4 |
Definition at line 32 of file ATtiny85.h.
| #define TIMER0_PRESCALER_DIV_64 3 |
Definition at line 31 of file ATtiny85.h.
| #define TIMER0_PRESCALER_DIV_8 2 |
Definition at line 30 of file ATtiny85.h.
| #define TIMER0_PRESCALER_DIV_FALL 6 |
Definition at line 34 of file ATtiny85.h.
| #define TIMER0_PRESCALER_DIV_RISE 7 |
Definition at line 35 of file ATtiny85.h.
| #define TIMER0_PRESCALER_REG_0 0 |
Definition at line 37 of file ATtiny85.h.
| #define TIMER0_PRESCALER_REG_1 1 |
Definition at line 38 of file ATtiny85.h.
| #define TIMER0_PRESCALER_REG_2 8 |
Definition at line 39 of file ATtiny85.h.
| #define TIMER0_PRESCALER_REG_3 64 |
Definition at line 40 of file ATtiny85.h.
| #define TIMER0_PRESCALER_REG_4 256 |
Definition at line 41 of file ATtiny85.h.
| #define TIMER0_PRESCALER_REG_5 1024 |
Definition at line 42 of file ATtiny85.h.
| #define TIMER0_PRESCALER_REG_6 -1 |
Definition at line 43 of file ATtiny85.h.
| #define TIMER0_PRESCALER_REG_7 -2 |
Definition at line 44 of file ATtiny85.h.
| #define TIMER0A_AVAILABLE |
Definition at line 84 of file ATtiny85.h.
| #define TIMER0B_AVAILABLE |
Definition at line 85 of file ATtiny85.h.
| #define TIMER1_AVAILABLE |
Definition at line 86 of file ATtiny85.h.
| #define TIMER1_PRESCALER_DIV_0 0 |
Definition at line 47 of file ATtiny85.h.
| #define TIMER1_PRESCALER_DIV_1 1 |
Definition at line 48 of file ATtiny85.h.
| #define TIMER1_PRESCALER_DIV_1024 11 |
Definition at line 58 of file ATtiny85.h.
| #define TIMER1_PRESCALER_DIV_128 8 |
Definition at line 55 of file ATtiny85.h.
| #define TIMER1_PRESCALER_DIV_16 5 |
Definition at line 52 of file ATtiny85.h.
| #define TIMER1_PRESCALER_DIV_16384 15 |
Definition at line 62 of file ATtiny85.h.
| #define TIMER1_PRESCALER_DIV_2 2 |
Definition at line 49 of file ATtiny85.h.
| #define TIMER1_PRESCALER_DIV_2048 12 |
Definition at line 59 of file ATtiny85.h.
| #define TIMER1_PRESCALER_DIV_256 9 |
Definition at line 56 of file ATtiny85.h.
| #define TIMER1_PRESCALER_DIV_32 6 |
Definition at line 53 of file ATtiny85.h.
| #define TIMER1_PRESCALER_DIV_4 3 |
Definition at line 50 of file ATtiny85.h.
| #define TIMER1_PRESCALER_DIV_4096 13 |
Definition at line 60 of file ATtiny85.h.
| #define TIMER1_PRESCALER_DIV_512 10 |
Definition at line 57 of file ATtiny85.h.
| #define TIMER1_PRESCALER_DIV_64 7 |
Definition at line 54 of file ATtiny85.h.
| #define TIMER1_PRESCALER_DIV_8 4 |
Definition at line 51 of file ATtiny85.h.
| #define TIMER1_PRESCALER_DIV_8192 14 |
Definition at line 61 of file ATtiny85.h.
| #define TIMER1_PRESCALER_REG_0 0 |
Definition at line 64 of file ATtiny85.h.
| #define TIMER1_PRESCALER_REG_1 1 |
Definition at line 65 of file ATtiny85.h.
| #define TIMER1_PRESCALER_REG_10 512 |
Definition at line 74 of file ATtiny85.h.
| #define TIMER1_PRESCALER_REG_11 1024 |
Definition at line 75 of file ATtiny85.h.
| #define TIMER1_PRESCALER_REG_12 2048 |
Definition at line 76 of file ATtiny85.h.
| #define TIMER1_PRESCALER_REG_13 4096 |
Definition at line 77 of file ATtiny85.h.
| #define TIMER1_PRESCALER_REG_14 8192 |
Definition at line 78 of file ATtiny85.h.
| #define TIMER1_PRESCALER_REG_15 16384 |
Definition at line 79 of file ATtiny85.h.
| #define TIMER1_PRESCALER_REG_2 2 |
Definition at line 66 of file ATtiny85.h.
| #define TIMER1_PRESCALER_REG_3 4 |
Definition at line 67 of file ATtiny85.h.
| #define TIMER1_PRESCALER_REG_4 8 |
Definition at line 68 of file ATtiny85.h.
| #define TIMER1_PRESCALER_REG_5 16 |
Definition at line 69 of file ATtiny85.h.
| #define TIMER1_PRESCALER_REG_6 32 |
Definition at line 70 of file ATtiny85.h.
| #define TIMER1_PRESCALER_REG_7 64 |
Definition at line 71 of file ATtiny85.h.
| #define TIMER1_PRESCALER_REG_8 128 |
Definition at line 72 of file ATtiny85.h.
| #define TIMER1_PRESCALER_REG_9 256 |
Definition at line 73 of file ATtiny85.h.
| #define TIMER1A_AVAILABLE |
Definition at line 87 of file ATtiny85.h.
| #define TIMER1B_AVAILABLE |
Definition at line 88 of file ATtiny85.h.
| #define TOIE0_REG TIMSK |
Definition at line 217 of file ATtiny85.h.
| #define TOIE1_REG TIMSK |
Definition at line 220 of file ATtiny85.h.
| #define TOV0_REG TIFR |
Definition at line 420 of file ATtiny85.h.
| #define TOV1_REG TIFR |
Definition at line 423 of file ATtiny85.h.
| #define TSM_REG GTCCR |
Definition at line 200 of file ATtiny85.h.
| #define USCK_BIT 2 |
Definition at line 593 of file ATtiny85.h.
| #define USCK_PORT PORTB |
Definition at line 592 of file ATtiny85.h.
| #define USIBR0_REG USIBR |
Definition at line 540 of file ATtiny85.h.
| #define USIBR1_REG USIBR |
Definition at line 541 of file ATtiny85.h.
| #define USIBR2_REG USIBR |
Definition at line 542 of file ATtiny85.h.
| #define USIBR3_REG USIBR |
Definition at line 543 of file ATtiny85.h.
| #define USIBR4_REG USIBR |
Definition at line 544 of file ATtiny85.h.
| #define USIBR5_REG USIBR |
Definition at line 545 of file ATtiny85.h.
| #define USIBR6_REG USIBR |
Definition at line 546 of file ATtiny85.h.
| #define USIBR7_REG USIBR |
Definition at line 547 of file ATtiny85.h.
| #define USICLK_REG USICR |
Definition at line 446 of file ATtiny85.h.
| #define USICNT0_REG USISR |
Definition at line 364 of file ATtiny85.h.
| #define USICNT1_REG USISR |
Definition at line 365 of file ATtiny85.h.
| #define USICNT2_REG USISR |
Definition at line 366 of file ATtiny85.h.
| #define USICNT3_REG USISR |
Definition at line 367 of file ATtiny85.h.
| #define USICS0_REG USICR |
Definition at line 447 of file ATtiny85.h.
| #define USICS1_REG USICR |
Definition at line 448 of file ATtiny85.h.
| #define USIDC_REG USISR |
Definition at line 368 of file ATtiny85.h.
| #define USIDR0_REG USIDR |
Definition at line 550 of file ATtiny85.h.
| #define USIDR1_REG USIDR |
Definition at line 551 of file ATtiny85.h.
| #define USIDR2_REG USIDR |
Definition at line 552 of file ATtiny85.h.
| #define USIDR3_REG USIDR |
Definition at line 553 of file ATtiny85.h.
| #define USIDR4_REG USIDR |
Definition at line 554 of file ATtiny85.h.
| #define USIDR5_REG USIDR |
Definition at line 555 of file ATtiny85.h.
| #define USIDR6_REG USIDR |
Definition at line 556 of file ATtiny85.h.
| #define USIDR7_REG USIDR |
Definition at line 557 of file ATtiny85.h.
| #define USIOIE_REG USICR |
Definition at line 451 of file ATtiny85.h.
| #define USIOIF_REG USISR |
Definition at line 370 of file ATtiny85.h.
| #define USIPF_REG USISR |
Definition at line 369 of file ATtiny85.h.
| #define USISIE_REG USICR |
Definition at line 452 of file ATtiny85.h.
| #define USISIF_REG USISR |
Definition at line 371 of file ATtiny85.h.
| #define USITC_REG USICR |
Definition at line 445 of file ATtiny85.h.
| #define USIWM0_REG USICR |
Definition at line 449 of file ATtiny85.h.
| #define USIWM1_REG USICR |
Definition at line 450 of file ATtiny85.h.
| #define V_REG SREG |
Definition at line 166 of file ATtiny85.h.
| #define WDCE_REG WDTCR |
Definition at line 125 of file ATtiny85.h.
| #define WDE_REG WDTCR |
Definition at line 124 of file ATtiny85.h.
| #define WDIE_REG WDTCR |
Definition at line 127 of file ATtiny85.h.
| #define WDIF_REG WDTCR |
Definition at line 128 of file ATtiny85.h.
| #define WDP0_REG WDTCR |
Definition at line 121 of file ATtiny85.h.
| #define WDP1_REG WDTCR |
Definition at line 122 of file ATtiny85.h.
| #define WDP2_REG WDTCR |
Definition at line 123 of file ATtiny85.h.
| #define WDP3_REG WDTCR |
Definition at line 126 of file ATtiny85.h.
| #define WDRF_REG MCUSR |
Definition at line 318 of file ATtiny85.h.
| #define WGM00_REG TCCR0A |
Definition at line 428 of file ATtiny85.h.
| #define WGM01_REG TCCR0A |
Definition at line 429 of file ATtiny85.h.
| #define WGM02_REG TCCR0B |
Definition at line 415 of file ATtiny85.h.
| #define XTAL1_BIT 3 |
Definition at line 610 of file ATtiny85.h.
| #define XTAL1_PORT PORTB |
Definition at line 609 of file ATtiny85.h.
| #define XTAL2_BIT 4 |
Definition at line 619 of file ATtiny85.h.
| #define XTAL2_PORT PORTB |
Definition at line 618 of file ATtiny85.h.
| #define Z_REG SREG |
Definition at line 164 of file ATtiny85.h.
1.5.6