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Defines | |
| #define | TIMER0_PRESCALER_DIV_0 0 |
| #define | TIMER0_PRESCALER_DIV_1 1 |
| #define | TIMER0_PRESCALER_DIV_8 2 |
| #define | TIMER0_PRESCALER_DIV_64 3 |
| #define | TIMER0_PRESCALER_DIV_256 4 |
| #define | TIMER0_PRESCALER_DIV_1024 5 |
| #define | TIMER0_PRESCALER_DIV_FALL 6 |
| #define | TIMER0_PRESCALER_DIV_RISE 7 |
| #define | TIMER0_PRESCALER_REG_0 0 |
| #define | TIMER0_PRESCALER_REG_1 1 |
| #define | TIMER0_PRESCALER_REG_2 8 |
| #define | TIMER0_PRESCALER_REG_3 64 |
| #define | TIMER0_PRESCALER_REG_4 256 |
| #define | TIMER0_PRESCALER_REG_5 1024 |
| #define | TIMER0_PRESCALER_REG_6 -1 |
| #define | TIMER0_PRESCALER_REG_7 -2 |
| #define | SIG_OVERFLOW_TOTAL_NUM 0 |
| #define | SIG_OUTPUT_COMPARE_TOTAL_NUM 0 |
| #define | PWM_TOTAL_NUM 0 |
| #define | SIG_INPUT_CAPTURE_TOTAL_NUM 0 |
| #define | CLKPS0_REG CLKPR |
| #define | CLKPS1_REG CLKPR |
| #define | CLKPS2_REG CLKPR |
| #define | CLKPS3_REG CLKPR |
| #define | CLKPCE_REG CLKPR |
| #define | WDP0_REG WDTCR |
| #define | WDP1_REG WDTCR |
| #define | WDP2_REG WDTCR |
| #define | WDE_REG WDTCR |
| #define | WDCE_REG WDTCR |
| #define | WDP3_REG WDTCR |
| #define | WDTIE_REG WDTCR |
| #define | WDTIF_REG WDTCR |
| #define | PCIE_REG GIMSK |
| #define | INT0_REG GIMSK |
| #define | MUX0_REG ADMUX |
| #define | MUX1_REG ADMUX |
| #define | ADLAR_REG ADMUX |
| #define | REFS0_REG ADMUX |
| #define | C_REG SREG |
| #define | Z_REG SREG |
| #define | N_REG SREG |
| #define | V_REG SREG |
| #define | S_REG SREG |
| #define | H_REG SREG |
| #define | T_REG SREG |
| #define | I_REG SREG |
| #define | DDB0_REG DDRB |
| #define | DDB1_REG DDRB |
| #define | DDB2_REG DDRB |
| #define | DDB3_REG DDRB |
| #define | DDB4_REG DDRB |
| #define | DDB5_REG DDRB |
| #define | EEDR0_REG EEDR |
| #define | EEDR1_REG EEDR |
| #define | EEDR2_REG EEDR |
| #define | EEDR3_REG EEDR |
| #define | EEDR4_REG EEDR |
| #define | EEDR5_REG EEDR |
| #define | EEDR6_REG EEDR |
| #define | EEDR7_REG EEDR |
| #define | ACIS0_REG ACSR |
| #define | ACIS1_REG ACSR |
| #define | ACIE_REG ACSR |
| #define | ACI_REG ACSR |
| #define | ACO_REG ACSR |
| #define | ACBG_REG ACSR |
| #define | ACD_REG ACSR |
| #define | PSR10_REG GTCCR |
| #define | TSM_REG GTCCR |
| #define | PCIF_REG GIFR |
| #define | INTF0_REG GIFR |
| #define | CAL0_REG OSCCAL |
| #define | CAL1_REG OSCCAL |
| #define | CAL2_REG OSCCAL |
| #define | CAL3_REG OSCCAL |
| #define | CAL4_REG OSCCAL |
| #define | CAL5_REG OSCCAL |
| #define | CAL6_REG OSCCAL |
| #define | ADPS0_REG ADCSRA |
| #define | ADPS1_REG ADCSRA |
| #define | ADPS2_REG ADCSRA |
| #define | ADIE_REG ADCSRA |
| #define | ADIF_REG ADCSRA |
| #define | ADATE_REG ADCSRA |
| #define | ADSC_REG ADCSRA |
| #define | ADEN_REG ADCSRA |
| #define | ADTS0_REG ADCSRB |
| #define | ADTS1_REG ADCSRB |
| #define | ADTS2_REG ADCSRB |
| #define | ACME_REG ADCSRB |
| #define | OCR0A_0_REG OCR0A |
| #define | OCR0A_1_REG OCR0A |
| #define | OCR0A_2_REG OCR0A |
| #define | OCR0A_3_REG OCR0A |
| #define | OCR0A_4_REG OCR0A |
| #define | OCR0A_5_REG OCR0A |
| #define | OCR0A_6_REG OCR0A |
| #define | OCR0A_7_REG OCR0A |
| #define | OCR0B_0_REG OCR0B |
| #define | OCR0B_1_REG OCR0B |
| #define | OCR0B_2_REG OCR0B |
| #define | OCR0B_3_REG OCR0B |
| #define | OCR0B_4_REG OCR0B |
| #define | OCR0B_5_REG OCR0B |
| #define | OCR0B_6_REG OCR0B |
| #define | OCR0B_7_REG OCR0B |
| #define | SP0_REG SPL |
| #define | SP1_REG SPL |
| #define | SP2_REG SPL |
| #define | SP3_REG SPL |
| #define | SP4_REG SPL |
| #define | SP5_REG SPL |
| #define | SP6_REG SPL |
| #define | SP7_REG SPL |
| #define | PRADC_REG PRR |
| #define | PRTIM0_REG PRR |
| #define | PORF_REG MCUSR |
| #define | EXTRF_REG MCUSR |
| #define | BORF_REG MCUSR |
| #define | WDRF_REG MCUSR |
| #define | EERE_REG EECR |
| #define | EEWE_REG EECR |
| #define | EEMWE_REG EECR |
| #define | EERIE_REG EECR |
| #define | EEPM0_REG EECR |
| #define | EEPM1_REG EECR |
| #define | PCINT0_REG PCMSK |
| #define | PCINT1_REG PCMSK |
| #define | PCINT2_REG PCMSK |
| #define | PCINT3_REG PCMSK |
| #define | PCINT4_REG PCMSK |
| #define | PCINT5_REG PCMSK |
| #define | SPMEN_REG SPMCSR |
| #define | PGERS_REG SPMCSR |
| #define | PGWRT_REG SPMCSR |
| #define | RFLB_REG SPMCSR |
| #define | CTPB_REG SPMCSR |
| #define | ADCL0_REG ADCL |
| #define | ADCL1_REG ADCL |
| #define | ADCL2_REG ADCL |
| #define | ADCL3_REG ADCL |
| #define | ADCL4_REG ADCL |
| #define | ADCL5_REG ADCL |
| #define | ADCL6_REG ADCL |
| #define | ADCL7_REG ADCL |
| #define | EEAR0_REG EEAR |
| #define | EEAR1_REG EEAR |
| #define | EEAR2_REG EEAR |
| #define | EEAR3_REG EEAR |
| #define | EEAR4_REG EEAR |
| #define | EEAR5_REG EEAR |
| #define | PORTB0_REG PORTB |
| #define | PORTB1_REG PORTB |
| #define | PORTB2_REG PORTB |
| #define | PORTB3_REG PORTB |
| #define | PORTB4_REG PORTB |
| #define | PORTB5_REG PORTB |
| #define | BPDSE_REG BODCR |
| #define | BPDS_REG BODCR |
| #define | ADCH0_REG ADCH |
| #define | ADCH1_REG ADCH |
| #define | ADCH2_REG ADCH |
| #define | ADCH3_REG ADCH |
| #define | ADCH4_REG ADCH |
| #define | ADCH5_REG ADCH |
| #define | ADCH6_REG ADCH |
| #define | ADCH7_REG ADCH |
| #define | TCNT0_0_REG TCNT0 |
| #define | TCNT0_1_REG TCNT0 |
| #define | TCNT0_2_REG TCNT0 |
| #define | TCNT0_3_REG TCNT0 |
| #define | TCNT0_4_REG TCNT0 |
| #define | TCNT0_5_REG TCNT0 |
| #define | TCNT0_6_REG TCNT0 |
| #define | TCNT0_7_REG TCNT0 |
| #define | TOIE0_REG TIMSK0 |
| #define | OCIE0A_REG TIMSK0 |
| #define | OCIE0B_REG TIMSK0 |
| #define | CS00_REG TCCR0B |
| #define | CS01_REG TCCR0B |
| #define | CS02_REG TCCR0B |
| #define | WGM02_REG TCCR0B |
| #define | FOC0B_REG TCCR0B |
| #define | FOC0A_REG TCCR0B |
| #define | WGM00_REG TCCR0A |
| #define | WGM01_REG TCCR0A |
| #define | COM0B0_REG TCCR0A |
| #define | COM0B1_REG TCCR0A |
| #define | COM0A0_REG TCCR0A |
| #define | COM0A1_REG TCCR0A |
| #define | DWDR0_REG DWDR |
| #define | DWDR1_REG DWDR |
| #define | DWDR2_REG DWDR |
| #define | DWDR3_REG DWDR |
| #define | DWDR4_REG DWDR |
| #define | DWDR5_REG DWDR |
| #define | DWDR6_REG DWDR |
| #define | DWDR7_REG DWDR |
| #define | ADC1D_REG DIDR0 |
| #define | ADC3D_REG DIDR0 |
| #define | ADC2D_REG DIDR0 |
| #define | ADC0D_REG DIDR0 |
| #define | AIN0D_REG DIDR0 |
| #define | AIN1D_REG DIDR0 |
| #define | ISC00_REG MCUCR |
| #define | ISC01_REG MCUCR |
| #define | SM0_REG MCUCR |
| #define | SM1_REG MCUCR |
| #define | SE_REG MCUCR |
| #define | PUD_REG MCUCR |
| #define | PINB0_REG PINB |
| #define | PINB1_REG PINB |
| #define | PINB2_REG PINB |
| #define | PINB3_REG PINB |
| #define | PINB4_REG PINB |
| #define | PINB5_REG PINB |
| #define | TOV0_REG TIFR0 |
| #define | OCF0A_REG TIFR0 |
| #define | OCF0B_REG TIFR0 |
| #define | MOSI_PORT PORTB |
| #define | MOSI_BIT 0 |
| #define | AIN0_PORT PORTB |
| #define | AIN0_BIT 0 |
| #define | OC0A_PORT PORTB |
| #define | OC0A_BIT 0 |
| #define | TXD_PORT PORTB |
| #define | TXD_BIT 0 |
| #define | PCINT0_PORT PORTB |
| #define | PCINT0_BIT 0 |
| #define | MISO_PORT PORTB |
| #define | MISO_BIT 1 |
| #define | INT0_PORT PORTB |
| #define | INT0_BIT 1 |
| #define | AIN1_PORT PORTB |
| #define | AIN1_BIT 1 |
| #define | OC0B_PORT PORTB |
| #define | OC0B_BIT 1 |
| #define | INT0_PORT PORTB |
| #define | INT0_BIT 1 |
| #define | RXD_PORT PORTB |
| #define | RXD_BIT 1 |
| #define | PCINT1_PORT PORTB |
| #define | PCINT1_BIT 1 |
| #define | SCK_PORT PORTB |
| #define | SCK_BIT 2 |
| #define | ADC1_PORT PORTB |
| #define | ADC1_BIT 2 |
| #define | T0_PORT PORTB |
| #define | T0_BIT 2 |
| #define | PCINT2_PORT PORTB |
| #define | PCINT2_BIT 2 |
| #define ACBG_REG ACSR |
Definition at line 123 of file ATtiny13A.h.
| #define ACD_REG ACSR |
Definition at line 124 of file ATtiny13A.h.
| #define ACI_REG ACSR |
Definition at line 121 of file ATtiny13A.h.
| #define ACIE_REG ACSR |
Definition at line 120 of file ATtiny13A.h.
| #define ACIS0_REG ACSR |
Definition at line 118 of file ATtiny13A.h.
| #define ACIS1_REG ACSR |
Definition at line 119 of file ATtiny13A.h.
| #define ACME_REG ADCSRB |
Definition at line 157 of file ATtiny13A.h.
| #define ACO_REG ACSR |
Definition at line 122 of file ATtiny13A.h.
| #define ADATE_REG ADCSRA |
Definition at line 149 of file ATtiny13A.h.
| #define ADC0D_REG DIDR0 |
Definition at line 307 of file ATtiny13A.h.
| #define ADC1_BIT 2 |
Definition at line 362 of file ATtiny13A.h.
| #define ADC1_PORT PORTB |
Definition at line 361 of file ATtiny13A.h.
| #define ADC1D_REG DIDR0 |
Definition at line 304 of file ATtiny13A.h.
| #define ADC2D_REG DIDR0 |
Definition at line 306 of file ATtiny13A.h.
| #define ADC3D_REG DIDR0 |
Definition at line 305 of file ATtiny13A.h.
| #define ADCH0_REG ADCH |
Definition at line 253 of file ATtiny13A.h.
| #define ADCH1_REG ADCH |
Definition at line 254 of file ATtiny13A.h.
| #define ADCH2_REG ADCH |
Definition at line 255 of file ATtiny13A.h.
| #define ADCH3_REG ADCH |
Definition at line 256 of file ATtiny13A.h.
| #define ADCH4_REG ADCH |
Definition at line 257 of file ATtiny13A.h.
| #define ADCH5_REG ADCH |
Definition at line 258 of file ATtiny13A.h.
| #define ADCH6_REG ADCH |
Definition at line 259 of file ATtiny13A.h.
| #define ADCH7_REG ADCH |
Definition at line 260 of file ATtiny13A.h.
| #define ADCL0_REG ADCL |
Definition at line 223 of file ATtiny13A.h.
| #define ADCL1_REG ADCL |
Definition at line 224 of file ATtiny13A.h.
| #define ADCL2_REG ADCL |
Definition at line 225 of file ATtiny13A.h.
| #define ADCL3_REG ADCL |
Definition at line 226 of file ATtiny13A.h.
| #define ADCL4_REG ADCL |
Definition at line 227 of file ATtiny13A.h.
| #define ADCL5_REG ADCL |
Definition at line 228 of file ATtiny13A.h.
| #define ADCL6_REG ADCL |
Definition at line 229 of file ATtiny13A.h.
| #define ADCL7_REG ADCL |
Definition at line 230 of file ATtiny13A.h.
| #define ADEN_REG ADCSRA |
Definition at line 151 of file ATtiny13A.h.
| #define ADIE_REG ADCSRA |
Definition at line 147 of file ATtiny13A.h.
| #define ADIF_REG ADCSRA |
Definition at line 148 of file ATtiny13A.h.
| #define ADLAR_REG ADMUX |
Definition at line 86 of file ATtiny13A.h.
| #define ADPS0_REG ADCSRA |
Definition at line 144 of file ATtiny13A.h.
| #define ADPS1_REG ADCSRA |
Definition at line 145 of file ATtiny13A.h.
| #define ADPS2_REG ADCSRA |
Definition at line 146 of file ATtiny13A.h.
| #define ADSC_REG ADCSRA |
Definition at line 150 of file ATtiny13A.h.
| #define ADTS0_REG ADCSRB |
Definition at line 154 of file ATtiny13A.h.
| #define ADTS1_REG ADCSRB |
Definition at line 155 of file ATtiny13A.h.
| #define ADTS2_REG ADCSRB |
Definition at line 156 of file ATtiny13A.h.
| #define AIN0_BIT 0 |
Definition at line 336 of file ATtiny13A.h.
| #define AIN0_PORT PORTB |
Definition at line 335 of file ATtiny13A.h.
| #define AIN0D_REG DIDR0 |
Definition at line 308 of file ATtiny13A.h.
| #define AIN1_BIT 1 |
Definition at line 349 of file ATtiny13A.h.
| #define AIN1_PORT PORTB |
Definition at line 348 of file ATtiny13A.h.
| #define AIN1D_REG DIDR0 |
Definition at line 309 of file ATtiny13A.h.
| #define BORF_REG MCUSR |
Definition at line 196 of file ATtiny13A.h.
| #define BPDS_REG BODCR |
Definition at line 250 of file ATtiny13A.h.
| #define BPDSE_REG BODCR |
Definition at line 249 of file ATtiny13A.h.
| #define C_REG SREG |
Definition at line 90 of file ATtiny13A.h.
| #define CAL0_REG OSCCAL |
Definition at line 135 of file ATtiny13A.h.
| #define CAL1_REG OSCCAL |
Definition at line 136 of file ATtiny13A.h.
| #define CAL2_REG OSCCAL |
Definition at line 137 of file ATtiny13A.h.
| #define CAL3_REG OSCCAL |
Definition at line 138 of file ATtiny13A.h.
| #define CAL4_REG OSCCAL |
Definition at line 139 of file ATtiny13A.h.
| #define CAL5_REG OSCCAL |
Definition at line 140 of file ATtiny13A.h.
| #define CAL6_REG OSCCAL |
Definition at line 141 of file ATtiny13A.h.
| #define CLKPCE_REG CLKPR |
Definition at line 67 of file ATtiny13A.h.
| #define CLKPS0_REG CLKPR |
Definition at line 63 of file ATtiny13A.h.
| #define CLKPS1_REG CLKPR |
Definition at line 64 of file ATtiny13A.h.
| #define CLKPS2_REG CLKPR |
Definition at line 65 of file ATtiny13A.h.
| #define CLKPS3_REG CLKPR |
Definition at line 66 of file ATtiny13A.h.
| #define COM0A0_REG TCCR0A |
Definition at line 290 of file ATtiny13A.h.
| #define COM0A1_REG TCCR0A |
Definition at line 291 of file ATtiny13A.h.
| #define COM0B0_REG TCCR0A |
Definition at line 288 of file ATtiny13A.h.
| #define COM0B1_REG TCCR0A |
Definition at line 289 of file ATtiny13A.h.
| #define CS00_REG TCCR0B |
Definition at line 278 of file ATtiny13A.h.
| #define CS01_REG TCCR0B |
Definition at line 279 of file ATtiny13A.h.
| #define CS02_REG TCCR0B |
Definition at line 280 of file ATtiny13A.h.
| #define CTPB_REG SPMCSR |
Definition at line 220 of file ATtiny13A.h.
| #define DDB0_REG DDRB |
Definition at line 100 of file ATtiny13A.h.
| #define DDB1_REG DDRB |
Definition at line 101 of file ATtiny13A.h.
| #define DDB2_REG DDRB |
Definition at line 102 of file ATtiny13A.h.
| #define DDB3_REG DDRB |
Definition at line 103 of file ATtiny13A.h.
| #define DDB4_REG DDRB |
Definition at line 104 of file ATtiny13A.h.
| #define DDB5_REG DDRB |
Definition at line 105 of file ATtiny13A.h.
| #define DWDR0_REG DWDR |
Definition at line 294 of file ATtiny13A.h.
| #define DWDR1_REG DWDR |
Definition at line 295 of file ATtiny13A.h.
| #define DWDR2_REG DWDR |
Definition at line 296 of file ATtiny13A.h.
| #define DWDR3_REG DWDR |
Definition at line 297 of file ATtiny13A.h.
| #define DWDR4_REG DWDR |
Definition at line 298 of file ATtiny13A.h.
| #define DWDR5_REG DWDR |
Definition at line 299 of file ATtiny13A.h.
| #define DWDR6_REG DWDR |
Definition at line 300 of file ATtiny13A.h.
| #define DWDR7_REG DWDR |
Definition at line 301 of file ATtiny13A.h.
| #define EEAR0_REG EEAR |
Definition at line 233 of file ATtiny13A.h.
| #define EEAR1_REG EEAR |
Definition at line 234 of file ATtiny13A.h.
| #define EEAR2_REG EEAR |
Definition at line 235 of file ATtiny13A.h.
| #define EEAR3_REG EEAR |
Definition at line 236 of file ATtiny13A.h.
| #define EEAR4_REG EEAR |
Definition at line 237 of file ATtiny13A.h.
| #define EEAR5_REG EEAR |
Definition at line 238 of file ATtiny13A.h.
| #define EEDR0_REG EEDR |
Definition at line 108 of file ATtiny13A.h.
| #define EEDR1_REG EEDR |
Definition at line 109 of file ATtiny13A.h.
| #define EEDR2_REG EEDR |
Definition at line 110 of file ATtiny13A.h.
| #define EEDR3_REG EEDR |
Definition at line 111 of file ATtiny13A.h.
| #define EEDR4_REG EEDR |
Definition at line 112 of file ATtiny13A.h.
| #define EEDR5_REG EEDR |
Definition at line 113 of file ATtiny13A.h.
| #define EEDR6_REG EEDR |
Definition at line 114 of file ATtiny13A.h.
| #define EEDR7_REG EEDR |
Definition at line 115 of file ATtiny13A.h.
| #define EEMWE_REG EECR |
Definition at line 202 of file ATtiny13A.h.
| #define EEPM0_REG EECR |
Definition at line 204 of file ATtiny13A.h.
| #define EEPM1_REG EECR |
Definition at line 205 of file ATtiny13A.h.
| #define EERE_REG EECR |
Definition at line 200 of file ATtiny13A.h.
| #define EERIE_REG EECR |
Definition at line 203 of file ATtiny13A.h.
| #define EEWE_REG EECR |
Definition at line 201 of file ATtiny13A.h.
| #define EXTRF_REG MCUSR |
Definition at line 195 of file ATtiny13A.h.
| #define FOC0A_REG TCCR0B |
Definition at line 283 of file ATtiny13A.h.
| #define FOC0B_REG TCCR0B |
Definition at line 282 of file ATtiny13A.h.
| #define H_REG SREG |
Definition at line 95 of file ATtiny13A.h.
| #define I_REG SREG |
Definition at line 97 of file ATtiny13A.h.
| #define INT0_BIT 1 |
Definition at line 353 of file ATtiny13A.h.
| #define INT0_BIT 1 |
Definition at line 353 of file ATtiny13A.h.
| #define INT0_PORT PORTB |
Definition at line 352 of file ATtiny13A.h.
| #define INT0_PORT PORTB |
Definition at line 352 of file ATtiny13A.h.
| #define INT0_REG GIMSK |
Definition at line 81 of file ATtiny13A.h.
| #define INTF0_REG GIFR |
Definition at line 132 of file ATtiny13A.h.
| #define ISC00_REG MCUCR |
Definition at line 312 of file ATtiny13A.h.
| #define ISC01_REG MCUCR |
Definition at line 313 of file ATtiny13A.h.
| #define MISO_BIT 1 |
Definition at line 345 of file ATtiny13A.h.
| #define MISO_PORT PORTB |
Definition at line 344 of file ATtiny13A.h.
| #define MOSI_BIT 0 |
Definition at line 334 of file ATtiny13A.h.
| #define MOSI_PORT PORTB |
Definition at line 333 of file ATtiny13A.h.
| #define MUX0_REG ADMUX |
Definition at line 84 of file ATtiny13A.h.
| #define MUX1_REG ADMUX |
Definition at line 85 of file ATtiny13A.h.
| #define N_REG SREG |
Definition at line 92 of file ATtiny13A.h.
| #define OC0A_BIT 0 |
Definition at line 338 of file ATtiny13A.h.
| #define OC0A_PORT PORTB |
Definition at line 337 of file ATtiny13A.h.
| #define OC0B_BIT 1 |
Definition at line 351 of file ATtiny13A.h.
| #define OC0B_PORT PORTB |
Definition at line 350 of file ATtiny13A.h.
| #define OCF0A_REG TIFR0 |
Definition at line 329 of file ATtiny13A.h.
| #define OCF0B_REG TIFR0 |
Definition at line 330 of file ATtiny13A.h.
| #define OCIE0A_REG TIMSK0 |
Definition at line 274 of file ATtiny13A.h.
| #define OCIE0B_REG TIMSK0 |
Definition at line 275 of file ATtiny13A.h.
| #define OCR0A_0_REG OCR0A |
Definition at line 160 of file ATtiny13A.h.
| #define OCR0A_1_REG OCR0A |
Definition at line 161 of file ATtiny13A.h.
| #define OCR0A_2_REG OCR0A |
Definition at line 162 of file ATtiny13A.h.
| #define OCR0A_3_REG OCR0A |
Definition at line 163 of file ATtiny13A.h.
| #define OCR0A_4_REG OCR0A |
Definition at line 164 of file ATtiny13A.h.
| #define OCR0A_5_REG OCR0A |
Definition at line 165 of file ATtiny13A.h.
| #define OCR0A_6_REG OCR0A |
Definition at line 166 of file ATtiny13A.h.
| #define OCR0A_7_REG OCR0A |
Definition at line 167 of file ATtiny13A.h.
| #define OCR0B_0_REG OCR0B |
Definition at line 170 of file ATtiny13A.h.
| #define OCR0B_1_REG OCR0B |
Definition at line 171 of file ATtiny13A.h.
| #define OCR0B_2_REG OCR0B |
Definition at line 172 of file ATtiny13A.h.
| #define OCR0B_3_REG OCR0B |
Definition at line 173 of file ATtiny13A.h.
| #define OCR0B_4_REG OCR0B |
Definition at line 174 of file ATtiny13A.h.
| #define OCR0B_5_REG OCR0B |
Definition at line 175 of file ATtiny13A.h.
| #define OCR0B_6_REG OCR0B |
Definition at line 176 of file ATtiny13A.h.
| #define OCR0B_7_REG OCR0B |
Definition at line 177 of file ATtiny13A.h.
| #define PCIE_REG GIMSK |
Definition at line 80 of file ATtiny13A.h.
| #define PCIF_REG GIFR |
Definition at line 131 of file ATtiny13A.h.
| #define PCINT0_BIT 0 |
Definition at line 342 of file ATtiny13A.h.
| #define PCINT0_PORT PORTB |
Definition at line 341 of file ATtiny13A.h.
| #define PCINT0_REG PCMSK |
Definition at line 208 of file ATtiny13A.h.
| #define PCINT1_BIT 1 |
Definition at line 357 of file ATtiny13A.h.
| #define PCINT1_PORT PORTB |
Definition at line 356 of file ATtiny13A.h.
| #define PCINT1_REG PCMSK |
Definition at line 209 of file ATtiny13A.h.
| #define PCINT2_BIT 2 |
Definition at line 366 of file ATtiny13A.h.
| #define PCINT2_PORT PORTB |
Definition at line 365 of file ATtiny13A.h.
| #define PCINT2_REG PCMSK |
Definition at line 210 of file ATtiny13A.h.
| #define PCINT3_REG PCMSK |
Definition at line 211 of file ATtiny13A.h.
| #define PCINT4_REG PCMSK |
Definition at line 212 of file ATtiny13A.h.
| #define PCINT5_REG PCMSK |
Definition at line 213 of file ATtiny13A.h.
| #define PGERS_REG SPMCSR |
Definition at line 217 of file ATtiny13A.h.
| #define PGWRT_REG SPMCSR |
Definition at line 218 of file ATtiny13A.h.
| #define PINB0_REG PINB |
Definition at line 320 of file ATtiny13A.h.
| #define PINB1_REG PINB |
Definition at line 321 of file ATtiny13A.h.
| #define PINB2_REG PINB |
Definition at line 322 of file ATtiny13A.h.
| #define PINB3_REG PINB |
Definition at line 323 of file ATtiny13A.h.
| #define PINB4_REG PINB |
Definition at line 324 of file ATtiny13A.h.
| #define PINB5_REG PINB |
Definition at line 325 of file ATtiny13A.h.
| #define PORF_REG MCUSR |
Definition at line 194 of file ATtiny13A.h.
| #define PORTB0_REG PORTB |
Definition at line 241 of file ATtiny13A.h.
| #define PORTB1_REG PORTB |
Definition at line 242 of file ATtiny13A.h.
| #define PORTB2_REG PORTB |
Definition at line 243 of file ATtiny13A.h.
| #define PORTB3_REG PORTB |
Definition at line 244 of file ATtiny13A.h.
| #define PORTB4_REG PORTB |
Definition at line 245 of file ATtiny13A.h.
| #define PORTB5_REG PORTB |
Definition at line 246 of file ATtiny13A.h.
| #define PRADC_REG PRR |
Definition at line 190 of file ATtiny13A.h.
| #define PRTIM0_REG PRR |
Definition at line 191 of file ATtiny13A.h.
| #define PSR10_REG GTCCR |
Definition at line 127 of file ATtiny13A.h.
| #define PUD_REG MCUCR |
Definition at line 317 of file ATtiny13A.h.
| #define PWM_TOTAL_NUM 0 |
Definition at line 56 of file ATtiny13A.h.
| #define REFS0_REG ADMUX |
Definition at line 87 of file ATtiny13A.h.
| #define RFLB_REG SPMCSR |
Definition at line 219 of file ATtiny13A.h.
| #define RXD_BIT 1 |
Definition at line 355 of file ATtiny13A.h.
| #define RXD_PORT PORTB |
Definition at line 354 of file ATtiny13A.h.
| #define S_REG SREG |
Definition at line 94 of file ATtiny13A.h.
| #define SCK_BIT 2 |
Definition at line 360 of file ATtiny13A.h.
| #define SCK_PORT PORTB |
Definition at line 359 of file ATtiny13A.h.
| #define SE_REG MCUCR |
Definition at line 316 of file ATtiny13A.h.
| #define SIG_INPUT_CAPTURE_TOTAL_NUM 0 |
Definition at line 59 of file ATtiny13A.h.
| #define SIG_OUTPUT_COMPARE_TOTAL_NUM 0 |
Definition at line 53 of file ATtiny13A.h.
| #define SIG_OVERFLOW_TOTAL_NUM 0 |
Definition at line 50 of file ATtiny13A.h.
| #define SM0_REG MCUCR |
Definition at line 314 of file ATtiny13A.h.
| #define SM1_REG MCUCR |
Definition at line 315 of file ATtiny13A.h.
| #define SP0_REG SPL |
Definition at line 180 of file ATtiny13A.h.
| #define SP1_REG SPL |
Definition at line 181 of file ATtiny13A.h.
| #define SP2_REG SPL |
Definition at line 182 of file ATtiny13A.h.
| #define SP3_REG SPL |
Definition at line 183 of file ATtiny13A.h.
| #define SP4_REG SPL |
Definition at line 184 of file ATtiny13A.h.
| #define SP5_REG SPL |
Definition at line 185 of file ATtiny13A.h.
| #define SP6_REG SPL |
Definition at line 186 of file ATtiny13A.h.
| #define SP7_REG SPL |
Definition at line 187 of file ATtiny13A.h.
| #define SPMEN_REG SPMCSR |
Definition at line 216 of file ATtiny13A.h.
| #define T0_BIT 2 |
Definition at line 364 of file ATtiny13A.h.
| #define T0_PORT PORTB |
Definition at line 363 of file ATtiny13A.h.
| #define T_REG SREG |
Definition at line 96 of file ATtiny13A.h.
| #define TCNT0_0_REG TCNT0 |
Definition at line 263 of file ATtiny13A.h.
| #define TCNT0_1_REG TCNT0 |
Definition at line 264 of file ATtiny13A.h.
| #define TCNT0_2_REG TCNT0 |
Definition at line 265 of file ATtiny13A.h.
| #define TCNT0_3_REG TCNT0 |
Definition at line 266 of file ATtiny13A.h.
| #define TCNT0_4_REG TCNT0 |
Definition at line 267 of file ATtiny13A.h.
| #define TCNT0_5_REG TCNT0 |
Definition at line 268 of file ATtiny13A.h.
| #define TCNT0_6_REG TCNT0 |
Definition at line 269 of file ATtiny13A.h.
| #define TCNT0_7_REG TCNT0 |
Definition at line 270 of file ATtiny13A.h.
| #define TIMER0_PRESCALER_DIV_0 0 |
Definition at line 28 of file ATtiny13A.h.
| #define TIMER0_PRESCALER_DIV_1 1 |
Definition at line 29 of file ATtiny13A.h.
| #define TIMER0_PRESCALER_DIV_1024 5 |
Definition at line 33 of file ATtiny13A.h.
| #define TIMER0_PRESCALER_DIV_256 4 |
Definition at line 32 of file ATtiny13A.h.
| #define TIMER0_PRESCALER_DIV_64 3 |
Definition at line 31 of file ATtiny13A.h.
| #define TIMER0_PRESCALER_DIV_8 2 |
Definition at line 30 of file ATtiny13A.h.
| #define TIMER0_PRESCALER_DIV_FALL 6 |
Definition at line 34 of file ATtiny13A.h.
| #define TIMER0_PRESCALER_DIV_RISE 7 |
Definition at line 35 of file ATtiny13A.h.
| #define TIMER0_PRESCALER_REG_0 0 |
Definition at line 37 of file ATtiny13A.h.
| #define TIMER0_PRESCALER_REG_1 1 |
Definition at line 38 of file ATtiny13A.h.
| #define TIMER0_PRESCALER_REG_2 8 |
Definition at line 39 of file ATtiny13A.h.
| #define TIMER0_PRESCALER_REG_3 64 |
Definition at line 40 of file ATtiny13A.h.
| #define TIMER0_PRESCALER_REG_4 256 |
Definition at line 41 of file ATtiny13A.h.
| #define TIMER0_PRESCALER_REG_5 1024 |
Definition at line 42 of file ATtiny13A.h.
| #define TIMER0_PRESCALER_REG_6 -1 |
Definition at line 43 of file ATtiny13A.h.
| #define TIMER0_PRESCALER_REG_7 -2 |
Definition at line 44 of file ATtiny13A.h.
| #define TOIE0_REG TIMSK0 |
Definition at line 273 of file ATtiny13A.h.
| #define TOV0_REG TIFR0 |
Definition at line 328 of file ATtiny13A.h.
| #define TSM_REG GTCCR |
Definition at line 128 of file ATtiny13A.h.
| #define TXD_BIT 0 |
Definition at line 340 of file ATtiny13A.h.
| #define TXD_PORT PORTB |
Definition at line 339 of file ATtiny13A.h.
| #define V_REG SREG |
Definition at line 93 of file ATtiny13A.h.
| #define WDCE_REG WDTCR |
Definition at line 74 of file ATtiny13A.h.
| #define WDE_REG WDTCR |
Definition at line 73 of file ATtiny13A.h.
| #define WDP0_REG WDTCR |
Definition at line 70 of file ATtiny13A.h.
| #define WDP1_REG WDTCR |
Definition at line 71 of file ATtiny13A.h.
| #define WDP2_REG WDTCR |
Definition at line 72 of file ATtiny13A.h.
| #define WDP3_REG WDTCR |
Definition at line 75 of file ATtiny13A.h.
| #define WDRF_REG MCUSR |
Definition at line 197 of file ATtiny13A.h.
| #define WDTIE_REG WDTCR |
Definition at line 76 of file ATtiny13A.h.
| #define WDTIF_REG WDTCR |
Definition at line 77 of file ATtiny13A.h.
| #define WGM00_REG TCCR0A |
Definition at line 286 of file ATtiny13A.h.
| #define WGM01_REG TCCR0A |
Definition at line 287 of file ATtiny13A.h.
| #define WGM02_REG TCCR0B |
Definition at line 281 of file ATtiny13A.h.
| #define Z_REG SREG |
Definition at line 91 of file ATtiny13A.h.
1.5.6