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Defines | |
| #define | TIMER0_PRESCALER_DIV_0 0 |
| #define | TIMER0_PRESCALER_DIV_1 1 |
| #define | TIMER0_PRESCALER_DIV_8 2 |
| #define | TIMER0_PRESCALER_DIV_64 3 |
| #define | TIMER0_PRESCALER_DIV_256 4 |
| #define | TIMER0_PRESCALER_DIV_1024 5 |
| #define | TIMER0_PRESCALER_DIV_FALL 6 |
| #define | TIMER0_PRESCALER_DIV_RISE 7 |
| #define | TIMER0_PRESCALER_REG_0 0 |
| #define | TIMER0_PRESCALER_REG_1 1 |
| #define | TIMER0_PRESCALER_REG_2 8 |
| #define | TIMER0_PRESCALER_REG_3 64 |
| #define | TIMER0_PRESCALER_REG_4 256 |
| #define | TIMER0_PRESCALER_REG_5 1024 |
| #define | TIMER0_PRESCALER_REG_6 -1 |
| #define | TIMER0_PRESCALER_REG_7 -2 |
| #define | TIMER1_PRESCALER_DIV_0 0 |
| #define | TIMER1_PRESCALER_DIV_1 1 |
| #define | TIMER1_PRESCALER_DIV_8 2 |
| #define | TIMER1_PRESCALER_DIV_64 3 |
| #define | TIMER1_PRESCALER_DIV_256 4 |
| #define | TIMER1_PRESCALER_DIV_1024 5 |
| #define | TIMER1_PRESCALER_DIV_FALL 6 |
| #define | TIMER1_PRESCALER_DIV_RISE 7 |
| #define | TIMER1_PRESCALER_REG_0 0 |
| #define | TIMER1_PRESCALER_REG_1 1 |
| #define | TIMER1_PRESCALER_REG_2 8 |
| #define | TIMER1_PRESCALER_REG_3 64 |
| #define | TIMER1_PRESCALER_REG_4 256 |
| #define | TIMER1_PRESCALER_REG_5 1024 |
| #define | TIMER1_PRESCALER_REG_6 -1 |
| #define | TIMER1_PRESCALER_REG_7 -2 |
| #define | TIMER0_AVAILABLE |
| #define | TIMER0B_AVAILABLE |
| #define | TIMER1_AVAILABLE |
| #define | TIMER1A_AVAILABLE |
| #define | TIMER1B_AVAILABLE |
| #define | SIG_OVERFLOW0_NUM 0 |
| #define | SIG_OVERFLOW1_NUM 1 |
| #define | SIG_OVERFLOW_TOTAL_NUM 2 |
| #define | SIG_OUTPUT_COMPARE0_NUM 0 |
| #define | SIG_OUTPUT_COMPARE0B_NUM 1 |
| #define | SIG_OUTPUT_COMPARE1A_NUM 2 |
| #define | SIG_OUTPUT_COMPARE1B_NUM 3 |
| #define | SIG_OUTPUT_COMPARE_TOTAL_NUM 4 |
| #define | PWM0_NUM 0 |
| #define | PWM0B_NUM 1 |
| #define | PWM1A_NUM 2 |
| #define | PWM1B_NUM 3 |
| #define | PWM_TOTAL_NUM 4 |
| #define | SIG_INPUT_CAPTURE1_NUM 0 |
| #define | SIG_INPUT_CAPTURE_TOTAL_NUM 1 |
| #define | EUDR0_REG EUDR |
| #define | EUDR1_REG EUDR |
| #define | EUDR2_REG EUDR |
| #define | EUDR3_REG EUDR |
| #define | EUDR4_REG EUDR |
| #define | EUDR5_REG EUDR |
| #define | EUDR6_REG EUDR |
| #define | EUDR7_REG EUDR |
| #define | MUX0_REG ADMUX |
| #define | MUX1_REG ADMUX |
| #define | MUX2_REG ADMUX |
| #define | MUX3_REG ADMUX |
| #define | ADLAR_REG ADMUX |
| #define | REFS0_REG ADMUX |
| #define | REFS1_REG ADMUX |
| #define | C_REG SREG |
| #define | Z_REG SREG |
| #define | N_REG SREG |
| #define | V_REG SREG |
| #define | S_REG SREG |
| #define | H_REG SREG |
| #define | T_REG SREG |
| #define | I_REG SREG |
| #define | OCR2SB_8_REG OCR2SBH |
| #define | OCR2SB_9_REG OCR2SBH |
| #define | OCR2SB_10_REG OCR2SBH |
| #define | OCR2SB_11_REG OCR2SBH |
| #define | OCR2SB_0_REG OCR2SBL |
| #define | OCR2SB_1_REG OCR2SBL |
| #define | OCR2SB_2_REG OCR2SBL |
| #define | OCR2SB_3_REG OCR2SBL |
| #define | OCR2SB_4_REG OCR2SBL |
| #define | OCR2SB_5_REG OCR2SBL |
| #define | OCR2SB_6_REG OCR2SBL |
| #define | OCR2SB_7_REG OCR2SBL |
| #define | WDP0_REG WDTCSR |
| #define | WDP1_REG WDTCSR |
| #define | WDP2_REG WDTCSR |
| #define | WDE_REG WDTCSR |
| #define | WDCE_REG WDTCSR |
| #define | WDP3_REG WDTCSR |
| #define | WDIE_REG WDTCSR |
| #define | WDIF_REG WDTCSR |
| #define | EEDR0_REG EEDR |
| #define | EEDR1_REG EEDR |
| #define | EEDR2_REG EEDR |
| #define | EEDR3_REG EEDR |
| #define | EEDR4_REG EEDR |
| #define | EEDR5_REG EEDR |
| #define | EEDR6_REG EEDR |
| #define | EEDR7_REG EEDR |
| #define | SPDR0_REG SPDR |
| #define | SPDR1_REG SPDR |
| #define | SPDR2_REG SPDR |
| #define | SPDR3_REG SPDR |
| #define | SPDR4_REG SPDR |
| #define | SPDR5_REG SPDR |
| #define | SPDR6_REG SPDR |
| #define | SPDR7_REG SPDR |
| #define | SPI2X_REG SPSR |
| #define | WCOL_REG SPSR |
| #define | SPIF_REG SPSR |
| #define | ICR1H0_REG ICR1H |
| #define | ICR1H1_REG ICR1H |
| #define | ICR1H2_REG ICR1H |
| #define | ICR1H3_REG ICR1H |
| #define | ICR1H4_REG ICR1H |
| #define | ICR1H5_REG ICR1H |
| #define | ICR1H6_REG ICR1H |
| #define | ICR1H7_REG ICR1H |
| #define | MPCM_REG UCSRA |
| #define | U2X_REG UCSRA |
| #define | UPE_REG UCSRA |
| #define | DOR_REG UCSRA |
| #define | FE_REG UCSRA |
| #define | UDRE_REG UCSRA |
| #define | TXC_REG UCSRA |
| #define | RXC_REG UCSRA |
| #define | TXB8_REG UCSRB |
| #define | RXB8_REG UCSRB |
| #define | UCSZ2_REG UCSRB |
| #define | TXEN_REG UCSRB |
| #define | RXEN_REG UCSRB |
| #define | UDRIE_REG UCSRB |
| #define | TXCIE_REG UCSRB |
| #define | RXCIE_REG UCSRB |
| #define | UCPOL_REG UCSRC |
| #define | UCSZ0_REG UCSRC |
| #define | UCSZ1_REG UCSRC |
| #define | USBS_REG UCSRC |
| #define | UPM0_REG UCSRC |
| #define | UPM1_REG UCSRC |
| #define | UMSEL0_REG UCSRC |
| #define | ICR1L0_REG ICR1L |
| #define | ICR1L1_REG ICR1L |
| #define | ICR1L2_REG ICR1L |
| #define | ICR1L3_REG ICR1L |
| #define | ICR1L4_REG ICR1L |
| #define | ICR1L5_REG ICR1L |
| #define | ICR1L6_REG ICR1L |
| #define | ICR1L7_REG ICR1L |
| #define | AC1M0_REG AC1CON |
| #define | AC1M1_REG AC1CON |
| #define | AC1M2_REG AC1CON |
| #define | AC1ICE_REG AC1CON |
| #define | AC1IS0_REG AC1CON |
| #define | AC1IS1_REG AC1CON |
| #define | AC1IE_REG AC1CON |
| #define | AC1EN_REG AC1CON |
| #define | PRADC_REG PRR |
| #define | PRUSART0_REG PRR |
| #define | PRSPI_REG PRR |
| #define | PRTIM0_REG PRR |
| #define | PRTIM1_REG PRR |
| #define | PRPSC0_REG PRR |
| #define | PRPSC1_REG PRR |
| #define | PRPSC2_REG PRR |
| #define | PCLKSEL0_REG PCNF0 |
| #define | POP0_REG PCNF0 |
| #define | PMODE00_REG PCNF0 |
| #define | PMODE01_REG PCNF0 |
| #define | PLOCK0_REG PCNF0 |
| #define | PALOCK0_REG PCNF0 |
| #define | PFIFTY0_REG PCNF0 |
| #define | PCLKSEL1_REG PCNF1 |
| #define | POP1_REG PCNF1 |
| #define | PMODE10_REG PCNF1 |
| #define | PMODE11_REG PCNF1 |
| #define | PLOCK1_REG PCNF1 |
| #define | PALOCK1_REG PCNF1 |
| #define | PFIFTY1_REG PCNF1 |
| #define | POME2_REG PCNF2 |
| #define | PCLKSEL2_REG PCNF2 |
| #define | POP2_REG PCNF2 |
| #define | PMODE20_REG PCNF2 |
| #define | PMODE21_REG PCNF2 |
| #define | PLOCK2_REG PCNF2 |
| #define | PALOCK2_REG PCNF2 |
| #define | PFIFTY2_REG PCNF2 |
| #define | TCNT1L0_REG TCNT1L |
| #define | TCNT1L1_REG TCNT1L |
| #define | TCNT1L2_REG TCNT1L |
| #define | TCNT1L3_REG TCNT1L |
| #define | TCNT1L4_REG TCNT1L |
| #define | TCNT1L5_REG TCNT1L |
| #define | TCNT1L6_REG TCNT1L |
| #define | TCNT1L7_REG TCNT1L |
| #define | PORTD0_REG PORTD |
| #define | PORTD1_REG PORTD |
| #define | PORTD2_REG PORTD |
| #define | PORTD3_REG PORTD |
| #define | PORTD4_REG PORTD |
| #define | PORTD5_REG PORTD |
| #define | PORTD6_REG PORTD |
| #define | PORTD7_REG PORTD |
| #define | PORTE0_REG PORTE |
| #define | PORTE1_REG PORTE |
| #define | PORTE2_REG PORTE |
| #define | TCNT1H0_REG TCNT1H |
| #define | TCNT1H1_REG TCNT1H |
| #define | TCNT1H2_REG TCNT1H |
| #define | TCNT1H3_REG TCNT1H |
| #define | TCNT1H4_REG TCNT1H |
| #define | TCNT1H5_REG TCNT1H |
| #define | TCNT1H6_REG TCNT1H |
| #define | TCNT1H7_REG TCNT1H |
| #define | PORTC0_REG PORTC |
| #define | PORTC1_REG PORTC |
| #define | PORTC2_REG PORTC |
| #define | PORTC3_REG PORTC |
| #define | PORTC4_REG PORTC |
| #define | PORTC5_REG PORTC |
| #define | PORTC6_REG PORTC |
| #define | PORTC7_REG PORTC |
| #define | AMP1TS0_REG AMP1CSR |
| #define | AMP1TS1_REG AMP1CSR |
| #define | AMP1G0_REG AMP1CSR |
| #define | AMP1G1_REG AMP1CSR |
| #define | AMP1IS_REG AMP1CSR |
| #define | AMP1EN_REG AMP1CSR |
| #define | AC2M0_REG AC2CON |
| #define | AC2M1_REG AC2CON |
| #define | AC2M2_REG AC2CON |
| #define | AC2IS0_REG AC2CON |
| #define | AC2IS1_REG AC2CON |
| #define | AC2IE_REG AC2CON |
| #define | AC2EN_REG AC2CON |
| #define | INT0_REG EIMSK |
| #define | INT1_REG EIMSK |
| #define | INT2_REG EIMSK |
| #define | INT3_REG EIMSK |
| #define | PRFM0A0_REG PFRC0A |
| #define | PRFM0A1_REG PFRC0A |
| #define | PRFM0A2_REG PFRC0A |
| #define | PRFM0A3_REG PFRC0A |
| #define | PFLTE0A_REG PFRC0A |
| #define | PELEV0A_REG PFRC0A |
| #define | PISEL0A_REG PFRC0A |
| #define | PCAE0A_REG PFRC0A |
| #define | PRFM0B0_REG PFRC0B |
| #define | PRFM0B1_REG PFRC0B |
| #define | PRFM0B2_REG PFRC0B |
| #define | PRFM0B3_REG PFRC0B |
| #define | PFLTE0B_REG PFRC0B |
| #define | PELEV0B_REG PFRC0B |
| #define | PISEL0B_REG PFRC0B |
| #define | PCAE0B_REG PFRC0B |
| #define | PICR1_8_REG PICR1H |
| #define | PICR1_9_REG PICR1H |
| #define | PICR1_10_REG PICR1H |
| #define | PICR1_11_REG PICR1H |
| #define | PICR1_0_REG PICR1L |
| #define | PICR1_1_REG PICR1L |
| #define | PICR1_2_REG PICR1L |
| #define | PICR1_3_REG PICR1L |
| #define | PICR1_4_REG PICR1L |
| #define | PICR1_5_REG PICR1L |
| #define | PICR1_6_REG PICR1L |
| #define | PICR1_7_REG PICR1L |
| #define | ISC00_REG EICRA |
| #define | ISC01_REG EICRA |
| #define | ISC10_REG EICRA |
| #define | ISC11_REG EICRA |
| #define | ISC20_REG EICRA |
| #define | ISC21_REG EICRA |
| #define | ISC30_REG EICRA |
| #define | ISC31_REG EICRA |
| #define | ADC0D_REG DIDR0 |
| #define | ADC1D_REG DIDR0 |
| #define | ADC2D_REG DIDR0 |
| #define | ADC3D_REG DIDR0 |
| #define | ADC4D_REG DIDR0 |
| #define | ADC5D_REG DIDR0 |
| #define | ADC6D_REG DIDR0 |
| #define | ADC7D_REG DIDR0 |
| #define | ADC8D_REG DIDR1 |
| #define | ADC9D_REG DIDR1 |
| #define | ADC10D_REG DIDR1 |
| #define | AMP0ND_REG DIDR1 |
| #define | AMP0PD_REG DIDR1 |
| #define | ACMP0D_REG DIDR1 |
| #define | OCR1RA_8_REG OCR1RAH |
| #define | OCR1RA_9_REG OCR1RAH |
| #define | OCR1RA_10_REG OCR1RAH |
| #define | OCR1RA_11_REG OCR1RAH |
| #define | OCR1RA_0_REG OCR1RAL |
| #define | OCR1RA_1_REG OCR1RAL |
| #define | OCR1RA_2_REG OCR1RAL |
| #define | OCR1RA_3_REG OCR1RAL |
| #define | OCR1RA_4_REG OCR1RAL |
| #define | OCR1RA_5_REG OCR1RAL |
| #define | OCR1RA_6_REG OCR1RAL |
| #define | OCR1RA_7_REG OCR1RAL |
| #define | CLKPS0_REG CLKPR |
| #define | CLKPS1_REG CLKPR |
| #define | CLKPS2_REG CLKPR |
| #define | CLKPS3_REG CLKPR |
| #define | CLKPCE_REG CLKPR |
| #define | OCR0RB_8_REG OCR0RBH |
| #define | OCR0RB_9_REG OCR0RBH |
| #define | OCR0RB_00_REG OCR0RBH |
| #define | OCR0RB_01_REG OCR0RBH |
| #define | OCR0RB_02_REG OCR0RBH |
| #define | OCR0RB_03_REG OCR0RBH |
| #define | OCR0RB_04_REG OCR0RBH |
| #define | OCR0RB_05_REG OCR0RBH |
| #define | OCR0RB_0_REG OCR0RBL |
| #define | OCR0RB_1_REG OCR0RBL |
| #define | OCR0RB_2_REG OCR0RBL |
| #define | OCR0RB_3_REG OCR0RBL |
| #define | OCR0RB_4_REG OCR0RBL |
| #define | OCR0RB_5_REG OCR0RBL |
| #define | OCR0RB_6_REG OCR0RBL |
| #define | OCR0RB_7_REG OCR0RBL |
| #define | DDB0_REG DDRB |
| #define | DDB1_REG DDRB |
| #define | DDB2_REG DDRB |
| #define | DDB3_REG DDRB |
| #define | DDB4_REG DDRB |
| #define | DDB5_REG DDRB |
| #define | DDB6_REG DDRB |
| #define | DDB7_REG DDRB |
| #define | SPMEN_REG SPMCSR |
| #define | PGERS_REG SPMCSR |
| #define | PGWRT_REG SPMCSR |
| #define | BLBSET_REG SPMCSR |
| #define | RWWSRE_REG SPMCSR |
| #define | RWWSB_REG SPMCSR |
| #define | SPMIE_REG SPMCSR |
| #define | WGM10_REG TCCR1A |
| #define | WGM11_REG TCCR1A |
| #define | COM1B0_REG TCCR1A |
| #define | COM1B1_REG TCCR1A |
| #define | COM1A0_REG TCCR1A |
| #define | COM1A1_REG TCCR1A |
| #define | FOC1B_REG TCCR1C |
| #define | FOC1A_REG TCCR1C |
| #define | CS10_REG TCCR1B |
| #define | CS11_REG TCCR1B |
| #define | CS12_REG TCCR1B |
| #define | WGM12_REG TCCR1B |
| #define | WGM13_REG TCCR1B |
| #define | ICES1_REG TCCR1B |
| #define | ICNC1_REG TCCR1B |
| #define | CAL0_REG OSCCAL |
| #define | CAL1_REG OSCCAL |
| #define | CAL2_REG OSCCAL |
| #define | CAL3_REG OSCCAL |
| #define | CAL4_REG OSCCAL |
| #define | CAL5_REG OSCCAL |
| #define | CAL6_REG OSCCAL |
| #define | OCR0RA_0_REG OCR0RAL |
| #define | OCR0RA_1_REG OCR0RAL |
| #define | OCR0RA_2_REG OCR0RAL |
| #define | OCR0RA_3_REG OCR0RAL |
| #define | OCR0RA_4_REG OCR0RAL |
| #define | OCR0RA_5_REG OCR0RAL |
| #define | OCR0RA_6_REG OCR0RAL |
| #define | OCR0RA_7_REG OCR0RAL |
| #define | DDD0_REG DDRD |
| #define | DDD1_REG DDRD |
| #define | DDD2_REG DDRD |
| #define | DDD3_REG DDRD |
| #define | DDD4_REG DDRD |
| #define | DDD5_REG DDRD |
| #define | DDD6_REG DDRD |
| #define | DDD7_REG DDRD |
| #define | GPIOR10_REG GPIOR1 |
| #define | GPIOR11_REG GPIOR1 |
| #define | GPIOR12_REG GPIOR1 |
| #define | GPIOR13_REG GPIOR1 |
| #define | GPIOR14_REG GPIOR1 |
| #define | GPIOR15_REG GPIOR1 |
| #define | GPIOR16_REG GPIOR1 |
| #define | GPIOR17_REG GPIOR1 |
| #define | GPIOR00_REG GPIOR0 |
| #define | GPIOR01_REG GPIOR0 |
| #define | GPIOR02_REG GPIOR0 |
| #define | GPIOR03_REG GPIOR0 |
| #define | GPIOR04_REG GPIOR0 |
| #define | GPIOR05_REG GPIOR0 |
| #define | GPIOR06_REG GPIOR0 |
| #define | GPIOR07_REG GPIOR0 |
| #define | GPIOR30_REG GPIOR3 |
| #define | GPIOR31_REG GPIOR3 |
| #define | GPIOR32_REG GPIOR3 |
| #define | GPIOR33_REG GPIOR3 |
| #define | GPIOR34_REG GPIOR3 |
| #define | GPIOR35_REG GPIOR3 |
| #define | GPIOR36_REG GPIOR3 |
| #define | GPIOR37_REG GPIOR3 |
| #define | GPIOR20_REG GPIOR2 |
| #define | GPIOR21_REG GPIOR2 |
| #define | GPIOR22_REG GPIOR2 |
| #define | GPIOR23_REG GPIOR2 |
| #define | GPIOR24_REG GPIOR2 |
| #define | GPIOR25_REG GPIOR2 |
| #define | GPIOR26_REG GPIOR2 |
| #define | GPIOR27_REG GPIOR2 |
| #define | ADCL0_REG ADCL |
| #define | ADCL1_REG ADCL |
| #define | ADCL2_REG ADCL |
| #define | ADCL3_REG ADCL |
| #define | ADCL4_REG ADCL |
| #define | ADCL5_REG ADCL |
| #define | ADCL6_REG ADCL |
| #define | ADCL7_REG ADCL |
| #define | DDE0_REG DDRE |
| #define | DDE1_REG DDRE |
| #define | DDE2_REG DDRE |
| #define | TCNT0_0_REG TCNT0 |
| #define | TCNT0_1_REG TCNT0 |
| #define | TCNT0_2_REG TCNT0 |
| #define | TCNT0_3_REG TCNT0 |
| #define | TCNT0_4_REG TCNT0 |
| #define | TCNT0_5_REG TCNT0 |
| #define | TCNT0_6_REG TCNT0 |
| #define | TCNT0_7_REG TCNT0 |
| #define | CS00_REG TCCR0B |
| #define | CS01_REG TCCR0B |
| #define | CS02_REG TCCR0B |
| #define | WGM02_REG TCCR0B |
| #define | FOC0B_REG TCCR0B |
| #define | FOC0A_REG TCCR0B |
| #define | WGM00_REG TCCR0A |
| #define | WGM01_REG TCCR0A |
| #define | COM0B0_REG TCCR0A |
| #define | COM0B1_REG TCCR0A |
| #define | COM0A0_REG TCCR0A |
| #define | COM0A1_REG TCCR0A |
| #define | PRFM2B0_REG PFRC2B |
| #define | PRFM2B1_REG PFRC2B |
| #define | PRFM2B2_REG PFRC2B |
| #define | PRFM2B3_REG PFRC2B |
| #define | PFLTE2B_REG PFRC2B |
| #define | PELEV2B_REG PFRC2B |
| #define | PISEL2B_REG PFRC2B |
| #define | PCAE2B_REG PFRC2B |
| #define | PRFM2A0_REG PFRC2A |
| #define | PRFM2A1_REG PFRC2A |
| #define | PRFM2A2_REG PFRC2A |
| #define | PRFM2A3_REG PFRC2A |
| #define | PFLTE2A_REG PFRC2A |
| #define | PELEV2A_REG PFRC2A |
| #define | PISEL2A_REG PFRC2A |
| #define | PCAE2A_REG PFRC2A |
| #define | OCR2SA_0_REG OCR2SAL |
| #define | OCR2SA_1_REG OCR2SAL |
| #define | OCR2SA_2_REG OCR2SAL |
| #define | OCR2SA_3_REG OCR2SAL |
| #define | OCR2SA_4_REG OCR2SAL |
| #define | OCR2SA_5_REG OCR2SAL |
| #define | OCR2SA_6_REG OCR2SAL |
| #define | OCR2SA_7_REG OCR2SAL |
| #define | URxS0_REG EUCSRA |
| #define | URxS1_REG EUCSRA |
| #define | URxS2_REG EUCSRA |
| #define | URxS3_REG EUCSRA |
| #define | UTxS0_REG EUCSRA |
| #define | UTxS1_REG EUCSRA |
| #define | UTxS2_REG EUCSRA |
| #define | UTxS3_REG EUCSRA |
| #define | BODR_REG EUCSRB |
| #define | EMCH_REG EUCSRB |
| #define | EUSBS_REG EUCSRB |
| #define | EUSART_REG EUCSRB |
| #define | STP0_REG EUCSRC |
| #define | STP1_REG EUCSRC |
| #define | F1617_REG EUCSRC |
| #define | FEM_REG EUCSRC |
| #define | PRUN0_REG PCTL0 |
| #define | PCCYC0_REG PCTL0 |
| #define | PARUN0_REG PCTL0 |
| #define | PAOC0A_REG PCTL0 |
| #define | PAOC0B_REG PCTL0 |
| #define | PBFM0_REG PCTL0 |
| #define | PPRE00_REG PCTL0 |
| #define | PPRE01_REG PCTL0 |
| #define | PRUN1_REG PCTL1 |
| #define | PCCYC1_REG PCTL1 |
| #define | PARUN1_REG PCTL1 |
| #define | PAOC1A_REG PCTL1 |
| #define | PAOC1B_REG PCTL1 |
| #define | PBFM1_REG PCTL1 |
| #define | PPRE10_REG PCTL1 |
| #define | PPRE11_REG PCTL1 |
| #define | PRUN2_REG PCTL2 |
| #define | PCCYC2_REG PCTL2 |
| #define | PARUN2_REG PCTL2 |
| #define | PAOC2A_REG PCTL2 |
| #define | PAOC2B_REG PCTL2 |
| #define | PBFM2_REG PCTL2 |
| #define | PPRE20_REG PCTL2 |
| #define | PPRE21_REG PCTL2 |
| #define | SPR0_REG SPCR |
| #define | SPR1_REG SPCR |
| #define | CPHA_REG SPCR |
| #define | CPOL_REG SPCR |
| #define | MSTR_REG SPCR |
| #define | DORD_REG SPCR |
| #define | SPE_REG SPCR |
| #define | SPIE_REG SPCR |
| #define | TOV1_REG TIFR1 |
| #define | OCF1A_REG TIFR1 |
| #define | OCF1B_REG TIFR1 |
| #define | ICF1_REG TIFR1 |
| #define | PSR10_REG GTCCR |
| #define | ICPSEL1_REG GTCCR |
| #define | TSM_REG GTCCR |
| #define | PSRSYNC_REG GTCCR |
| #define | SP8_REG SPH |
| #define | SP9_REG SPH |
| #define | SP10_REG SPH |
| #define | SP11_REG SPH |
| #define | SP12_REG SPH |
| #define | SP13_REG SPH |
| #define | SP14_REG SPH |
| #define | SP15_REG SPH |
| #define | POMV2A0_REG POM2 |
| #define | POMV2A1_REG POM2 |
| #define | POMV2A2_REG POM2 |
| #define | POMV2A3_REG POM2 |
| #define | POMV2B0_REG POM2 |
| #define | POMV2B1_REG POM2 |
| #define | POMV2B2_REG POM2 |
| #define | POMV2B3_REG POM2 |
| #define | OCR2RB_0_REG OCR2RBL |
| #define | OCR2RB_1_REG OCR2RBL |
| #define | OCR2RB_2_REG OCR2RBL |
| #define | OCR2RB_3_REG OCR2RBL |
| #define | OCR2RB_4_REG OCR2RBL |
| #define | OCR2RB_5_REG OCR2RBL |
| #define | OCR2RB_6_REG OCR2RBL |
| #define | OCR2RB_7_REG OCR2RBL |
| #define | PICR2_8_REG PICR2H |
| #define | PICR2_9_REG PICR2H |
| #define | PICR2_10_REG PICR2H |
| #define | PICR2_11_REG PICR2H |
| #define | OCR2RB_8_REG OCR2RBH |
| #define | OCR2RB_9_REG OCR2RBH |
| #define | OCR2RB_10_REG OCR2RBH |
| #define | OCR2RB_11_REG OCR2RBH |
| #define | OCR2RB_12_REG OCR2RBH |
| #define | OCR2RB_13_REG OCR2RBH |
| #define | OCR2RB_14_REG OCR2RBH |
| #define | OCR2RB_15_REG OCR2RBH |
| #define | PICR2_0_REG PICR2L |
| #define | PICR2_1_REG PICR2L |
| #define | PICR2_2_REG PICR2L |
| #define | PICR2_3_REG PICR2L |
| #define | PICR2_4_REG PICR2L |
| #define | PICR2_5_REG PICR2L |
| #define | PICR2_6_REG PICR2L |
| #define | PICR2_7_REG PICR2L |
| #define | OCR1BL0_REG OCR1BL |
| #define | OCR1BL1_REG OCR1BL |
| #define | OCR1BL2_REG OCR1BL |
| #define | OCR1BL3_REG OCR1BL |
| #define | OCR1BL4_REG OCR1BL |
| #define | OCR1BL5_REG OCR1BL |
| #define | OCR1BL6_REG OCR1BL |
| #define | OCR1BL7_REG OCR1BL |
| #define | OCR1BH0_REG OCR1BH |
| #define | OCR1BH1_REG OCR1BH |
| #define | OCR1BH2_REG OCR1BH |
| #define | OCR1BH3_REG OCR1BH |
| #define | OCR1BH4_REG OCR1BH |
| #define | OCR1BH5_REG OCR1BH |
| #define | OCR1BH6_REG OCR1BH |
| #define | OCR1BH7_REG OCR1BH |
| #define | SP0_REG SPL |
| #define | SP1_REG SPL |
| #define | SP2_REG SPL |
| #define | SP3_REG SPL |
| #define | SP4_REG SPL |
| #define | SP5_REG SPL |
| #define | SP6_REG SPL |
| #define | SP7_REG SPL |
| #define | PORF_REG MCUSR |
| #define | EXTRF_REG MCUSR |
| #define | BORF_REG MCUSR |
| #define | WDRF_REG MCUSR |
| #define | EERE_REG EECR |
| #define | EEWE_REG EECR |
| #define | EEMWE_REG EECR |
| #define | EERIE_REG EECR |
| #define | SE_REG SMCR |
| #define | SM0_REG SMCR |
| #define | SM1_REG SMCR |
| #define | SM2_REG SMCR |
| #define | PLOCK_REG PLLCSR |
| #define | PLLE_REG PLLCSR |
| #define | PLLF_REG PLLCSR |
| #define | OCR2RA_8_REG OCR2RAH |
| #define | OCR2RA_9_REG OCR2RAH |
| #define | OCR2RA_10_REG OCR2RAH |
| #define | OCR2RA_11_REG OCR2RAH |
| #define | OCR2RA_0_REG OCR2RAL |
| #define | OCR2RA_1_REG OCR2RAL |
| #define | OCR2RA_2_REG OCR2RAL |
| #define | OCR2RA_3_REG OCR2RAL |
| #define | OCR2RA_4_REG OCR2RAL |
| #define | OCR2RA_5_REG OCR2RAL |
| #define | OCR2RA_6_REG OCR2RAL |
| #define | OCR2RA_7_REG OCR2RAL |
| #define | OCR0SA_0_REG OCR0SAL |
| #define | OCR0SA_1_REG OCR0SAL |
| #define | OCR0SA_2_REG OCR0SAL |
| #define | OCR0SA_3_REG OCR0SAL |
| #define | OCR0SA_4_REG OCR0SAL |
| #define | OCR0SA_5_REG OCR0SAL |
| #define | OCR0SA_6_REG OCR0SAL |
| #define | OCR0SA_7_REG OCR0SAL |
| #define | OCR0SA_8_REG OCR0SAH |
| #define | OCR0SA_9_REG OCR0SAH |
| #define | OCR0SA_00_REG OCR0SAH |
| #define | OCR0SA_01_REG OCR0SAH |
| #define | EEAR8_REG EEARH |
| #define | EEAR9_REG EEARH |
| #define | EEAR10_REG EEARH |
| #define | EEAR11_REG EEARH |
| #define | EEARL0_REG EEARL |
| #define | EEARL1_REG EEARL |
| #define | EEARL2_REG EEARL |
| #define | EEARL3_REG EEARL |
| #define | EEARL4_REG EEARL |
| #define | EEARL5_REG EEARL |
| #define | EEARL6_REG EEARL |
| #define | EEARL7_REG EEARL |
| #define | IVCE_REG MCUCR |
| #define | IVSEL_REG MCUCR |
| #define | PUD_REG MCUCR |
| #define | SPIPS_REG MCUCR |
| #define | PICR0_8_REG PICR0H |
| #define | PICR0_9_REG PICR0H |
| #define | PICR0_10_REG PICR0H |
| #define | PICR0_11_REG PICR0H |
| #define | INTF0_REG EIFR |
| #define | INTF1_REG EIFR |
| #define | INTF2_REG EIFR |
| #define | INTF3_REG EIFR |
| #define | MUBRR0_REG MUBRRL |
| #define | MUBRR1_REG MUBRRL |
| #define | MUBRR2_REG MUBRRL |
| #define | MUBRR3_REG MUBRRL |
| #define | MUBRR4_REG MUBRRL |
| #define | MUBRR5_REG MUBRRL |
| #define | MUBRR6_REG MUBRRL |
| #define | MUBRR7_REG MUBRRL |
| #define | MUBRR8_REG MUBRRH |
| #define | MUBRR9_REG MUBRRH |
| #define | MUBRR10_REG MUBRRH |
| #define | MUBRR11_REG MUBRRH |
| #define | MUBRR12_REG MUBRRH |
| #define | MUBRR13_REG MUBRRH |
| #define | MUBRR14_REG MUBRRH |
| #define | MUBRR15_REG MUBRRH |
| #define | OCR2SA_8_REG OCR2SAH |
| #define | OCR2SA_9_REG OCR2SAH |
| #define | OCR2SA_10_REG OCR2SAH |
| #define | OCR2SA_11_REG OCR2SAH |
| #define | OCR0SB_0_REG OCR0SBL |
| #define | OCR0SB_1_REG OCR0SBL |
| #define | OCR0SB_2_REG OCR0SBL |
| #define | OCR0SB_3_REG OCR0SBL |
| #define | OCR0SB_4_REG OCR0SBL |
| #define | OCR0SB_5_REG OCR0SBL |
| #define | OCR0SB_6_REG OCR0SBL |
| #define | OCR0SB_7_REG OCR0SBL |
| #define | OCR0SB_8_REG OCR0SBH |
| #define | OCR0SB_9_REG OCR0SBH |
| #define | OCR0SB_00_REG OCR0SBH |
| #define | OCR0SB_01_REG OCR0SBH |
| #define | DDC0_REG DDRC |
| #define | DDC1_REG DDRC |
| #define | DDC2_REG DDRC |
| #define | DDC3_REG DDRC |
| #define | DDC4_REG DDRC |
| #define | DDC5_REG DDRC |
| #define | DDC6_REG DDRC |
| #define | DDC7_REG DDRC |
| #define | PRFM1B0_REG PFRC1B |
| #define | PRFM1B1_REG PFRC1B |
| #define | PRFM1B2_REG PFRC1B |
| #define | PRFM1B3_REG PFRC1B |
| #define | PFLTE1B_REG PFRC1B |
| #define | PELEV1B_REG PFRC1B |
| #define | PISEL1B_REG PFRC1B |
| #define | PCAE1B_REG PFRC1B |
| #define | PRFM1A0_REG PFRC1A |
| #define | PRFM1A1_REG PFRC1A |
| #define | PRFM1A2_REG PFRC1A |
| #define | PRFM1A3_REG PFRC1A |
| #define | PFLTE1A_REG PFRC1A |
| #define | PELEV1A_REG PFRC1A |
| #define | PISEL1A_REG PFRC1A |
| #define | PCAE1A_REG PFRC1A |
| #define | PICR0_0_REG PICR0L |
| #define | PICR0_1_REG PICR0L |
| #define | PICR0_2_REG PICR0L |
| #define | PICR0_3_REG PICR0L |
| #define | PICR0_4_REG PICR0L |
| #define | PICR0_5_REG PICR0L |
| #define | PICR0_6_REG PICR0L |
| #define | PICR0_7_REG PICR0L |
| #define | OCR1SA_0_REG OCR1SAL |
| #define | OCR1SA_1_REG OCR1SAL |
| #define | OCR1SA_2_REG OCR1SAL |
| #define | OCR1SA_3_REG OCR1SAL |
| #define | OCR1SA_4_REG OCR1SAL |
| #define | OCR1SA_5_REG OCR1SAL |
| #define | OCR1SA_6_REG OCR1SAL |
| #define | OCR1SA_7_REG OCR1SAL |
| #define | ADPS0_REG ADCSRA |
| #define | ADPS1_REG ADCSRA |
| #define | ADPS2_REG ADCSRA |
| #define | ADIE_REG ADCSRA |
| #define | ADIF_REG ADCSRA |
| #define | ADATE_REG ADCSRA |
| #define | ADSC_REG ADCSRA |
| #define | ADEN_REG ADCSRA |
| #define | POEN0A_REG PSOC0 |
| #define | POEN0B_REG PSOC0 |
| #define | PSYNC00_REG PSOC0 |
| #define | PSYNC01_REG PSOC0 |
| #define | POEN1A_REG PSOC1 |
| #define | POEN1B_REG PSOC1 |
| #define | PSYNC1_0_REG PSOC1 |
| #define | PSYNC1_1_REG PSOC1 |
| #define | AC0O_REG ACSR |
| #define | AC1O_REG ACSR |
| #define | AC2O_REG ACSR |
| #define | AC0IF_REG ACSR |
| #define | AC1IF_REG ACSR |
| #define | AC2IF_REG ACSR |
| #define | ACCKDIV_REG ACSR |
| #define | OCR1RB_0_REG OCR1RBL |
| #define | OCR1RB_1_REG OCR1RBL |
| #define | OCR1RB_2_REG OCR1RBL |
| #define | OCR1RB_3_REG OCR1RBL |
| #define | OCR1RB_4_REG OCR1RBL |
| #define | OCR1RB_5_REG OCR1RBL |
| #define | OCR1RB_6_REG OCR1RBL |
| #define | OCR1RB_7_REG OCR1RBL |
| #define | OCR1SB_8_REG OCR1SBH |
| #define | OCR1SB_9_REG OCR1SBH |
| #define | OCR1SB_10_REG OCR1SBH |
| #define | OCR1SB_11_REG OCR1SBH |
| #define | OCR1RB_8_REG OCR1RBH |
| #define | OCR1RB_9_REG OCR1RBH |
| #define | OCR1RB_10_REG OCR1RBH |
| #define | OCR1RB_11_REG OCR1RBH |
| #define | OCR1RB_12_REG OCR1RBH |
| #define | OCR1RB_13_REG OCR1RBH |
| #define | OCR1RB_14_REG OCR1RBH |
| #define | OCR1RB_15_REG OCR1RBH |
| #define | OCR1SB_0_REG OCR1SBL |
| #define | OCR1SB_1_REG OCR1SBL |
| #define | OCR1SB_2_REG OCR1SBL |
| #define | OCR1SB_3_REG OCR1SBL |
| #define | OCR1SB_4_REG OCR1SBL |
| #define | OCR1SB_5_REG OCR1SBL |
| #define | OCR1SB_6_REG OCR1SBL |
| #define | OCR1SB_7_REG OCR1SBL |
| #define | OCR1SA_8_REG OCR1SAH |
| #define | OCR1SA_9_REG OCR1SAH |
| #define | OCR1SA_10_REG OCR1SAH |
| #define | OCR1SA_11_REG OCR1SAH |
| #define | UBRR8_REG UBRRH |
| #define | UBRR9_REG UBRRH |
| #define | UBRR10_REG UBRRH |
| #define | UBRR11_REG UBRRH |
| #define | DACL0_REG DACL |
| #define | DACL1_REG DACL |
| #define | DACL2_REG DACL |
| #define | DACL3_REG DACL |
| #define | DACL4_REG DACL |
| #define | DACL5_REG DACL |
| #define | DACL6_REG DACL |
| #define | DACL7_REG DACL |
| #define | UBRR0_REG UBRRL |
| #define | UBRR1_REG UBRRL |
| #define | UBRR2_REG UBRRL |
| #define | UBRR3_REG UBRRL |
| #define | UBRR4_REG UBRRL |
| #define | UBRR5_REG UBRRL |
| #define | UBRR6_REG UBRRL |
| #define | UBRR7_REG UBRRL |
| #define | DACH0_REG DACH |
| #define | DACH1_REG DACH |
| #define | DACH2_REG DACH |
| #define | DACH3_REG DACH |
| #define | DACH4_REG DACH |
| #define | DACH5_REG DACH |
| #define | DACH6_REG DACH |
| #define | DACH7_REG DACH |
| #define | OCR0RA_8_REG OCR0RAH |
| #define | OCR0RA_9_REG OCR0RAH |
| #define | OCR0RA_00_REG OCR0RAH |
| #define | OCR0RA_01_REG OCR0RAH |
| #define | PEOPE2_REG PIM2 |
| #define | PEVE2A_REG PIM2 |
| #define | PEVE2B_REG PIM2 |
| #define | PSEIE2_REG PIM2 |
| #define | PEOPE0_REG PIM0 |
| #define | PEVE0A_REG PIM0 |
| #define | PEVE0B_REG PIM0 |
| #define | PSEIE0_REG PIM0 |
| #define | PEOPE1_REG PIM1 |
| #define | PEVE1A_REG PIM1 |
| #define | PEVE1B_REG PIM1 |
| #define | PSEIE1_REG PIM1 |
| #define | PEOP2_REG PIFR2 |
| #define | PRN20_REG PIFR2 |
| #define | PRN21_REG PIFR2 |
| #define | PEV2A_REG PIFR2 |
| #define | PEV2B_REG PIFR2 |
| #define | PSEI2_REG PIFR2 |
| #define | PORTB0_REG PORTB |
| #define | PORTB1_REG PORTB |
| #define | PORTB2_REG PORTB |
| #define | PORTB3_REG PORTB |
| #define | PORTB4_REG PORTB |
| #define | PORTB5_REG PORTB |
| #define | PORTB6_REG PORTB |
| #define | PORTB7_REG PORTB |
| #define | PEOP0_REG PIFR0 |
| #define | PRN00_REG PIFR0 |
| #define | PRN01_REG PIFR0 |
| #define | PEV0A_REG PIFR0 |
| #define | PEV0B_REG PIFR0 |
| #define | PSEI0_REG PIFR0 |
| #define | PEOP1_REG PIFR1 |
| #define | PRN10_REG PIFR1 |
| #define | PRN11_REG PIFR1 |
| #define | PEV1A_REG PIFR1 |
| #define | PEV1B_REG PIFR1 |
| #define | PSEI1_REG PIFR1 |
| #define | ADCH0_REG ADCH |
| #define | ADCH1_REG ADCH |
| #define | ADCH2_REG ADCH |
| #define | ADCH3_REG ADCH |
| #define | ADCH4_REG ADCH |
| #define | ADCH5_REG ADCH |
| #define | ADCH6_REG ADCH |
| #define | ADCH7_REG ADCH |
| #define | POEN2A_REG PSOC2 |
| #define | POEN2C_REG PSOC2 |
| #define | POEN2B_REG PSOC2 |
| #define | POEN2D_REG PSOC2 |
| #define | PSYNC2_0_REG PSOC2 |
| #define | PSYNC2_1_REG PSOC2 |
| #define | POS22_REG PSOC2 |
| #define | POS23_REG PSOC2 |
| #define | TOIE0_REG TIMSK0 |
| #define | OCIE0A_REG TIMSK0 |
| #define | OCIE0B_REG TIMSK0 |
| #define | TOIE1_REG TIMSK1 |
| #define | OCIE1A_REG TIMSK1 |
| #define | OCIE1B_REG TIMSK1 |
| #define | ICIE1_REG TIMSK1 |
| #define | AMP0TS0_REG AMP0CSR |
| #define | AMP0TS1_REG AMP0CSR |
| #define | AMP0G0_REG AMP0CSR |
| #define | AMP0G1_REG AMP0CSR |
| #define | AMP0IS_REG AMP0CSR |
| #define | AMP0EN_REG AMP0CSR |
| #define | UDR0_REG UDR |
| #define | UDR1_REG UDR |
| #define | UDR2_REG UDR |
| #define | UDR3_REG UDR |
| #define | UDR4_REG UDR |
| #define | UDR5_REG UDR |
| #define | UDR6_REG UDR |
| #define | UDR7_REG UDR |
| #define | DAEN_REG DACON |
| #define | DALA_REG DACON |
| #define | DATS0_REG DACON |
| #define | DATS1_REG DACON |
| #define | DATS2_REG DACON |
| #define | DAATE_REG DACON |
| #define | PINC0_REG PINC |
| #define | PINC1_REG PINC |
| #define | PINC2_REG PINC |
| #define | PINC3_REG PINC |
| #define | PINC4_REG PINC |
| #define | PINC5_REG PINC |
| #define | PINC6_REG PINC |
| #define | PINC7_REG PINC |
| #define | PINB0_REG PINB |
| #define | PINB1_REG PINB |
| #define | PINB2_REG PINB |
| #define | PINB3_REG PINB |
| #define | PINB4_REG PINB |
| #define | PINB5_REG PINB |
| #define | PINB6_REG PINB |
| #define | PINB7_REG PINB |
| #define | AC0M0_REG AC0CON |
| #define | AC0M1_REG AC0CON |
| #define | AC0M2_REG AC0CON |
| #define | AC0IS0_REG AC0CON |
| #define | AC0IS1_REG AC0CON |
| #define | AC0IE_REG AC0CON |
| #define | AC0EN_REG AC0CON |
| #define | ADTS0_REG ADCSRB |
| #define | ADTS1_REG ADCSRB |
| #define | ADTS2_REG ADCSRB |
| #define | ADTS3_REG ADCSRB |
| #define | ADASCR_REG ADCSRB |
| #define | ADHSM_REG ADCSRB |
| #define | PINE0_REG PINE |
| #define | PINE1_REG PINE |
| #define | PINE2_REG PINE |
| #define | PIND0_REG PIND |
| #define | PIND1_REG PIND |
| #define | PIND2_REG PIND |
| #define | PIND3_REG PIND |
| #define | PIND4_REG PIND |
| #define | PIND5_REG PIND |
| #define | PIND6_REG PIND |
| #define | PIND7_REG PIND |
| #define | OCR1AH0_REG OCR1AH |
| #define | OCR1AH1_REG OCR1AH |
| #define | OCR1AH2_REG OCR1AH |
| #define | OCR1AH3_REG OCR1AH |
| #define | OCR1AH4_REG OCR1AH |
| #define | OCR1AH5_REG OCR1AH |
| #define | OCR1AH6_REG OCR1AH |
| #define | OCR1AH7_REG OCR1AH |
| #define | OCR1AL0_REG OCR1AL |
| #define | OCR1AL1_REG OCR1AL |
| #define | OCR1AL2_REG OCR1AL |
| #define | OCR1AL3_REG OCR1AL |
| #define | OCR1AL4_REG OCR1AL |
| #define | OCR1AL5_REG OCR1AL |
| #define | OCR1AL6_REG OCR1AL |
| #define | OCR1AL7_REG OCR1AL |
| #define | TOV0_REG TIFR0 |
| #define | OCF0A_REG TIFR0 |
| #define | OCF0B_REG TIFR0 |
| #define | MISO_PORT PORTB |
| #define | MISO_BIT 0 |
| #define | PSCOUT20_PORT PORTB |
| #define | PSCOUT20_BIT 0 |
| #define | MOSI_PORT PORTB |
| #define | MOSI_BIT 1 |
| #define | PSCOUT21_PORT PORTB |
| #define | PSCOUT21_BIT 1 |
| #define | ADC5_PORT PORTB |
| #define | ADC5_BIT 2 |
| #define | INT1_PORT PORTB |
| #define | INT1_BIT 2 |
| #define | AMP0 -_PORT PORTB |
| #define | AMP0 -_BIT 3 |
| #define | AMP0 +_PORT PORTB |
| #define | AMP0 +_BIT 4 |
| #define | ADC6_PORT PORTB |
| #define | ADC6_BIT 5 |
| #define | INT2_PORT PORTB |
| #define | INT2_BIT 5 |
| #define | ADC7_PORT PORTB |
| #define | ADC7_BIT 6 |
| #define | PSCOUT11_PORT PORTB |
| #define | PSCOUT11_BIT 6 |
| #define | ICP1B_PORT PORTB |
| #define | ICP1B_BIT 6 |
| #define | ADC4_PORT PORTB |
| #define | ADC4_BIT 7 |
| #define | PSCOUT01_PORT PORTB |
| #define | PSCOUT01_BIT 7 |
| #define | SCK_PORT PORTB |
| #define | SCK_BIT 7 |
| #define | INT3_PORT PORTC |
| #define | INT3_BIT 0 |
| #define | PSCOUT10_PORT PORTC |
| #define | PSCOUT10_BIT 0 |
| #define | PSCIN1_PORT PORTC |
| #define | PSCIN1_BIT 1 |
| #define | OC1B_PORT PORTC |
| #define | OC1B_BIT 1 |
| #define | T0_PORT PORTC |
| #define | T0_BIT 2 |
| #define | PSCOUT22_PORT PORTC |
| #define | PSCOUT22_BIT 2 |
| #define | T1_PORT PORTC |
| #define | T1_BIT 3 |
| #define | PSCOUT23_PORT PORTC |
| #define | PSCOUT23_BIT 3 |
| #define | ADC8_PORT PORTC |
| #define | ADC8_BIT 4 |
| #define | AMP1 -_PORT PORTC |
| #define | AMP1 -_BIT 4 |
| #define | ADC9_PORT PORTC |
| #define | ADC9_BIT 5 |
| #define | AMP1 +_PORT PORTC |
| #define | AMP1 +_BIT 5 |
| #define | ADC10_PORT PORTC |
| #define | ADC10_BIT 6 |
| #define | ACMP1_PORT PORTC |
| #define | ACMP1_BIT 6 |
| #define | D2A_PORT PORTC |
| #define | D2A_BIT 7 |
| #define | PSCOUT00_PORT PORTD |
| #define | PSCOUT00_BIT 0 |
| #define | XCK_PORT PORTD |
| #define | XCK_BIT 0 |
| #define | SSA_PORT PORTD |
| #define | SSA_BIT 0 |
| #define | PSCIN0_PORT PORTD |
| #define | PSCIN0_BIT 1 |
| #define | CLK0_PORT PORTD |
| #define | CLK0_BIT 1 |
| #define | PSCIN2_PORT PORTD |
| #define | PSCIN2_BIT 2 |
| #define | OC1A_PORT PORTD |
| #define | OC1A_BIT 2 |
| #define | MISO_A_PORT PORTD |
| #define | MISO_A_BIT 2 |
| #define | TXD_PORT PORTD |
| #define | TXD_BIT 3 |
| #define | DALI_PORT PORTD |
| #define | DALI_BIT 3 |
| #define | OC0A_PORT PORTD |
| #define | OC0A_BIT 3 |
| #define | SS_PORT PORTD |
| #define | SS_BIT 3 |
| #define | MOSI_A_PORT PORTD |
| #define | MOSI_A_BIT 3 |
| #define | ADC1_PORT PORTD |
| #define | ADC1_BIT 4 |
| #define | RXD_PORT PORTD |
| #define | RXD_BIT 4 |
| #define | DALI_PORT PORTD |
| #define | DALI_BIT 4 |
| #define | ICP1_PORT PORTD |
| #define | ICP1_BIT 4 |
| #define | SCK_A_PORT PORTD |
| #define | SCK_A_BIT 4 |
| #define | ADC2_PORT PORTD |
| #define | ADC2_BIT 5 |
| #define | ACOMP2_PORT PORTD |
| #define | ACOMP2_BIT 5 |
| #define | ADC3_PORT PORTD |
| #define | ADC3_BIT 6 |
| #define | ACMPM_PORT PORTD |
| #define | ACMPM_BIT 6 |
| #define | INT0_PORT PORTD |
| #define | INT0_BIT 6 |
| #define | ACMP0_PORT PORTD |
| #define | ACMP0_BIT 7 |
| #define | RESET_PORT PORTE |
| #define | RESET_BIT 0 |
| #define | OCD_PORT PORTE |
| #define | OCD_BIT 0 |
| #define | OC0B_PORT PORTE |
| #define | OC0B_BIT 1 |
| #define | XTAL1_PORT PORTE |
| #define | XTAL1_BIT 1 |
| #define | ADC0_PORT PORTE |
| #define | ADC0_BIT 2 |
| #define | XTAL2_PORT PORTE |
| #define | XTAL2_BIT 2 |
| #define AC0EN_REG AC0CON |
Definition at line 1241 of file AT90PWM3.h.
| #define AC0IE_REG AC0CON |
Definition at line 1240 of file AT90PWM3.h.
| #define AC0IF_REG ACSR |
Definition at line 1016 of file AT90PWM3.h.
| #define AC0IS0_REG AC0CON |
Definition at line 1238 of file AT90PWM3.h.
| #define AC0IS1_REG AC0CON |
Definition at line 1239 of file AT90PWM3.h.
| #define AC0M0_REG AC0CON |
Definition at line 1235 of file AT90PWM3.h.
| #define AC0M1_REG AC0CON |
Definition at line 1236 of file AT90PWM3.h.
| #define AC0M2_REG AC0CON |
Definition at line 1237 of file AT90PWM3.h.
| #define AC0O_REG ACSR |
Definition at line 1013 of file AT90PWM3.h.
| #define AC1EN_REG AC1CON |
Definition at line 244 of file AT90PWM3.h.
| #define AC1ICE_REG AC1CON |
Definition at line 240 of file AT90PWM3.h.
| #define AC1IE_REG AC1CON |
Definition at line 243 of file AT90PWM3.h.
| #define AC1IF_REG ACSR |
Definition at line 1017 of file AT90PWM3.h.
| #define AC1IS0_REG AC1CON |
Definition at line 241 of file AT90PWM3.h.
| #define AC1IS1_REG AC1CON |
Definition at line 242 of file AT90PWM3.h.
| #define AC1M0_REG AC1CON |
Definition at line 237 of file AT90PWM3.h.
| #define AC1M1_REG AC1CON |
Definition at line 238 of file AT90PWM3.h.
| #define AC1M2_REG AC1CON |
Definition at line 239 of file AT90PWM3.h.
| #define AC1O_REG ACSR |
Definition at line 1014 of file AT90PWM3.h.
| #define AC2EN_REG AC2CON |
Definition at line 344 of file AT90PWM3.h.
| #define AC2IE_REG AC2CON |
Definition at line 343 of file AT90PWM3.h.
| #define AC2IF_REG ACSR |
Definition at line 1018 of file AT90PWM3.h.
| #define AC2IS0_REG AC2CON |
Definition at line 341 of file AT90PWM3.h.
| #define AC2IS1_REG AC2CON |
Definition at line 342 of file AT90PWM3.h.
| #define AC2M0_REG AC2CON |
Definition at line 338 of file AT90PWM3.h.
| #define AC2M1_REG AC2CON |
Definition at line 339 of file AT90PWM3.h.
| #define AC2M2_REG AC2CON |
Definition at line 340 of file AT90PWM3.h.
| #define AC2O_REG ACSR |
Definition at line 1015 of file AT90PWM3.h.
| #define ACCKDIV_REG ACSR |
Definition at line 1019 of file AT90PWM3.h.
| #define ACMP0_BIT 7 |
Definition at line 1424 of file AT90PWM3.h.
| #define ACMP0_PORT PORTD |
Definition at line 1423 of file AT90PWM3.h.
| #define ACMP0D_REG DIDR1 |
Definition at line 414 of file AT90PWM3.h.
| #define ACMP1_BIT 6 |
Definition at line 1365 of file AT90PWM3.h.
| #define ACMP1_PORT PORTC |
Definition at line 1364 of file AT90PWM3.h.
| #define ACMPM_BIT 6 |
Definition at line 1419 of file AT90PWM3.h.
| #define ACMPM_PORT PORTD |
Definition at line 1418 of file AT90PWM3.h.
| #define ACOMP2_BIT 5 |
Definition at line 1414 of file AT90PWM3.h.
| #define ACOMP2_PORT PORTD |
Definition at line 1413 of file AT90PWM3.h.
| #define ADASCR_REG ADCSRB |
Definition at line 1248 of file AT90PWM3.h.
| #define ADATE_REG ADCSRA |
Definition at line 986 of file AT90PWM3.h.
| #define ADC0_BIT 2 |
Definition at line 1437 of file AT90PWM3.h.
| #define ADC0_PORT PORTE |
Definition at line 1436 of file AT90PWM3.h.
| #define ADC0D_REG DIDR0 |
Definition at line 399 of file AT90PWM3.h.
| #define ADC10_BIT 6 |
Definition at line 1363 of file AT90PWM3.h.
| #define ADC10_PORT PORTC |
Definition at line 1362 of file AT90PWM3.h.
| #define ADC10D_REG DIDR1 |
Definition at line 411 of file AT90PWM3.h.
| #define ADC1_BIT 4 |
Definition at line 1401 of file AT90PWM3.h.
| #define ADC1_PORT PORTD |
Definition at line 1400 of file AT90PWM3.h.
| #define ADC1D_REG DIDR0 |
Definition at line 400 of file AT90PWM3.h.
| #define ADC2_BIT 5 |
Definition at line 1412 of file AT90PWM3.h.
| #define ADC2_PORT PORTD |
Definition at line 1411 of file AT90PWM3.h.
| #define ADC2D_REG DIDR0 |
Definition at line 401 of file AT90PWM3.h.
| #define ADC3_BIT 6 |
Definition at line 1417 of file AT90PWM3.h.
| #define ADC3_PORT PORTD |
Definition at line 1416 of file AT90PWM3.h.
| #define ADC3D_REG DIDR0 |
Definition at line 402 of file AT90PWM3.h.
| #define ADC4_BIT 7 |
Definition at line 1326 of file AT90PWM3.h.
| #define ADC4_PORT PORTB |
Definition at line 1325 of file AT90PWM3.h.
| #define ADC4D_REG DIDR0 |
Definition at line 403 of file AT90PWM3.h.
| #define ADC5_BIT 2 |
Definition at line 1303 of file AT90PWM3.h.
| #define ADC5_PORT PORTB |
Definition at line 1302 of file AT90PWM3.h.
| #define ADC5D_REG DIDR0 |
Definition at line 404 of file AT90PWM3.h.
| #define ADC6_BIT 5 |
Definition at line 1314 of file AT90PWM3.h.
| #define ADC6_PORT PORTB |
Definition at line 1313 of file AT90PWM3.h.
| #define ADC6D_REG DIDR0 |
Definition at line 405 of file AT90PWM3.h.
| #define ADC7_BIT 6 |
Definition at line 1319 of file AT90PWM3.h.
| #define ADC7_PORT PORTB |
Definition at line 1318 of file AT90PWM3.h.
| #define ADC7D_REG DIDR0 |
Definition at line 406 of file AT90PWM3.h.
| #define ADC8_BIT 4 |
Definition at line 1353 of file AT90PWM3.h.
| #define ADC8_PORT PORTC |
Definition at line 1352 of file AT90PWM3.h.
| #define ADC8D_REG DIDR1 |
Definition at line 409 of file AT90PWM3.h.
| #define ADC9_BIT 5 |
Definition at line 1358 of file AT90PWM3.h.
| #define ADC9_PORT PORTC |
Definition at line 1357 of file AT90PWM3.h.
| #define ADC9D_REG DIDR1 |
Definition at line 410 of file AT90PWM3.h.
| #define ADCH0_REG ADCH |
Definition at line 1158 of file AT90PWM3.h.
| #define ADCH1_REG ADCH |
Definition at line 1159 of file AT90PWM3.h.
| #define ADCH2_REG ADCH |
Definition at line 1160 of file AT90PWM3.h.
| #define ADCH3_REG ADCH |
Definition at line 1161 of file AT90PWM3.h.
| #define ADCH4_REG ADCH |
Definition at line 1162 of file AT90PWM3.h.
| #define ADCH5_REG ADCH |
Definition at line 1163 of file AT90PWM3.h.
| #define ADCH6_REG ADCH |
Definition at line 1164 of file AT90PWM3.h.
| #define ADCH7_REG ADCH |
Definition at line 1165 of file AT90PWM3.h.
| #define ADCL0_REG ADCL |
Definition at line 569 of file AT90PWM3.h.
| #define ADCL1_REG ADCL |
Definition at line 570 of file AT90PWM3.h.
| #define ADCL2_REG ADCL |
Definition at line 571 of file AT90PWM3.h.
| #define ADCL3_REG ADCL |
Definition at line 572 of file AT90PWM3.h.
| #define ADCL4_REG ADCL |
Definition at line 573 of file AT90PWM3.h.
| #define ADCL5_REG ADCL |
Definition at line 574 of file AT90PWM3.h.
| #define ADCL6_REG ADCL |
Definition at line 575 of file AT90PWM3.h.
| #define ADCL7_REG ADCL |
Definition at line 576 of file AT90PWM3.h.
| #define ADEN_REG ADCSRA |
Definition at line 988 of file AT90PWM3.h.
| #define ADHSM_REG ADCSRB |
Definition at line 1249 of file AT90PWM3.h.
| #define ADIE_REG ADCSRA |
Definition at line 984 of file AT90PWM3.h.
| #define ADIF_REG ADCSRA |
Definition at line 985 of file AT90PWM3.h.
| #define ADLAR_REG ADMUX |
Definition at line 112 of file AT90PWM3.h.
| #define ADPS0_REG ADCSRA |
Definition at line 981 of file AT90PWM3.h.
| #define ADPS1_REG ADCSRA |
Definition at line 982 of file AT90PWM3.h.
| #define ADPS2_REG ADCSRA |
Definition at line 983 of file AT90PWM3.h.
| #define ADSC_REG ADCSRA |
Definition at line 987 of file AT90PWM3.h.
| #define ADTS0_REG ADCSRB |
Definition at line 1244 of file AT90PWM3.h.
| #define ADTS1_REG ADCSRB |
Definition at line 1245 of file AT90PWM3.h.
| #define ADTS2_REG ADCSRB |
Definition at line 1246 of file AT90PWM3.h.
| #define ADTS3_REG ADCSRB |
Definition at line 1247 of file AT90PWM3.h.
| #define AMP0 +_BIT 4 |
Definition at line 1311 of file AT90PWM3.h.
| #define AMP0 +_PORT PORTB |
Definition at line 1311 of file AT90PWM3.h.
| #define AMP0 -_BIT 3 |
Definition at line 1311 of file AT90PWM3.h.
| #define AMP0 -_PORT PORTB |
Definition at line 1311 of file AT90PWM3.h.
| #define AMP0EN_REG AMP0CSR |
Definition at line 1194 of file AT90PWM3.h.
| #define AMP0G0_REG AMP0CSR |
Definition at line 1191 of file AT90PWM3.h.
| #define AMP0G1_REG AMP0CSR |
Definition at line 1192 of file AT90PWM3.h.
| #define AMP0IS_REG AMP0CSR |
Definition at line 1193 of file AT90PWM3.h.
| #define AMP0ND_REG DIDR1 |
Definition at line 412 of file AT90PWM3.h.
| #define AMP0PD_REG DIDR1 |
Definition at line 413 of file AT90PWM3.h.
| #define AMP0TS0_REG AMP0CSR |
Definition at line 1189 of file AT90PWM3.h.
| #define AMP0TS1_REG AMP0CSR |
Definition at line 1190 of file AT90PWM3.h.
| #define AMP1 +_BIT 5 |
Definition at line 1360 of file AT90PWM3.h.
| #define AMP1 +_PORT PORTC |
Definition at line 1360 of file AT90PWM3.h.
| #define AMP1 -_BIT 4 |
Definition at line 1360 of file AT90PWM3.h.
| #define AMP1 -_PORT PORTC |
Definition at line 1360 of file AT90PWM3.h.
| #define AMP1EN_REG AMP1CSR |
Definition at line 335 of file AT90PWM3.h.
| #define AMP1G0_REG AMP1CSR |
Definition at line 332 of file AT90PWM3.h.
| #define AMP1G1_REG AMP1CSR |
Definition at line 333 of file AT90PWM3.h.
| #define AMP1IS_REG AMP1CSR |
Definition at line 334 of file AT90PWM3.h.
| #define AMP1TS0_REG AMP1CSR |
Definition at line 330 of file AT90PWM3.h.
| #define AMP1TS1_REG AMP1CSR |
Definition at line 331 of file AT90PWM3.h.
| #define BLBSET_REG SPMCSR |
Definition at line 473 of file AT90PWM3.h.
| #define BODR_REG EUCSRB |
Definition at line 650 of file AT90PWM3.h.
| #define BORF_REG MCUSR |
Definition at line 802 of file AT90PWM3.h.
| #define C_REG SREG |
Definition at line 117 of file AT90PWM3.h.
| #define CAL0_REG OSCCAL |
Definition at line 500 of file AT90PWM3.h.
| #define CAL1_REG OSCCAL |
Definition at line 501 of file AT90PWM3.h.
| #define CAL2_REG OSCCAL |
Definition at line 502 of file AT90PWM3.h.
| #define CAL3_REG OSCCAL |
Definition at line 503 of file AT90PWM3.h.
| #define CAL4_REG OSCCAL |
Definition at line 504 of file AT90PWM3.h.
| #define CAL5_REG OSCCAL |
Definition at line 505 of file AT90PWM3.h.
| #define CAL6_REG OSCCAL |
Definition at line 506 of file AT90PWM3.h.
| #define CLK0_BIT 1 |
Definition at line 1380 of file AT90PWM3.h.
| #define CLK0_PORT PORTD |
Definition at line 1379 of file AT90PWM3.h.
| #define CLKPCE_REG CLKPR |
Definition at line 437 of file AT90PWM3.h.
| #define CLKPS0_REG CLKPR |
Definition at line 433 of file AT90PWM3.h.
| #define CLKPS1_REG CLKPR |
Definition at line 434 of file AT90PWM3.h.
| #define CLKPS2_REG CLKPR |
Definition at line 435 of file AT90PWM3.h.
| #define CLKPS3_REG CLKPR |
Definition at line 436 of file AT90PWM3.h.
| #define COM0A0_REG TCCR0A |
Definition at line 606 of file AT90PWM3.h.
| #define COM0A1_REG TCCR0A |
Definition at line 607 of file AT90PWM3.h.
| #define COM0B0_REG TCCR0A |
Definition at line 604 of file AT90PWM3.h.
| #define COM0B1_REG TCCR0A |
Definition at line 605 of file AT90PWM3.h.
| #define COM1A0_REG TCCR1A |
Definition at line 483 of file AT90PWM3.h.
| #define COM1A1_REG TCCR1A |
Definition at line 484 of file AT90PWM3.h.
| #define COM1B0_REG TCCR1A |
Definition at line 481 of file AT90PWM3.h.
| #define COM1B1_REG TCCR1A |
Definition at line 482 of file AT90PWM3.h.
| #define CPHA_REG SPCR |
Definition at line 694 of file AT90PWM3.h.
| #define CPOL_REG SPCR |
Definition at line 695 of file AT90PWM3.h.
| #define CS00_REG TCCR0B |
Definition at line 594 of file AT90PWM3.h.
| #define CS01_REG TCCR0B |
Definition at line 595 of file AT90PWM3.h.
| #define CS02_REG TCCR0B |
Definition at line 596 of file AT90PWM3.h.
| #define CS10_REG TCCR1B |
Definition at line 491 of file AT90PWM3.h.
| #define CS11_REG TCCR1B |
Definition at line 492 of file AT90PWM3.h.
| #define CS12_REG TCCR1B |
Definition at line 493 of file AT90PWM3.h.
| #define D2A_BIT 7 |
Definition at line 1368 of file AT90PWM3.h.
| #define D2A_PORT PORTC |
Definition at line 1367 of file AT90PWM3.h.
| #define DAATE_REG DACON |
Definition at line 1212 of file AT90PWM3.h.
| #define DACH0_REG DACH |
Definition at line 1090 of file AT90PWM3.h.
| #define DACH1_REG DACH |
Definition at line 1091 of file AT90PWM3.h.
| #define DACH2_REG DACH |
Definition at line 1092 of file AT90PWM3.h.
| #define DACH3_REG DACH |
Definition at line 1093 of file AT90PWM3.h.
| #define DACH4_REG DACH |
Definition at line 1094 of file AT90PWM3.h.
| #define DACH5_REG DACH |
Definition at line 1095 of file AT90PWM3.h.
| #define DACH6_REG DACH |
Definition at line 1096 of file AT90PWM3.h.
| #define DACH7_REG DACH |
Definition at line 1097 of file AT90PWM3.h.
| #define DACL0_REG DACL |
Definition at line 1070 of file AT90PWM3.h.
| #define DACL1_REG DACL |
Definition at line 1071 of file AT90PWM3.h.
| #define DACL2_REG DACL |
Definition at line 1072 of file AT90PWM3.h.
| #define DACL3_REG DACL |
Definition at line 1073 of file AT90PWM3.h.
| #define DACL4_REG DACL |
Definition at line 1074 of file AT90PWM3.h.
| #define DACL5_REG DACL |
Definition at line 1075 of file AT90PWM3.h.
| #define DACL6_REG DACL |
Definition at line 1076 of file AT90PWM3.h.
| #define DACL7_REG DACL |
Definition at line 1077 of file AT90PWM3.h.
| #define DAEN_REG DACON |
Definition at line 1207 of file AT90PWM3.h.
| #define DALA_REG DACON |
Definition at line 1208 of file AT90PWM3.h.
| #define DALI_BIT 4 |
Definition at line 1405 of file AT90PWM3.h.
| #define DALI_BIT 3 |
Definition at line 1405 of file AT90PWM3.h.
| #define DALI_PORT PORTD |
Definition at line 1404 of file AT90PWM3.h.
| #define DALI_PORT PORTD |
Definition at line 1404 of file AT90PWM3.h.
| #define DATS0_REG DACON |
Definition at line 1209 of file AT90PWM3.h.
| #define DATS1_REG DACON |
Definition at line 1210 of file AT90PWM3.h.
| #define DATS2_REG DACON |
Definition at line 1211 of file AT90PWM3.h.
| #define DDB0_REG DDRB |
Definition at line 460 of file AT90PWM3.h.
| #define DDB1_REG DDRB |
Definition at line 461 of file AT90PWM3.h.
| #define DDB2_REG DDRB |
Definition at line 462 of file AT90PWM3.h.
| #define DDB3_REG DDRB |
Definition at line 463 of file AT90PWM3.h.
| #define DDB4_REG DDRB |
Definition at line 464 of file AT90PWM3.h.
| #define DDB5_REG DDRB |
Definition at line 465 of file AT90PWM3.h.
| #define DDB6_REG DDRB |
Definition at line 466 of file AT90PWM3.h.
| #define DDB7_REG DDRB |
Definition at line 467 of file AT90PWM3.h.
| #define DDC0_REG DDRC |
Definition at line 931 of file AT90PWM3.h.
| #define DDC1_REG DDRC |
Definition at line 932 of file AT90PWM3.h.
| #define DDC2_REG DDRC |
Definition at line 933 of file AT90PWM3.h.
| #define DDC3_REG DDRC |
Definition at line 934 of file AT90PWM3.h.
| #define DDC4_REG DDRC |
Definition at line 935 of file AT90PWM3.h.
| #define DDC5_REG DDRC |
Definition at line 936 of file AT90PWM3.h.
| #define DDC6_REG DDRC |
Definition at line 937 of file AT90PWM3.h.
| #define DDC7_REG DDRC |
Definition at line 938 of file AT90PWM3.h.
| #define DDD0_REG DDRD |
Definition at line 519 of file AT90PWM3.h.
| #define DDD1_REG DDRD |
Definition at line 520 of file AT90PWM3.h.
| #define DDD2_REG DDRD |
Definition at line 521 of file AT90PWM3.h.
| #define DDD3_REG DDRD |
Definition at line 522 of file AT90PWM3.h.
| #define DDD4_REG DDRD |
Definition at line 523 of file AT90PWM3.h.
| #define DDD5_REG DDRD |
Definition at line 524 of file AT90PWM3.h.
| #define DDD6_REG DDRD |
Definition at line 525 of file AT90PWM3.h.
| #define DDD7_REG DDRD |
Definition at line 526 of file AT90PWM3.h.
| #define DDE0_REG DDRE |
Definition at line 579 of file AT90PWM3.h.
| #define DDE1_REG DDRE |
Definition at line 580 of file AT90PWM3.h.
| #define DDE2_REG DDRE |
Definition at line 581 of file AT90PWM3.h.
| #define DOR_REG UCSRA |
Definition at line 201 of file AT90PWM3.h.
| #define DORD_REG SPCR |
Definition at line 697 of file AT90PWM3.h.
| #define EEAR10_REG EEARH |
Definition at line 857 of file AT90PWM3.h.
| #define EEAR11_REG EEARH |
Definition at line 858 of file AT90PWM3.h.
| #define EEAR8_REG EEARH |
Definition at line 855 of file AT90PWM3.h.
| #define EEAR9_REG EEARH |
Definition at line 856 of file AT90PWM3.h.
| #define EEARL0_REG EEARL |
Definition at line 861 of file AT90PWM3.h.
| #define EEARL1_REG EEARL |
Definition at line 862 of file AT90PWM3.h.
| #define EEARL2_REG EEARL |
Definition at line 863 of file AT90PWM3.h.
| #define EEARL3_REG EEARL |
Definition at line 864 of file AT90PWM3.h.
| #define EEARL4_REG EEARL |
Definition at line 865 of file AT90PWM3.h.
| #define EEARL5_REG EEARL |
Definition at line 866 of file AT90PWM3.h.
| #define EEARL6_REG EEARL |
Definition at line 867 of file AT90PWM3.h.
| #define EEARL7_REG EEARL |
Definition at line 868 of file AT90PWM3.h.
| #define EEDR0_REG EEDR |
Definition at line 153 of file AT90PWM3.h.
| #define EEDR1_REG EEDR |
Definition at line 154 of file AT90PWM3.h.
| #define EEDR2_REG EEDR |
Definition at line 155 of file AT90PWM3.h.
| #define EEDR3_REG EEDR |
Definition at line 156 of file AT90PWM3.h.
| #define EEDR4_REG EEDR |
Definition at line 157 of file AT90PWM3.h.
| #define EEDR5_REG EEDR |
Definition at line 158 of file AT90PWM3.h.
| #define EEDR6_REG EEDR |
Definition at line 159 of file AT90PWM3.h.
| #define EEDR7_REG EEDR |
Definition at line 160 of file AT90PWM3.h.
| #define EEMWE_REG EECR |
Definition at line 808 of file AT90PWM3.h.
| #define EERE_REG EECR |
Definition at line 806 of file AT90PWM3.h.
| #define EERIE_REG EECR |
Definition at line 809 of file AT90PWM3.h.
| #define EEWE_REG EECR |
Definition at line 807 of file AT90PWM3.h.
| #define EMCH_REG EUCSRB |
Definition at line 651 of file AT90PWM3.h.
| #define EUDR0_REG EUDR |
Definition at line 98 of file AT90PWM3.h.
| #define EUDR1_REG EUDR |
Definition at line 99 of file AT90PWM3.h.
| #define EUDR2_REG EUDR |
Definition at line 100 of file AT90PWM3.h.
| #define EUDR3_REG EUDR |
Definition at line 101 of file AT90PWM3.h.
| #define EUDR4_REG EUDR |
Definition at line 102 of file AT90PWM3.h.
| #define EUDR5_REG EUDR |
Definition at line 103 of file AT90PWM3.h.
| #define EUDR6_REG EUDR |
Definition at line 104 of file AT90PWM3.h.
| #define EUDR7_REG EUDR |
Definition at line 105 of file AT90PWM3.h.
| #define EUSART_REG EUCSRB |
Definition at line 653 of file AT90PWM3.h.
| #define EUSBS_REG EUCSRB |
Definition at line 652 of file AT90PWM3.h.
| #define EXTRF_REG MCUSR |
Definition at line 801 of file AT90PWM3.h.
| #define F1617_REG EUCSRC |
Definition at line 658 of file AT90PWM3.h.
| #define FE_REG UCSRA |
Definition at line 202 of file AT90PWM3.h.
| #define FEM_REG EUCSRC |
Definition at line 659 of file AT90PWM3.h.
| #define FOC0A_REG TCCR0B |
Definition at line 599 of file AT90PWM3.h.
| #define FOC0B_REG TCCR0B |
Definition at line 598 of file AT90PWM3.h.
| #define FOC1A_REG TCCR1C |
Definition at line 488 of file AT90PWM3.h.
| #define FOC1B_REG TCCR1C |
Definition at line 487 of file AT90PWM3.h.
| #define GPIOR00_REG GPIOR0 |
Definition at line 539 of file AT90PWM3.h.
| #define GPIOR01_REG GPIOR0 |
Definition at line 540 of file AT90PWM3.h.
| #define GPIOR02_REG GPIOR0 |
Definition at line 541 of file AT90PWM3.h.
| #define GPIOR03_REG GPIOR0 |
Definition at line 542 of file AT90PWM3.h.
| #define GPIOR04_REG GPIOR0 |
Definition at line 543 of file AT90PWM3.h.
| #define GPIOR05_REG GPIOR0 |
Definition at line 544 of file AT90PWM3.h.
| #define GPIOR06_REG GPIOR0 |
Definition at line 545 of file AT90PWM3.h.
| #define GPIOR07_REG GPIOR0 |
Definition at line 546 of file AT90PWM3.h.
| #define GPIOR10_REG GPIOR1 |
Definition at line 529 of file AT90PWM3.h.
| #define GPIOR11_REG GPIOR1 |
Definition at line 530 of file AT90PWM3.h.
| #define GPIOR12_REG GPIOR1 |
Definition at line 531 of file AT90PWM3.h.
| #define GPIOR13_REG GPIOR1 |
Definition at line 532 of file AT90PWM3.h.
| #define GPIOR14_REG GPIOR1 |
Definition at line 533 of file AT90PWM3.h.
| #define GPIOR15_REG GPIOR1 |
Definition at line 534 of file AT90PWM3.h.
| #define GPIOR16_REG GPIOR1 |
Definition at line 535 of file AT90PWM3.h.
| #define GPIOR17_REG GPIOR1 |
Definition at line 536 of file AT90PWM3.h.
| #define GPIOR20_REG GPIOR2 |
Definition at line 559 of file AT90PWM3.h.
| #define GPIOR21_REG GPIOR2 |
Definition at line 560 of file AT90PWM3.h.
| #define GPIOR22_REG GPIOR2 |
Definition at line 561 of file AT90PWM3.h.
| #define GPIOR23_REG GPIOR2 |
Definition at line 562 of file AT90PWM3.h.
| #define GPIOR24_REG GPIOR2 |
Definition at line 563 of file AT90PWM3.h.
| #define GPIOR25_REG GPIOR2 |
Definition at line 564 of file AT90PWM3.h.
| #define GPIOR26_REG GPIOR2 |
Definition at line 565 of file AT90PWM3.h.
| #define GPIOR27_REG GPIOR2 |
Definition at line 566 of file AT90PWM3.h.
| #define GPIOR30_REG GPIOR3 |
Definition at line 549 of file AT90PWM3.h.
| #define GPIOR31_REG GPIOR3 |
Definition at line 550 of file AT90PWM3.h.
| #define GPIOR32_REG GPIOR3 |
Definition at line 551 of file AT90PWM3.h.
| #define GPIOR33_REG GPIOR3 |
Definition at line 552 of file AT90PWM3.h.
| #define GPIOR34_REG GPIOR3 |
Definition at line 553 of file AT90PWM3.h.
| #define GPIOR35_REG GPIOR3 |
Definition at line 554 of file AT90PWM3.h.
| #define GPIOR36_REG GPIOR3 |
Definition at line 555 of file AT90PWM3.h.
| #define GPIOR37_REG GPIOR3 |
Definition at line 556 of file AT90PWM3.h.
| #define H_REG SREG |
Definition at line 122 of file AT90PWM3.h.
| #define I_REG SREG |
Definition at line 124 of file AT90PWM3.h.
| #define ICES1_REG TCCR1B |
Definition at line 496 of file AT90PWM3.h.
| #define ICF1_REG TIFR1 |
Definition at line 705 of file AT90PWM3.h.
| #define ICIE1_REG TIMSK1 |
Definition at line 1186 of file AT90PWM3.h.
| #define ICNC1_REG TCCR1B |
Definition at line 497 of file AT90PWM3.h.
| #define ICP1_BIT 4 |
Definition at line 1407 of file AT90PWM3.h.
| #define ICP1_PORT PORTD |
Definition at line 1406 of file AT90PWM3.h.
| #define ICP1B_BIT 6 |
Definition at line 1323 of file AT90PWM3.h.
| #define ICP1B_PORT PORTB |
Definition at line 1322 of file AT90PWM3.h.
| #define ICPSEL1_REG GTCCR |
Definition at line 709 of file AT90PWM3.h.
| #define ICR1H0_REG ICR1H |
Definition at line 188 of file AT90PWM3.h.
| #define ICR1H1_REG ICR1H |
Definition at line 189 of file AT90PWM3.h.
| #define ICR1H2_REG ICR1H |
Definition at line 190 of file AT90PWM3.h.
| #define ICR1H3_REG ICR1H |
Definition at line 191 of file AT90PWM3.h.
| #define ICR1H4_REG ICR1H |
Definition at line 192 of file AT90PWM3.h.
| #define ICR1H5_REG ICR1H |
Definition at line 193 of file AT90PWM3.h.
| #define ICR1H6_REG ICR1H |
Definition at line 194 of file AT90PWM3.h.
| #define ICR1H7_REG ICR1H |
Definition at line 195 of file AT90PWM3.h.
| #define ICR1L0_REG ICR1L |
Definition at line 227 of file AT90PWM3.h.
| #define ICR1L1_REG ICR1L |
Definition at line 228 of file AT90PWM3.h.
| #define ICR1L2_REG ICR1L |
Definition at line 229 of file AT90PWM3.h.
| #define ICR1L3_REG ICR1L |
Definition at line 230 of file AT90PWM3.h.
| #define ICR1L4_REG ICR1L |
Definition at line 231 of file AT90PWM3.h.
| #define ICR1L5_REG ICR1L |
Definition at line 232 of file AT90PWM3.h.
| #define ICR1L6_REG ICR1L |
Definition at line 233 of file AT90PWM3.h.
| #define ICR1L7_REG ICR1L |
Definition at line 234 of file AT90PWM3.h.
| #define INT0_BIT 6 |
Definition at line 1421 of file AT90PWM3.h.
| #define INT0_PORT PORTD |
Definition at line 1420 of file AT90PWM3.h.
| #define INT0_REG EIMSK |
Definition at line 347 of file AT90PWM3.h.
| #define INT1_BIT 2 |
Definition at line 1305 of file AT90PWM3.h.
| #define INT1_PORT PORTB |
Definition at line 1304 of file AT90PWM3.h.
| #define INT1_REG EIMSK |
Definition at line 348 of file AT90PWM3.h.
| #define INT2_BIT 5 |
Definition at line 1316 of file AT90PWM3.h.
| #define INT2_PORT PORTB |
Definition at line 1315 of file AT90PWM3.h.
| #define INT2_REG EIMSK |
Definition at line 349 of file AT90PWM3.h.
| #define INT3_BIT 0 |
Definition at line 1333 of file AT90PWM3.h.
| #define INT3_PORT PORTC |
Definition at line 1332 of file AT90PWM3.h.
| #define INT3_REG EIMSK |
Definition at line 350 of file AT90PWM3.h.
| #define INTF0_REG EIFR |
Definition at line 883 of file AT90PWM3.h.
| #define INTF1_REG EIFR |
Definition at line 884 of file AT90PWM3.h.
| #define INTF2_REG EIFR |
Definition at line 885 of file AT90PWM3.h.
| #define INTF3_REG EIFR |
Definition at line 886 of file AT90PWM3.h.
| #define ISC00_REG EICRA |
Definition at line 389 of file AT90PWM3.h.
| #define ISC01_REG EICRA |
Definition at line 390 of file AT90PWM3.h.
| #define ISC10_REG EICRA |
Definition at line 391 of file AT90PWM3.h.
| #define ISC11_REG EICRA |
Definition at line 392 of file AT90PWM3.h.
| #define ISC20_REG EICRA |
Definition at line 393 of file AT90PWM3.h.
| #define ISC21_REG EICRA |
Definition at line 394 of file AT90PWM3.h.
| #define ISC30_REG EICRA |
Definition at line 395 of file AT90PWM3.h.
| #define ISC31_REG EICRA |
Definition at line 396 of file AT90PWM3.h.
| #define IVCE_REG MCUCR |
Definition at line 871 of file AT90PWM3.h.
| #define IVSEL_REG MCUCR |
Definition at line 872 of file AT90PWM3.h.
| #define MISO_A_BIT 2 |
Definition at line 1387 of file AT90PWM3.h.
| #define MISO_A_PORT PORTD |
Definition at line 1386 of file AT90PWM3.h.
| #define MISO_BIT 0 |
Definition at line 1293 of file AT90PWM3.h.
| #define MISO_PORT PORTB |
Definition at line 1292 of file AT90PWM3.h.
| #define MOSI_A_BIT 3 |
Definition at line 1398 of file AT90PWM3.h.
| #define MOSI_A_PORT PORTD |
Definition at line 1397 of file AT90PWM3.h.
| #define MOSI_BIT 1 |
Definition at line 1298 of file AT90PWM3.h.
| #define MOSI_PORT PORTB |
Definition at line 1297 of file AT90PWM3.h.
| #define MPCM_REG UCSRA |
Definition at line 198 of file AT90PWM3.h.
| #define MSTR_REG SPCR |
Definition at line 696 of file AT90PWM3.h.
| #define MUBRR0_REG MUBRRL |
Definition at line 889 of file AT90PWM3.h.
| #define MUBRR10_REG MUBRRH |
Definition at line 901 of file AT90PWM3.h.
| #define MUBRR11_REG MUBRRH |
Definition at line 902 of file AT90PWM3.h.
| #define MUBRR12_REG MUBRRH |
Definition at line 903 of file AT90PWM3.h.
| #define MUBRR13_REG MUBRRH |
Definition at line 904 of file AT90PWM3.h.
| #define MUBRR14_REG MUBRRH |
Definition at line 905 of file AT90PWM3.h.
| #define MUBRR15_REG MUBRRH |
Definition at line 906 of file AT90PWM3.h.
| #define MUBRR1_REG MUBRRL |
Definition at line 890 of file AT90PWM3.h.
| #define MUBRR2_REG MUBRRL |
Definition at line 891 of file AT90PWM3.h.
| #define MUBRR3_REG MUBRRL |
Definition at line 892 of file AT90PWM3.h.
| #define MUBRR4_REG MUBRRL |
Definition at line 893 of file AT90PWM3.h.
| #define MUBRR5_REG MUBRRL |
Definition at line 894 of file AT90PWM3.h.
| #define MUBRR6_REG MUBRRL |
Definition at line 895 of file AT90PWM3.h.
| #define MUBRR7_REG MUBRRL |
Definition at line 896 of file AT90PWM3.h.
| #define MUBRR8_REG MUBRRH |
Definition at line 899 of file AT90PWM3.h.
| #define MUBRR9_REG MUBRRH |
Definition at line 900 of file AT90PWM3.h.
| #define MUX0_REG ADMUX |
Definition at line 108 of file AT90PWM3.h.
| #define MUX1_REG ADMUX |
Definition at line 109 of file AT90PWM3.h.
| #define MUX2_REG ADMUX |
Definition at line 110 of file AT90PWM3.h.
| #define MUX3_REG ADMUX |
Definition at line 111 of file AT90PWM3.h.
| #define N_REG SREG |
Definition at line 119 of file AT90PWM3.h.
| #define OC0A_BIT 3 |
Definition at line 1394 of file AT90PWM3.h.
| #define OC0A_PORT PORTD |
Definition at line 1393 of file AT90PWM3.h.
| #define OC0B_BIT 1 |
Definition at line 1432 of file AT90PWM3.h.
| #define OC0B_PORT PORTE |
Definition at line 1431 of file AT90PWM3.h.
| #define OC1A_BIT 2 |
Definition at line 1385 of file AT90PWM3.h.
| #define OC1A_PORT PORTD |
Definition at line 1384 of file AT90PWM3.h.
| #define OC1B_BIT 1 |
Definition at line 1340 of file AT90PWM3.h.
| #define OC1B_PORT PORTC |
Definition at line 1339 of file AT90PWM3.h.
| #define OCD_BIT 0 |
Definition at line 1429 of file AT90PWM3.h.
| #define OCD_PORT PORTE |
Definition at line 1428 of file AT90PWM3.h.
| #define OCF0A_REG TIFR0 |
Definition at line 1288 of file AT90PWM3.h.
| #define OCF0B_REG TIFR0 |
Definition at line 1289 of file AT90PWM3.h.
| #define OCF1A_REG TIFR1 |
Definition at line 703 of file AT90PWM3.h.
| #define OCF1B_REG TIFR1 |
Definition at line 704 of file AT90PWM3.h.
| #define OCIE0A_REG TIMSK0 |
Definition at line 1179 of file AT90PWM3.h.
| #define OCIE0B_REG TIMSK0 |
Definition at line 1180 of file AT90PWM3.h.
| #define OCIE1A_REG TIMSK1 |
Definition at line 1184 of file AT90PWM3.h.
| #define OCIE1B_REG TIMSK1 |
Definition at line 1185 of file AT90PWM3.h.
| #define OCR0RA_00_REG OCR0RAH |
Definition at line 1102 of file AT90PWM3.h.
| #define OCR0RA_01_REG OCR0RAH |
Definition at line 1103 of file AT90PWM3.h.
| #define OCR0RA_0_REG OCR0RAL |
Definition at line 509 of file AT90PWM3.h.
| #define OCR0RA_1_REG OCR0RAL |
Definition at line 510 of file AT90PWM3.h.
| #define OCR0RA_2_REG OCR0RAL |
Definition at line 511 of file AT90PWM3.h.
| #define OCR0RA_3_REG OCR0RAL |
Definition at line 512 of file AT90PWM3.h.
| #define OCR0RA_4_REG OCR0RAL |
Definition at line 513 of file AT90PWM3.h.
| #define OCR0RA_5_REG OCR0RAL |
Definition at line 514 of file AT90PWM3.h.
| #define OCR0RA_6_REG OCR0RAL |
Definition at line 515 of file AT90PWM3.h.
| #define OCR0RA_7_REG OCR0RAL |
Definition at line 516 of file AT90PWM3.h.
| #define OCR0RA_8_REG OCR0RAH |
Definition at line 1100 of file AT90PWM3.h.
| #define OCR0RA_9_REG OCR0RAH |
Definition at line 1101 of file AT90PWM3.h.
| #define OCR0RB_00_REG OCR0RBH |
Definition at line 442 of file AT90PWM3.h.
| #define OCR0RB_01_REG OCR0RBH |
Definition at line 443 of file AT90PWM3.h.
| #define OCR0RB_02_REG OCR0RBH |
Definition at line 444 of file AT90PWM3.h.
| #define OCR0RB_03_REG OCR0RBH |
Definition at line 445 of file AT90PWM3.h.
| #define OCR0RB_04_REG OCR0RBH |
Definition at line 446 of file AT90PWM3.h.
| #define OCR0RB_05_REG OCR0RBH |
Definition at line 447 of file AT90PWM3.h.
| #define OCR0RB_0_REG OCR0RBL |
Definition at line 450 of file AT90PWM3.h.
| #define OCR0RB_1_REG OCR0RBL |
Definition at line 451 of file AT90PWM3.h.
| #define OCR0RB_2_REG OCR0RBL |
Definition at line 452 of file AT90PWM3.h.
| #define OCR0RB_3_REG OCR0RBL |
Definition at line 453 of file AT90PWM3.h.
| #define OCR0RB_4_REG OCR0RBL |
Definition at line 454 of file AT90PWM3.h.
| #define OCR0RB_5_REG OCR0RBL |
Definition at line 455 of file AT90PWM3.h.
| #define OCR0RB_6_REG OCR0RBL |
Definition at line 456 of file AT90PWM3.h.
| #define OCR0RB_7_REG OCR0RBL |
Definition at line 457 of file AT90PWM3.h.
| #define OCR0RB_8_REG OCR0RBH |
Definition at line 440 of file AT90PWM3.h.
| #define OCR0RB_9_REG OCR0RBH |
Definition at line 441 of file AT90PWM3.h.
| #define OCR0SA_00_REG OCR0SAH |
Definition at line 851 of file AT90PWM3.h.
| #define OCR0SA_01_REG OCR0SAH |
Definition at line 852 of file AT90PWM3.h.
| #define OCR0SA_0_REG OCR0SAL |
Definition at line 839 of file AT90PWM3.h.
| #define OCR0SA_1_REG OCR0SAL |
Definition at line 840 of file AT90PWM3.h.
| #define OCR0SA_2_REG OCR0SAL |
Definition at line 841 of file AT90PWM3.h.
| #define OCR0SA_3_REG OCR0SAL |
Definition at line 842 of file AT90PWM3.h.
| #define OCR0SA_4_REG OCR0SAL |
Definition at line 843 of file AT90PWM3.h.
| #define OCR0SA_5_REG OCR0SAL |
Definition at line 844 of file AT90PWM3.h.
| #define OCR0SA_6_REG OCR0SAL |
Definition at line 845 of file AT90PWM3.h.
| #define OCR0SA_7_REG OCR0SAL |
Definition at line 846 of file AT90PWM3.h.
| #define OCR0SA_8_REG OCR0SAH |
Definition at line 849 of file AT90PWM3.h.
| #define OCR0SA_9_REG OCR0SAH |
Definition at line 850 of file AT90PWM3.h.
| #define OCR0SB_00_REG OCR0SBH |
Definition at line 927 of file AT90PWM3.h.
| #define OCR0SB_01_REG OCR0SBH |
Definition at line 928 of file AT90PWM3.h.
| #define OCR0SB_0_REG OCR0SBL |
Definition at line 915 of file AT90PWM3.h.
| #define OCR0SB_1_REG OCR0SBL |
Definition at line 916 of file AT90PWM3.h.
| #define OCR0SB_2_REG OCR0SBL |
Definition at line 917 of file AT90PWM3.h.
| #define OCR0SB_3_REG OCR0SBL |
Definition at line 918 of file AT90PWM3.h.
| #define OCR0SB_4_REG OCR0SBL |
Definition at line 919 of file AT90PWM3.h.
| #define OCR0SB_5_REG OCR0SBL |
Definition at line 920 of file AT90PWM3.h.
| #define OCR0SB_6_REG OCR0SBL |
Definition at line 921 of file AT90PWM3.h.
| #define OCR0SB_7_REG OCR0SBL |
Definition at line 922 of file AT90PWM3.h.
| #define OCR0SB_8_REG OCR0SBH |
Definition at line 925 of file AT90PWM3.h.
| #define OCR0SB_9_REG OCR0SBH |
Definition at line 926 of file AT90PWM3.h.
| #define OCR1AH0_REG OCR1AH |
Definition at line 1267 of file AT90PWM3.h.
| #define OCR1AH1_REG OCR1AH |
Definition at line 1268 of file AT90PWM3.h.
| #define OCR1AH2_REG OCR1AH |
Definition at line 1269 of file AT90PWM3.h.
| #define OCR1AH3_REG OCR1AH |
Definition at line 1270 of file AT90PWM3.h.
| #define OCR1AH4_REG OCR1AH |
Definition at line 1271 of file AT90PWM3.h.
| #define OCR1AH5_REG OCR1AH |
Definition at line 1272 of file AT90PWM3.h.
| #define OCR1AH6_REG OCR1AH |
Definition at line 1273 of file AT90PWM3.h.
| #define OCR1AH7_REG OCR1AH |
Definition at line 1274 of file AT90PWM3.h.
| #define OCR1AL0_REG OCR1AL |
Definition at line 1277 of file AT90PWM3.h.
| #define OCR1AL1_REG OCR1AL |
Definition at line 1278 of file AT90PWM3.h.
| #define OCR1AL2_REG OCR1AL |
Definition at line 1279 of file AT90PWM3.h.
| #define OCR1AL3_REG OCR1AL |
Definition at line 1280 of file AT90PWM3.h.
| #define OCR1AL4_REG OCR1AL |
Definition at line 1281 of file AT90PWM3.h.
| #define OCR1AL5_REG OCR1AL |
Definition at line 1282 of file AT90PWM3.h.
| #define OCR1AL6_REG OCR1AL |
Definition at line 1283 of file AT90PWM3.h.
| #define OCR1AL7_REG OCR1AL |
Definition at line 1284 of file AT90PWM3.h.
| #define OCR1BH0_REG OCR1BH |
Definition at line 780 of file AT90PWM3.h.
| #define OCR1BH1_REG OCR1BH |
Definition at line 781 of file AT90PWM3.h.
| #define OCR1BH2_REG OCR1BH |
Definition at line 782 of file AT90PWM3.h.
| #define OCR1BH3_REG OCR1BH |
Definition at line 783 of file AT90PWM3.h.
| #define OCR1BH4_REG OCR1BH |
Definition at line 784 of file AT90PWM3.h.
| #define OCR1BH5_REG OCR1BH |
Definition at line 785 of file AT90PWM3.h.
| #define OCR1BH6_REG OCR1BH |
Definition at line 786 of file AT90PWM3.h.
| #define OCR1BH7_REG OCR1BH |
Definition at line 787 of file AT90PWM3.h.
| #define OCR1BL0_REG OCR1BL |
Definition at line 770 of file AT90PWM3.h.
| #define OCR1BL1_REG OCR1BL |
Definition at line 771 of file AT90PWM3.h.
| #define OCR1BL2_REG OCR1BL |
Definition at line 772 of file AT90PWM3.h.
| #define OCR1BL3_REG OCR1BL |
Definition at line 773 of file AT90PWM3.h.
| #define OCR1BL4_REG OCR1BL |
Definition at line 774 of file AT90PWM3.h.
| #define OCR1BL5_REG OCR1BL |
Definition at line 775 of file AT90PWM3.h.
| #define OCR1BL6_REG OCR1BL |
Definition at line 776 of file AT90PWM3.h.
| #define OCR1BL7_REG OCR1BL |
Definition at line 777 of file AT90PWM3.h.
| #define OCR1RA_0_REG OCR1RAL |
Definition at line 423 of file AT90PWM3.h.
| #define OCR1RA_10_REG OCR1RAH |
Definition at line 419 of file AT90PWM3.h.
| #define OCR1RA_11_REG OCR1RAH |
Definition at line 420 of file AT90PWM3.h.
| #define OCR1RA_1_REG OCR1RAL |
Definition at line 424 of file AT90PWM3.h.
| #define OCR1RA_2_REG OCR1RAL |
Definition at line 425 of file AT90PWM3.h.
| #define OCR1RA_3_REG OCR1RAL |
Definition at line 426 of file AT90PWM3.h.
| #define OCR1RA_4_REG OCR1RAL |
Definition at line 427 of file AT90PWM3.h.
| #define OCR1RA_5_REG OCR1RAL |
Definition at line 428 of file AT90PWM3.h.
| #define OCR1RA_6_REG OCR1RAL |
Definition at line 429 of file AT90PWM3.h.
| #define OCR1RA_7_REG OCR1RAL |
Definition at line 430 of file AT90PWM3.h.
| #define OCR1RA_8_REG OCR1RAH |
Definition at line 417 of file AT90PWM3.h.
| #define OCR1RA_9_REG OCR1RAH |
Definition at line 418 of file AT90PWM3.h.
| #define OCR1RB_0_REG OCR1RBL |
Definition at line 1022 of file AT90PWM3.h.
| #define OCR1RB_10_REG OCR1RBH |
Definition at line 1040 of file AT90PWM3.h.
| #define OCR1RB_11_REG OCR1RBH |
Definition at line 1041 of file AT90PWM3.h.
| #define OCR1RB_12_REG OCR1RBH |
Definition at line 1042 of file AT90PWM3.h.
| #define OCR1RB_13_REG OCR1RBH |
Definition at line 1043 of file AT90PWM3.h.
| #define OCR1RB_14_REG OCR1RBH |
Definition at line 1044 of file AT90PWM3.h.
| #define OCR1RB_15_REG OCR1RBH |
Definition at line 1045 of file AT90PWM3.h.
| #define OCR1RB_1_REG OCR1RBL |
Definition at line 1023 of file AT90PWM3.h.
| #define OCR1RB_2_REG OCR1RBL |
Definition at line 1024 of file AT90PWM3.h.
| #define OCR1RB_3_REG OCR1RBL |
Definition at line 1025 of file AT90PWM3.h.
| #define OCR1RB_4_REG OCR1RBL |
Definition at line 1026 of file AT90PWM3.h.
| #define OCR1RB_5_REG OCR1RBL |
Definition at line 1027 of file AT90PWM3.h.
| #define OCR1RB_6_REG OCR1RBL |
Definition at line 1028 of file AT90PWM3.h.
| #define OCR1RB_7_REG OCR1RBL |
Definition at line 1029 of file AT90PWM3.h.
| #define OCR1RB_8_REG OCR1RBH |
Definition at line 1038 of file AT90PWM3.h.
| #define OCR1RB_9_REG OCR1RBH |
Definition at line 1039 of file AT90PWM3.h.
| #define OCR1SA_0_REG OCR1SAL |
Definition at line 971 of file AT90PWM3.h.
| #define OCR1SA_10_REG OCR1SAH |
Definition at line 1060 of file AT90PWM3.h.
| #define OCR1SA_11_REG OCR1SAH |
Definition at line 1061 of file AT90PWM3.h.
| #define OCR1SA_1_REG OCR1SAL |
Definition at line 972 of file AT90PWM3.h.
| #define OCR1SA_2_REG OCR1SAL |
Definition at line 973 of file AT90PWM3.h.
| #define OCR1SA_3_REG OCR1SAL |
Definition at line 974 of file AT90PWM3.h.
| #define OCR1SA_4_REG OCR1SAL |
Definition at line 975 of file AT90PWM3.h.
| #define OCR1SA_5_REG OCR1SAL |
Definition at line 976 of file AT90PWM3.h.
| #define OCR1SA_6_REG OCR1SAL |
Definition at line 977 of file AT90PWM3.h.
| #define OCR1SA_7_REG OCR1SAL |
Definition at line 978 of file AT90PWM3.h.
| #define OCR1SA_8_REG OCR1SAH |
Definition at line 1058 of file AT90PWM3.h.
| #define OCR1SA_9_REG OCR1SAH |
Definition at line 1059 of file AT90PWM3.h.
| #define OCR1SB_0_REG OCR1SBL |
Definition at line 1048 of file AT90PWM3.h.
| #define OCR1SB_10_REG OCR1SBH |
Definition at line 1034 of file AT90PWM3.h.
| #define OCR1SB_11_REG OCR1SBH |
Definition at line 1035 of file AT90PWM3.h.
| #define OCR1SB_1_REG OCR1SBL |
Definition at line 1049 of file AT90PWM3.h.
| #define OCR1SB_2_REG OCR1SBL |
Definition at line 1050 of file AT90PWM3.h.
| #define OCR1SB_3_REG OCR1SBL |
Definition at line 1051 of file AT90PWM3.h.
| #define OCR1SB_4_REG OCR1SBL |
Definition at line 1052 of file AT90PWM3.h.
| #define OCR1SB_5_REG OCR1SBL |
Definition at line 1053 of file AT90PWM3.h.
| #define OCR1SB_6_REG OCR1SBL |
Definition at line 1054 of file AT90PWM3.h.
| #define OCR1SB_7_REG OCR1SBL |
Definition at line 1055 of file AT90PWM3.h.
| #define OCR1SB_8_REG OCR1SBH |
Definition at line 1032 of file AT90PWM3.h.
| #define OCR1SB_9_REG OCR1SBH |
Definition at line 1033 of file AT90PWM3.h.
| #define OCR2RA_0_REG OCR2RAL |
Definition at line 829 of file AT90PWM3.h.
| #define OCR2RA_10_REG OCR2RAH |
Definition at line 825 of file AT90PWM3.h.
| #define OCR2RA_11_REG OCR2RAH |
Definition at line 826 of file AT90PWM3.h.
| #define OCR2RA_1_REG OCR2RAL |
Definition at line 830 of file AT90PWM3.h.
| #define OCR2RA_2_REG OCR2RAL |
Definition at line 831 of file AT90PWM3.h.
| #define OCR2RA_3_REG OCR2RAL |
Definition at line 832 of file AT90PWM3.h.
| #define OCR2RA_4_REG OCR2RAL |
Definition at line 833 of file AT90PWM3.h.
| #define OCR2RA_5_REG OCR2RAL |
Definition at line 834 of file AT90PWM3.h.
| #define OCR2RA_6_REG OCR2RAL |
Definition at line 835 of file AT90PWM3.h.
| #define OCR2RA_7_REG OCR2RAL |
Definition at line 836 of file AT90PWM3.h.
| #define OCR2RA_8_REG OCR2RAH |
Definition at line 823 of file AT90PWM3.h.
| #define OCR2RA_9_REG OCR2RAH |
Definition at line 824 of file AT90PWM3.h.
| #define OCR2RB_0_REG OCR2RBL |
Definition at line 734 of file AT90PWM3.h.
| #define OCR2RB_10_REG OCR2RBH |
Definition at line 752 of file AT90PWM3.h.
| #define OCR2RB_11_REG OCR2RBH |
Definition at line 753 of file AT90PWM3.h.
| #define OCR2RB_12_REG OCR2RBH |
Definition at line 754 of file AT90PWM3.h.
| #define OCR2RB_13_REG OCR2RBH |
Definition at line 755 of file AT90PWM3.h.
| #define OCR2RB_14_REG OCR2RBH |
Definition at line 756 of file AT90PWM3.h.
| #define OCR2RB_15_REG OCR2RBH |
Definition at line 757 of file AT90PWM3.h.
| #define OCR2RB_1_REG OCR2RBL |
Definition at line 735 of file AT90PWM3.h.
| #define OCR2RB_2_REG OCR2RBL |
Definition at line 736 of file AT90PWM3.h.
| #define OCR2RB_3_REG OCR2RBL |
Definition at line 737 of file AT90PWM3.h.
| #define OCR2RB_4_REG OCR2RBL |
Definition at line 738 of file AT90PWM3.h.
| #define OCR2RB_5_REG OCR2RBL |
Definition at line 739 of file AT90PWM3.h.
| #define OCR2RB_6_REG OCR2RBL |
Definition at line 740 of file AT90PWM3.h.
| #define OCR2RB_7_REG OCR2RBL |
Definition at line 741 of file AT90PWM3.h.
| #define OCR2RB_8_REG OCR2RBH |
Definition at line 750 of file AT90PWM3.h.
| #define OCR2RB_9_REG OCR2RBH |
Definition at line 751 of file AT90PWM3.h.
| #define OCR2SA_0_REG OCR2SAL |
Definition at line 630 of file AT90PWM3.h.
| #define OCR2SA_10_REG OCR2SAH |
Definition at line 911 of file AT90PWM3.h.
| #define OCR2SA_11_REG OCR2SAH |
Definition at line 912 of file AT90PWM3.h.
| #define OCR2SA_1_REG OCR2SAL |
Definition at line 631 of file AT90PWM3.h.
| #define OCR2SA_2_REG OCR2SAL |
Definition at line 632 of file AT90PWM3.h.
| #define OCR2SA_3_REG OCR2SAL |
Definition at line 633 of file AT90PWM3.h.
| #define OCR2SA_4_REG OCR2SAL |
Definition at line 634 of file AT90PWM3.h.
| #define OCR2SA_5_REG OCR2SAL |
Definition at line 635 of file AT90PWM3.h.
| #define OCR2SA_6_REG OCR2SAL |
Definition at line 636 of file AT90PWM3.h.
| #define OCR2SA_7_REG OCR2SAL |
Definition at line 637 of file AT90PWM3.h.
| #define OCR2SA_8_REG OCR2SAH |
Definition at line 909 of file AT90PWM3.h.
| #define OCR2SA_9_REG OCR2SAH |
Definition at line 910 of file AT90PWM3.h.
| #define OCR2SB_0_REG OCR2SBL |
Definition at line 133 of file AT90PWM3.h.
| #define OCR2SB_10_REG OCR2SBH |
Definition at line 129 of file AT90PWM3.h.
| #define OCR2SB_11_REG OCR2SBH |
Definition at line 130 of file AT90PWM3.h.
| #define OCR2SB_1_REG OCR2SBL |
Definition at line 134 of file AT90PWM3.h.
| #define OCR2SB_2_REG OCR2SBL |
Definition at line 135 of file AT90PWM3.h.
| #define OCR2SB_3_REG OCR2SBL |
Definition at line 136 of file AT90PWM3.h.
| #define OCR2SB_4_REG OCR2SBL |
Definition at line 137 of file AT90PWM3.h.
| #define OCR2SB_5_REG OCR2SBL |
Definition at line 138 of file AT90PWM3.h.
| #define OCR2SB_6_REG OCR2SBL |
Definition at line 139 of file AT90PWM3.h.
| #define OCR2SB_7_REG OCR2SBL |
Definition at line 140 of file AT90PWM3.h.
| #define OCR2SB_8_REG OCR2SBH |
Definition at line 127 of file AT90PWM3.h.
| #define OCR2SB_9_REG OCR2SBH |
Definition at line 128 of file AT90PWM3.h.
| #define PALOCK0_REG PCNF0 |
Definition at line 262 of file AT90PWM3.h.
| #define PALOCK1_REG PCNF1 |
Definition at line 271 of file AT90PWM3.h.
| #define PALOCK2_REG PCNF2 |
Definition at line 281 of file AT90PWM3.h.
| #define PAOC0A_REG PCTL0 |
Definition at line 665 of file AT90PWM3.h.
| #define PAOC0B_REG PCTL0 |
Definition at line 666 of file AT90PWM3.h.
| #define PAOC1A_REG PCTL1 |
Definition at line 675 of file AT90PWM3.h.
| #define PAOC1B_REG PCTL1 |
Definition at line 676 of file AT90PWM3.h.
| #define PAOC2A_REG PCTL2 |
Definition at line 685 of file AT90PWM3.h.
| #define PAOC2B_REG PCTL2 |
Definition at line 686 of file AT90PWM3.h.
| #define PARUN0_REG PCTL0 |
Definition at line 664 of file AT90PWM3.h.
| #define PARUN1_REG PCTL1 |
Definition at line 674 of file AT90PWM3.h.
| #define PARUN2_REG PCTL2 |
Definition at line 684 of file AT90PWM3.h.
| #define PBFM0_REG PCTL0 |
Definition at line 667 of file AT90PWM3.h.
| #define PBFM1_REG PCTL1 |
Definition at line 677 of file AT90PWM3.h.
| #define PBFM2_REG PCTL2 |
Definition at line 687 of file AT90PWM3.h.
| #define PCAE0A_REG PFRC0A |
Definition at line 360 of file AT90PWM3.h.
| #define PCAE0B_REG PFRC0B |
Definition at line 370 of file AT90PWM3.h.
| #define PCAE1A_REG PFRC1A |
Definition at line 958 of file AT90PWM3.h.
| #define PCAE1B_REG PFRC1B |
Definition at line 948 of file AT90PWM3.h.
| #define PCAE2A_REG PFRC2A |
Definition at line 627 of file AT90PWM3.h.
| #define PCAE2B_REG PFRC2B |
Definition at line 617 of file AT90PWM3.h.
| #define PCCYC0_REG PCTL0 |
Definition at line 663 of file AT90PWM3.h.
| #define PCCYC1_REG PCTL1 |
Definition at line 673 of file AT90PWM3.h.
| #define PCCYC2_REG PCTL2 |
Definition at line 683 of file AT90PWM3.h.
| #define PCLKSEL0_REG PCNF0 |
Definition at line 257 of file AT90PWM3.h.
| #define PCLKSEL1_REG PCNF1 |
Definition at line 266 of file AT90PWM3.h.
| #define PCLKSEL2_REG PCNF2 |
Definition at line 276 of file AT90PWM3.h.
| #define PELEV0A_REG PFRC0A |
Definition at line 358 of file AT90PWM3.h.
| #define PELEV0B_REG PFRC0B |
Definition at line 368 of file AT90PWM3.h.
| #define PELEV1A_REG PFRC1A |
Definition at line 956 of file AT90PWM3.h.
| #define PELEV1B_REG PFRC1B |
Definition at line 946 of file AT90PWM3.h.
| #define PELEV2A_REG PFRC2A |
Definition at line 625 of file AT90PWM3.h.
| #define PELEV2B_REG PFRC2B |
Definition at line 615 of file AT90PWM3.h.
| #define PEOP0_REG PIFR0 |
Definition at line 1142 of file AT90PWM3.h.
| #define PEOP1_REG PIFR1 |
Definition at line 1150 of file AT90PWM3.h.
| #define PEOP2_REG PIFR2 |
Definition at line 1124 of file AT90PWM3.h.
| #define PEOPE0_REG PIM0 |
Definition at line 1112 of file AT90PWM3.h.
| #define PEOPE1_REG PIM1 |
Definition at line 1118 of file AT90PWM3.h.
| #define PEOPE2_REG PIM2 |
Definition at line 1106 of file AT90PWM3.h.
| #define PEV0A_REG PIFR0 |
Definition at line 1145 of file AT90PWM3.h.
| #define PEV0B_REG PIFR0 |
Definition at line 1146 of file AT90PWM3.h.
| #define PEV1A_REG PIFR1 |
Definition at line 1153 of file AT90PWM3.h.
| #define PEV1B_REG PIFR1 |
Definition at line 1154 of file AT90PWM3.h.
| #define PEV2A_REG PIFR2 |
Definition at line 1127 of file AT90PWM3.h.
| #define PEV2B_REG PIFR2 |
Definition at line 1128 of file AT90PWM3.h.
| #define PEVE0A_REG PIM0 |
Definition at line 1113 of file AT90PWM3.h.
| #define PEVE0B_REG PIM0 |
Definition at line 1114 of file AT90PWM3.h.
| #define PEVE1A_REG PIM1 |
Definition at line 1119 of file AT90PWM3.h.
| #define PEVE1B_REG PIM1 |
Definition at line 1120 of file AT90PWM3.h.
| #define PEVE2A_REG PIM2 |
Definition at line 1107 of file AT90PWM3.h.
| #define PEVE2B_REG PIM2 |
Definition at line 1108 of file AT90PWM3.h.
| #define PFIFTY0_REG PCNF0 |
Definition at line 263 of file AT90PWM3.h.
| #define PFIFTY1_REG PCNF1 |
Definition at line 272 of file AT90PWM3.h.
| #define PFIFTY2_REG PCNF2 |
Definition at line 282 of file AT90PWM3.h.
| #define PFLTE0A_REG PFRC0A |
Definition at line 357 of file AT90PWM3.h.
| #define PFLTE0B_REG PFRC0B |
Definition at line 367 of file AT90PWM3.h.
| #define PFLTE1A_REG PFRC1A |
Definition at line 955 of file AT90PWM3.h.
| #define PFLTE1B_REG PFRC1B |
Definition at line 945 of file AT90PWM3.h.
| #define PFLTE2A_REG PFRC2A |
Definition at line 624 of file AT90PWM3.h.
| #define PFLTE2B_REG PFRC2B |
Definition at line 614 of file AT90PWM3.h.
| #define PGERS_REG SPMCSR |
Definition at line 471 of file AT90PWM3.h.
| #define PGWRT_REG SPMCSR |
Definition at line 472 of file AT90PWM3.h.
| #define PICR0_0_REG PICR0L |
Definition at line 961 of file AT90PWM3.h.
| #define PICR0_10_REG PICR0H |
Definition at line 879 of file AT90PWM3.h.
| #define PICR0_11_REG PICR0H |
Definition at line 880 of file AT90PWM3.h.
| #define PICR0_1_REG PICR0L |
Definition at line 962 of file AT90PWM3.h.
| #define PICR0_2_REG PICR0L |
Definition at line 963 of file AT90PWM3.h.
| #define PICR0_3_REG PICR0L |
Definition at line 964 of file AT90PWM3.h.
| #define PICR0_4_REG PICR0L |
Definition at line 965 of file AT90PWM3.h.
| #define PICR0_5_REG PICR0L |
Definition at line 966 of file AT90PWM3.h.
| #define PICR0_6_REG PICR0L |
Definition at line 967 of file AT90PWM3.h.
| #define PICR0_7_REG PICR0L |
Definition at line 968 of file AT90PWM3.h.
| #define PICR0_8_REG PICR0H |
Definition at line 877 of file AT90PWM3.h.
| #define PICR0_9_REG PICR0H |
Definition at line 878 of file AT90PWM3.h.
| #define PICR1_0_REG PICR1L |
Definition at line 379 of file AT90PWM3.h.
| #define PICR1_10_REG PICR1H |
Definition at line 375 of file AT90PWM3.h.
| #define PICR1_11_REG PICR1H |
Definition at line 376 of file AT90PWM3.h.
| #define PICR1_1_REG PICR1L |
Definition at line 380 of file AT90PWM3.h.
| #define PICR1_2_REG PICR1L |
Definition at line 381 of file AT90PWM3.h.
| #define PICR1_3_REG PICR1L |
Definition at line 382 of file AT90PWM3.h.
| #define PICR1_4_REG PICR1L |
Definition at line 383 of file AT90PWM3.h.
| #define PICR1_5_REG PICR1L |
Definition at line 384 of file AT90PWM3.h.
| #define PICR1_6_REG PICR1L |
Definition at line 385 of file AT90PWM3.h.
| #define PICR1_7_REG PICR1L |
Definition at line 386 of file AT90PWM3.h.
| #define PICR1_8_REG PICR1H |
Definition at line 373 of file AT90PWM3.h.
| #define PICR1_9_REG PICR1H |
Definition at line 374 of file AT90PWM3.h.
| #define PICR2_0_REG PICR2L |
Definition at line 760 of file AT90PWM3.h.
| #define PICR2_10_REG PICR2H |
Definition at line 746 of file AT90PWM3.h.
| #define PICR2_11_REG PICR2H |
Definition at line 747 of file AT90PWM3.h.
| #define PICR2_1_REG PICR2L |
Definition at line 761 of file AT90PWM3.h.
| #define PICR2_2_REG PICR2L |
Definition at line 762 of file AT90PWM3.h.
| #define PICR2_3_REG PICR2L |
Definition at line 763 of file AT90PWM3.h.
| #define PICR2_4_REG PICR2L |
Definition at line 764 of file AT90PWM3.h.
| #define PICR2_5_REG PICR2L |
Definition at line 765 of file AT90PWM3.h.
| #define PICR2_6_REG PICR2L |
Definition at line 766 of file AT90PWM3.h.
| #define PICR2_7_REG PICR2L |
Definition at line 767 of file AT90PWM3.h.
| #define PICR2_8_REG PICR2H |
Definition at line 744 of file AT90PWM3.h.
| #define PICR2_9_REG PICR2H |
Definition at line 745 of file AT90PWM3.h.
| #define PINB0_REG PINB |
Definition at line 1225 of file AT90PWM3.h.
| #define PINB1_REG PINB |
Definition at line 1226 of file AT90PWM3.h.
| #define PINB2_REG PINB |
Definition at line 1227 of file AT90PWM3.h.
| #define PINB3_REG PINB |
Definition at line 1228 of file AT90PWM3.h.
| #define PINB4_REG PINB |
Definition at line 1229 of file AT90PWM3.h.
| #define PINB5_REG PINB |
Definition at line 1230 of file AT90PWM3.h.
| #define PINB6_REG PINB |
Definition at line 1231 of file AT90PWM3.h.
| #define PINB7_REG PINB |
Definition at line 1232 of file AT90PWM3.h.
| #define PINC0_REG PINC |
Definition at line 1215 of file AT90PWM3.h.
| #define PINC1_REG PINC |
Definition at line 1216 of file AT90PWM3.h.
| #define PINC2_REG PINC |
Definition at line 1217 of file AT90PWM3.h.
| #define PINC3_REG PINC |
Definition at line 1218 of file AT90PWM3.h.
| #define PINC4_REG PINC |
Definition at line 1219 of file AT90PWM3.h.
| #define PINC5_REG PINC |
Definition at line 1220 of file AT90PWM3.h.
| #define PINC6_REG PINC |
Definition at line 1221 of file AT90PWM3.h.
| #define PINC7_REG PINC |
Definition at line 1222 of file AT90PWM3.h.
| #define PIND0_REG PIND |
Definition at line 1257 of file AT90PWM3.h.
| #define PIND1_REG PIND |
Definition at line 1258 of file AT90PWM3.h.
| #define PIND2_REG PIND |
Definition at line 1259 of file AT90PWM3.h.
| #define PIND3_REG PIND |
Definition at line 1260 of file AT90PWM3.h.
| #define PIND4_REG PIND |
Definition at line 1261 of file AT90PWM3.h.
| #define PIND5_REG PIND |
Definition at line 1262 of file AT90PWM3.h.
| #define PIND6_REG PIND |
Definition at line 1263 of file AT90PWM3.h.
| #define PIND7_REG PIND |
Definition at line 1264 of file AT90PWM3.h.
| #define PINE0_REG PINE |
Definition at line 1252 of file AT90PWM3.h.
| #define PINE1_REG PINE |
Definition at line 1253 of file AT90PWM3.h.
| #define PINE2_REG PINE |
Definition at line 1254 of file AT90PWM3.h.
| #define PISEL0A_REG PFRC0A |
Definition at line 359 of file AT90PWM3.h.
| #define PISEL0B_REG PFRC0B |
Definition at line 369 of file AT90PWM3.h.
| #define PISEL1A_REG PFRC1A |
Definition at line 957 of file AT90PWM3.h.
| #define PISEL1B_REG PFRC1B |
Definition at line 947 of file AT90PWM3.h.
| #define PISEL2A_REG PFRC2A |
Definition at line 626 of file AT90PWM3.h.
| #define PISEL2B_REG PFRC2B |
Definition at line 616 of file AT90PWM3.h.
| #define PLLE_REG PLLCSR |
Definition at line 819 of file AT90PWM3.h.
| #define PLLF_REG PLLCSR |
Definition at line 820 of file AT90PWM3.h.
| #define PLOCK0_REG PCNF0 |
Definition at line 261 of file AT90PWM3.h.
| #define PLOCK1_REG PCNF1 |
Definition at line 270 of file AT90PWM3.h.
| #define PLOCK2_REG PCNF2 |
Definition at line 280 of file AT90PWM3.h.
| #define PLOCK_REG PLLCSR |
Definition at line 818 of file AT90PWM3.h.
| #define PMODE00_REG PCNF0 |
Definition at line 259 of file AT90PWM3.h.
| #define PMODE01_REG PCNF0 |
Definition at line 260 of file AT90PWM3.h.
| #define PMODE10_REG PCNF1 |
Definition at line 268 of file AT90PWM3.h.
| #define PMODE11_REG PCNF1 |
Definition at line 269 of file AT90PWM3.h.
| #define PMODE20_REG PCNF2 |
Definition at line 278 of file AT90PWM3.h.
| #define PMODE21_REG PCNF2 |
Definition at line 279 of file AT90PWM3.h.
| #define POEN0A_REG PSOC0 |
Definition at line 991 of file AT90PWM3.h.
| #define POEN0B_REG PSOC0 |
Definition at line 992 of file AT90PWM3.h.
| #define POEN1A_REG PSOC1 |
Definition at line 997 of file AT90PWM3.h.
| #define POEN1B_REG PSOC1 |
Definition at line 998 of file AT90PWM3.h.
| #define POEN2A_REG PSOC2 |
Definition at line 1168 of file AT90PWM3.h.
| #define POEN2B_REG PSOC2 |
Definition at line 1170 of file AT90PWM3.h.
| #define POEN2C_REG PSOC2 |
Definition at line 1169 of file AT90PWM3.h.
| #define POEN2D_REG PSOC2 |
Definition at line 1171 of file AT90PWM3.h.
| #define POME2_REG PCNF2 |
Definition at line 275 of file AT90PWM3.h.
| #define POMV2A0_REG POM2 |
Definition at line 724 of file AT90PWM3.h.
| #define POMV2A1_REG POM2 |
Definition at line 725 of file AT90PWM3.h.
| #define POMV2A2_REG POM2 |
Definition at line 726 of file AT90PWM3.h.
| #define POMV2A3_REG POM2 |
Definition at line 727 of file AT90PWM3.h.
| #define POMV2B0_REG POM2 |
Definition at line 728 of file AT90PWM3.h.
| #define POMV2B1_REG POM2 |
Definition at line 729 of file AT90PWM3.h.
| #define POMV2B2_REG POM2 |
Definition at line 730 of file AT90PWM3.h.
| #define POMV2B3_REG POM2 |
Definition at line 731 of file AT90PWM3.h.
| #define POP0_REG PCNF0 |
Definition at line 258 of file AT90PWM3.h.
| #define POP1_REG PCNF1 |
Definition at line 267 of file AT90PWM3.h.
| #define POP2_REG PCNF2 |
Definition at line 277 of file AT90PWM3.h.
| #define PORF_REG MCUSR |
Definition at line 800 of file AT90PWM3.h.
| #define PORTB0_REG PORTB |
Definition at line 1132 of file AT90PWM3.h.
| #define PORTB1_REG PORTB |
Definition at line 1133 of file AT90PWM3.h.
| #define PORTB2_REG PORTB |
Definition at line 1134 of file AT90PWM3.h.
| #define PORTB3_REG PORTB |
Definition at line 1135 of file AT90PWM3.h.
| #define PORTB4_REG PORTB |
Definition at line 1136 of file AT90PWM3.h.
| #define PORTB5_REG PORTB |
Definition at line 1137 of file AT90PWM3.h.
| #define PORTB6_REG PORTB |
Definition at line 1138 of file AT90PWM3.h.
| #define PORTB7_REG PORTB |
Definition at line 1139 of file AT90PWM3.h.
| #define PORTC0_REG PORTC |
Definition at line 320 of file AT90PWM3.h.
| #define PORTC1_REG PORTC |
Definition at line 321 of file AT90PWM3.h.
| #define PORTC2_REG PORTC |
Definition at line 322 of file AT90PWM3.h.
| #define PORTC3_REG PORTC |
Definition at line 323 of file AT90PWM3.h.
| #define PORTC4_REG PORTC |
Definition at line 324 of file AT90PWM3.h.
| #define PORTC5_REG PORTC |
Definition at line 325 of file AT90PWM3.h.
| #define PORTC6_REG PORTC |
Definition at line 326 of file AT90PWM3.h.
| #define PORTC7_REG PORTC |
Definition at line 327 of file AT90PWM3.h.
| #define PORTD0_REG PORTD |
Definition at line 295 of file AT90PWM3.h.
| #define PORTD1_REG PORTD |
Definition at line 296 of file AT90PWM3.h.
| #define PORTD2_REG PORTD |
Definition at line 297 of file AT90PWM3.h.
| #define PORTD3_REG PORTD |
Definition at line 298 of file AT90PWM3.h.
| #define PORTD4_REG PORTD |
Definition at line 299 of file AT90PWM3.h.
| #define PORTD5_REG PORTD |
Definition at line 300 of file AT90PWM3.h.
| #define PORTD6_REG PORTD |
Definition at line 301 of file AT90PWM3.h.
| #define PORTD7_REG PORTD |
Definition at line 302 of file AT90PWM3.h.
| #define PORTE0_REG PORTE |
Definition at line 305 of file AT90PWM3.h.
| #define PORTE1_REG PORTE |
Definition at line 306 of file AT90PWM3.h.
| #define PORTE2_REG PORTE |
Definition at line 307 of file AT90PWM3.h.
| #define POS22_REG PSOC2 |
Definition at line 1174 of file AT90PWM3.h.
| #define POS23_REG PSOC2 |
Definition at line 1175 of file AT90PWM3.h.
| #define PPRE00_REG PCTL0 |
Definition at line 668 of file AT90PWM3.h.
| #define PPRE01_REG PCTL0 |
Definition at line 669 of file AT90PWM3.h.
| #define PPRE10_REG PCTL1 |
Definition at line 678 of file AT90PWM3.h.
| #define PPRE11_REG PCTL1 |
Definition at line 679 of file AT90PWM3.h.
| #define PPRE20_REG PCTL2 |
Definition at line 688 of file AT90PWM3.h.
| #define PPRE21_REG PCTL2 |
Definition at line 689 of file AT90PWM3.h.
| #define PRADC_REG PRR |
Definition at line 247 of file AT90PWM3.h.
| #define PRFM0A0_REG PFRC0A |
Definition at line 353 of file AT90PWM3.h.
| #define PRFM0A1_REG PFRC0A |
Definition at line 354 of file AT90PWM3.h.
| #define PRFM0A2_REG PFRC0A |
Definition at line 355 of file AT90PWM3.h.
| #define PRFM0A3_REG PFRC0A |
Definition at line 356 of file AT90PWM3.h.
| #define PRFM0B0_REG PFRC0B |
Definition at line 363 of file AT90PWM3.h.
| #define PRFM0B1_REG PFRC0B |
Definition at line 364 of file AT90PWM3.h.
| #define PRFM0B2_REG PFRC0B |
Definition at line 365 of file AT90PWM3.h.
| #define PRFM0B3_REG PFRC0B |
Definition at line 366 of file AT90PWM3.h.
| #define PRFM1A0_REG PFRC1A |
Definition at line 951 of file AT90PWM3.h.
| #define PRFM1A1_REG PFRC1A |
Definition at line 952 of file AT90PWM3.h.
| #define PRFM1A2_REG PFRC1A |
Definition at line 953 of file AT90PWM3.h.
| #define PRFM1A3_REG PFRC1A |
Definition at line 954 of file AT90PWM3.h.
| #define PRFM1B0_REG PFRC1B |
Definition at line 941 of file AT90PWM3.h.
| #define PRFM1B1_REG PFRC1B |
Definition at line 942 of file AT90PWM3.h.
| #define PRFM1B2_REG PFRC1B |
Definition at line 943 of file AT90PWM3.h.
| #define PRFM1B3_REG PFRC1B |
Definition at line 944 of file AT90PWM3.h.
| #define PRFM2A0_REG PFRC2A |
Definition at line 620 of file AT90PWM3.h.
| #define PRFM2A1_REG PFRC2A |
Definition at line 621 of file AT90PWM3.h.
| #define PRFM2A2_REG PFRC2A |
Definition at line 622 of file AT90PWM3.h.
| #define PRFM2A3_REG PFRC2A |
Definition at line 623 of file AT90PWM3.h.
| #define PRFM2B0_REG PFRC2B |
Definition at line 610 of file AT90PWM3.h.
| #define PRFM2B1_REG PFRC2B |
Definition at line 611 of file AT90PWM3.h.
| #define PRFM2B2_REG PFRC2B |
Definition at line 612 of file AT90PWM3.h.
| #define PRFM2B3_REG PFRC2B |
Definition at line 613 of file AT90PWM3.h.
| #define PRN00_REG PIFR0 |
Definition at line 1143 of file AT90PWM3.h.
| #define PRN01_REG PIFR0 |
Definition at line 1144 of file AT90PWM3.h.
| #define PRN10_REG PIFR1 |
Definition at line 1151 of file AT90PWM3.h.
| #define PRN11_REG PIFR1 |
Definition at line 1152 of file AT90PWM3.h.
| #define PRN20_REG PIFR2 |
Definition at line 1125 of file AT90PWM3.h.
| #define PRN21_REG PIFR2 |
Definition at line 1126 of file AT90PWM3.h.
| #define PRPSC0_REG PRR |
Definition at line 252 of file AT90PWM3.h.
| #define PRPSC1_REG PRR |
Definition at line 253 of file AT90PWM3.h.
| #define PRPSC2_REG PRR |
Definition at line 254 of file AT90PWM3.h.
| #define PRSPI_REG PRR |
Definition at line 249 of file AT90PWM3.h.
| #define PRTIM0_REG PRR |
Definition at line 250 of file AT90PWM3.h.
| #define PRTIM1_REG PRR |
Definition at line 251 of file AT90PWM3.h.
| #define PRUN0_REG PCTL0 |
Definition at line 662 of file AT90PWM3.h.
| #define PRUN1_REG PCTL1 |
Definition at line 672 of file AT90PWM3.h.
| #define PRUN2_REG PCTL2 |
Definition at line 682 of file AT90PWM3.h.
| #define PRUSART0_REG PRR |
Definition at line 248 of file AT90PWM3.h.
| #define PSCIN0_BIT 1 |
Definition at line 1378 of file AT90PWM3.h.
| #define PSCIN0_PORT PORTD |
Definition at line 1377 of file AT90PWM3.h.
| #define PSCIN1_BIT 1 |
Definition at line 1338 of file AT90PWM3.h.
| #define PSCIN1_PORT PORTC |
Definition at line 1337 of file AT90PWM3.h.
| #define PSCIN2_BIT 2 |
Definition at line 1383 of file AT90PWM3.h.
| #define PSCIN2_PORT PORTD |
Definition at line 1382 of file AT90PWM3.h.
| #define PSCOUT00_BIT 0 |
Definition at line 1371 of file AT90PWM3.h.
| #define PSCOUT00_PORT PORTD |
Definition at line 1370 of file AT90PWM3.h.
| #define PSCOUT01_BIT 7 |
Definition at line 1328 of file AT90PWM3.h.
| #define PSCOUT01_PORT PORTB |
Definition at line 1327 of file AT90PWM3.h.
| #define PSCOUT10_BIT 0 |
Definition at line 1335 of file AT90PWM3.h.
| #define PSCOUT10_PORT PORTC |
Definition at line 1334 of file AT90PWM3.h.
| #define PSCOUT11_BIT 6 |
Definition at line 1321 of file AT90PWM3.h.
| #define PSCOUT11_PORT PORTB |
Definition at line 1320 of file AT90PWM3.h.
| #define PSCOUT20_BIT 0 |
Definition at line 1295 of file AT90PWM3.h.
| #define PSCOUT20_PORT PORTB |
Definition at line 1294 of file AT90PWM3.h.
| #define PSCOUT21_BIT 1 |
Definition at line 1300 of file AT90PWM3.h.
| #define PSCOUT21_PORT PORTB |
Definition at line 1299 of file AT90PWM3.h.
| #define PSCOUT22_BIT 2 |
Definition at line 1345 of file AT90PWM3.h.
| #define PSCOUT22_PORT PORTC |
Definition at line 1344 of file AT90PWM3.h.
| #define PSCOUT23_BIT 3 |
Definition at line 1350 of file AT90PWM3.h.
| #define PSCOUT23_PORT PORTC |
Definition at line 1349 of file AT90PWM3.h.
| #define PSEI0_REG PIFR0 |
Definition at line 1147 of file AT90PWM3.h.
| #define PSEI1_REG PIFR1 |
Definition at line 1155 of file AT90PWM3.h.
| #define PSEI2_REG PIFR2 |
Definition at line 1129 of file AT90PWM3.h.
| #define PSEIE0_REG PIM0 |
Definition at line 1115 of file AT90PWM3.h.
| #define PSEIE1_REG PIM1 |
Definition at line 1121 of file AT90PWM3.h.
| #define PSEIE2_REG PIM2 |
Definition at line 1109 of file AT90PWM3.h.
| #define PSR10_REG GTCCR |
Definition at line 708 of file AT90PWM3.h.
| #define PSRSYNC_REG GTCCR |
Definition at line 711 of file AT90PWM3.h.
| #define PSYNC00_REG PSOC0 |
Definition at line 993 of file AT90PWM3.h.
| #define PSYNC01_REG PSOC0 |
Definition at line 994 of file AT90PWM3.h.
| #define PSYNC1_0_REG PSOC1 |
Definition at line 999 of file AT90PWM3.h.
| #define PSYNC1_1_REG PSOC1 |
Definition at line 1000 of file AT90PWM3.h.
| #define PSYNC2_0_REG PSOC2 |
Definition at line 1172 of file AT90PWM3.h.
| #define PSYNC2_1_REG PSOC2 |
Definition at line 1173 of file AT90PWM3.h.
| #define PUD_REG MCUCR |
Definition at line 873 of file AT90PWM3.h.
| #define PWM0_NUM 0 |
Definition at line 86 of file AT90PWM3.h.
| #define PWM0B_NUM 1 |
Definition at line 87 of file AT90PWM3.h.
| #define PWM1A_NUM 2 |
Definition at line 88 of file AT90PWM3.h.
| #define PWM1B_NUM 3 |
Definition at line 89 of file AT90PWM3.h.
| #define PWM_TOTAL_NUM 4 |
Definition at line 90 of file AT90PWM3.h.
| #define REFS0_REG ADMUX |
Definition at line 113 of file AT90PWM3.h.
| #define REFS1_REG ADMUX |
Definition at line 114 of file AT90PWM3.h.
| #define RESET_BIT 0 |
Definition at line 1427 of file AT90PWM3.h.
| #define RESET_PORT PORTE |
Definition at line 1426 of file AT90PWM3.h.
| #define RWWSB_REG SPMCSR |
Definition at line 475 of file AT90PWM3.h.
| #define RWWSRE_REG SPMCSR |
Definition at line 474 of file AT90PWM3.h.
| #define RXB8_REG UCSRB |
Definition at line 209 of file AT90PWM3.h.
| #define RXC_REG UCSRA |
Definition at line 205 of file AT90PWM3.h.
| #define RXCIE_REG UCSRB |
Definition at line 215 of file AT90PWM3.h.
| #define RXD_BIT 4 |
Definition at line 1403 of file AT90PWM3.h.
| #define RXD_PORT PORTD |
Definition at line 1402 of file AT90PWM3.h.
| #define RXEN_REG UCSRB |
Definition at line 212 of file AT90PWM3.h.
| #define S_REG SREG |
Definition at line 121 of file AT90PWM3.h.
| #define SCK_A_BIT 4 |
Definition at line 1409 of file AT90PWM3.h.
| #define SCK_A_PORT PORTD |
Definition at line 1408 of file AT90PWM3.h.
| #define SCK_BIT 7 |
Definition at line 1330 of file AT90PWM3.h.
| #define SCK_PORT PORTB |
Definition at line 1329 of file AT90PWM3.h.
| #define SE_REG SMCR |
Definition at line 812 of file AT90PWM3.h.
| #define SIG_INPUT_CAPTURE1_NUM 0 |
Definition at line 93 of file AT90PWM3.h.
| #define SIG_INPUT_CAPTURE_TOTAL_NUM 1 |
Definition at line 94 of file AT90PWM3.h.
| #define SIG_OUTPUT_COMPARE0_NUM 0 |
Definition at line 79 of file AT90PWM3.h.
| #define SIG_OUTPUT_COMPARE0B_NUM 1 |
Definition at line 80 of file AT90PWM3.h.
| #define SIG_OUTPUT_COMPARE1A_NUM 2 |
Definition at line 81 of file AT90PWM3.h.
| #define SIG_OUTPUT_COMPARE1B_NUM 3 |
Definition at line 82 of file AT90PWM3.h.
| #define SIG_OUTPUT_COMPARE_TOTAL_NUM 4 |
Definition at line 83 of file AT90PWM3.h.
| #define SIG_OVERFLOW0_NUM 0 |
Definition at line 74 of file AT90PWM3.h.
| #define SIG_OVERFLOW1_NUM 1 |
Definition at line 75 of file AT90PWM3.h.
| #define SIG_OVERFLOW_TOTAL_NUM 2 |
Definition at line 76 of file AT90PWM3.h.
| #define SM0_REG SMCR |
Definition at line 813 of file AT90PWM3.h.
| #define SM1_REG SMCR |
Definition at line 814 of file AT90PWM3.h.
| #define SM2_REG SMCR |
Definition at line 815 of file AT90PWM3.h.
| #define SP0_REG SPL |
Definition at line 790 of file AT90PWM3.h.
| #define SP10_REG SPH |
Definition at line 716 of file AT90PWM3.h.
| #define SP11_REG SPH |
Definition at line 717 of file AT90PWM3.h.
| #define SP12_REG SPH |
Definition at line 718 of file AT90PWM3.h.
| #define SP13_REG SPH |
Definition at line 719 of file AT90PWM3.h.
| #define SP14_REG SPH |
Definition at line 720 of file AT90PWM3.h.
| #define SP15_REG SPH |
Definition at line 721 of file AT90PWM3.h.
| #define SP1_REG SPL |
Definition at line 791 of file AT90PWM3.h.
| #define SP2_REG SPL |
Definition at line 792 of file AT90PWM3.h.
| #define SP3_REG SPL |
Definition at line 793 of file AT90PWM3.h.
| #define SP4_REG SPL |
Definition at line 794 of file AT90PWM3.h.
| #define SP5_REG SPL |
Definition at line 795 of file AT90PWM3.h.
| #define SP6_REG SPL |
Definition at line 796 of file AT90PWM3.h.
| #define SP7_REG SPL |
Definition at line 797 of file AT90PWM3.h.
| #define SP8_REG SPH |
Definition at line 714 of file AT90PWM3.h.
| #define SP9_REG SPH |
Definition at line 715 of file AT90PWM3.h.
| #define SPDR0_REG SPDR |
Definition at line 173 of file AT90PWM3.h.
| #define SPDR1_REG SPDR |
Definition at line 174 of file AT90PWM3.h.
| #define SPDR2_REG SPDR |
Definition at line 175 of file AT90PWM3.h.
| #define SPDR3_REG SPDR |
Definition at line 176 of file AT90PWM3.h.
| #define SPDR4_REG SPDR |
Definition at line 177 of file AT90PWM3.h.
| #define SPDR5_REG SPDR |
Definition at line 178 of file AT90PWM3.h.
| #define SPDR6_REG SPDR |
Definition at line 179 of file AT90PWM3.h.
| #define SPDR7_REG SPDR |
Definition at line 180 of file AT90PWM3.h.
| #define SPE_REG SPCR |
Definition at line 698 of file AT90PWM3.h.
| #define SPI2X_REG SPSR |
Definition at line 183 of file AT90PWM3.h.
| #define SPIE_REG SPCR |
Definition at line 699 of file AT90PWM3.h.
| #define SPIF_REG SPSR |
Definition at line 185 of file AT90PWM3.h.
| #define SPIPS_REG MCUCR |
Definition at line 874 of file AT90PWM3.h.
| #define SPMEN_REG SPMCSR |
Definition at line 470 of file AT90PWM3.h.
| #define SPMIE_REG SPMCSR |
Definition at line 476 of file AT90PWM3.h.
| #define SPR0_REG SPCR |
Definition at line 692 of file AT90PWM3.h.
| #define SPR1_REG SPCR |
Definition at line 693 of file AT90PWM3.h.
| #define SS_BIT 3 |
Definition at line 1396 of file AT90PWM3.h.
| #define SS_PORT PORTD |
Definition at line 1395 of file AT90PWM3.h.
| #define SSA_BIT 0 |
Definition at line 1375 of file AT90PWM3.h.
| #define SSA_PORT PORTD |
Definition at line 1374 of file AT90PWM3.h.
| #define STP0_REG EUCSRC |
Definition at line 656 of file AT90PWM3.h.
| #define STP1_REG EUCSRC |
Definition at line 657 of file AT90PWM3.h.
| #define T0_BIT 2 |
Definition at line 1343 of file AT90PWM3.h.
| #define T0_PORT PORTC |
Definition at line 1342 of file AT90PWM3.h.
| #define T1_BIT 3 |
Definition at line 1348 of file AT90PWM3.h.
| #define T1_PORT PORTC |
Definition at line 1347 of file AT90PWM3.h.
| #define T_REG SREG |
Definition at line 123 of file AT90PWM3.h.
| #define TCNT0_0_REG TCNT0 |
Definition at line 584 of file AT90PWM3.h.
| #define TCNT0_1_REG TCNT0 |
Definition at line 585 of file AT90PWM3.h.
| #define TCNT0_2_REG TCNT0 |
Definition at line 586 of file AT90PWM3.h.
| #define TCNT0_3_REG TCNT0 |
Definition at line 587 of file AT90PWM3.h.
| #define TCNT0_4_REG TCNT0 |
Definition at line 588 of file AT90PWM3.h.
| #define TCNT0_5_REG TCNT0 |
Definition at line 589 of file AT90PWM3.h.
| #define TCNT0_6_REG TCNT0 |
Definition at line 590 of file AT90PWM3.h.
| #define TCNT0_7_REG TCNT0 |
Definition at line 591 of file AT90PWM3.h.
| #define TCNT1H0_REG TCNT1H |
Definition at line 310 of file AT90PWM3.h.
| #define TCNT1H1_REG TCNT1H |
Definition at line 311 of file AT90PWM3.h.
| #define TCNT1H2_REG TCNT1H |
Definition at line 312 of file AT90PWM3.h.
| #define TCNT1H3_REG TCNT1H |
Definition at line 313 of file AT90PWM3.h.
| #define TCNT1H4_REG TCNT1H |
Definition at line 314 of file AT90PWM3.h.
| #define TCNT1H5_REG TCNT1H |
Definition at line 315 of file AT90PWM3.h.
| #define TCNT1H6_REG TCNT1H |
Definition at line 316 of file AT90PWM3.h.
| #define TCNT1H7_REG TCNT1H |
Definition at line 317 of file AT90PWM3.h.
| #define TCNT1L0_REG TCNT1L |
Definition at line 285 of file AT90PWM3.h.
| #define TCNT1L1_REG TCNT1L |
Definition at line 286 of file AT90PWM3.h.
| #define TCNT1L2_REG TCNT1L |
Definition at line 287 of file AT90PWM3.h.
| #define TCNT1L3_REG TCNT1L |
Definition at line 288 of file AT90PWM3.h.
| #define TCNT1L4_REG TCNT1L |
Definition at line 289 of file AT90PWM3.h.
| #define TCNT1L5_REG TCNT1L |
Definition at line 290 of file AT90PWM3.h.
| #define TCNT1L6_REG TCNT1L |
Definition at line 291 of file AT90PWM3.h.
| #define TCNT1L7_REG TCNT1L |
Definition at line 292 of file AT90PWM3.h.
| #define TIMER0_AVAILABLE |
Definition at line 67 of file AT90PWM3.h.
| #define TIMER0_PRESCALER_DIV_0 0 |
Definition at line 28 of file AT90PWM3.h.
| #define TIMER0_PRESCALER_DIV_1 1 |
Definition at line 29 of file AT90PWM3.h.
| #define TIMER0_PRESCALER_DIV_1024 5 |
Definition at line 33 of file AT90PWM3.h.
| #define TIMER0_PRESCALER_DIV_256 4 |
Definition at line 32 of file AT90PWM3.h.
| #define TIMER0_PRESCALER_DIV_64 3 |
Definition at line 31 of file AT90PWM3.h.
| #define TIMER0_PRESCALER_DIV_8 2 |
Definition at line 30 of file AT90PWM3.h.
| #define TIMER0_PRESCALER_DIV_FALL 6 |
Definition at line 34 of file AT90PWM3.h.
| #define TIMER0_PRESCALER_DIV_RISE 7 |
Definition at line 35 of file AT90PWM3.h.
| #define TIMER0_PRESCALER_REG_0 0 |
Definition at line 37 of file AT90PWM3.h.
| #define TIMER0_PRESCALER_REG_1 1 |
Definition at line 38 of file AT90PWM3.h.
| #define TIMER0_PRESCALER_REG_2 8 |
Definition at line 39 of file AT90PWM3.h.
| #define TIMER0_PRESCALER_REG_3 64 |
Definition at line 40 of file AT90PWM3.h.
| #define TIMER0_PRESCALER_REG_4 256 |
Definition at line 41 of file AT90PWM3.h.
| #define TIMER0_PRESCALER_REG_5 1024 |
Definition at line 42 of file AT90PWM3.h.
| #define TIMER0_PRESCALER_REG_6 -1 |
Definition at line 43 of file AT90PWM3.h.
| #define TIMER0_PRESCALER_REG_7 -2 |
Definition at line 44 of file AT90PWM3.h.
| #define TIMER0B_AVAILABLE |
Definition at line 68 of file AT90PWM3.h.
| #define TIMER1_AVAILABLE |
Definition at line 69 of file AT90PWM3.h.
| #define TIMER1_PRESCALER_DIV_0 0 |
Definition at line 47 of file AT90PWM3.h.
| #define TIMER1_PRESCALER_DIV_1 1 |
Definition at line 48 of file AT90PWM3.h.
| #define TIMER1_PRESCALER_DIV_1024 5 |
Definition at line 52 of file AT90PWM3.h.
| #define TIMER1_PRESCALER_DIV_256 4 |
Definition at line 51 of file AT90PWM3.h.
| #define TIMER1_PRESCALER_DIV_64 3 |
Definition at line 50 of file AT90PWM3.h.
| #define TIMER1_PRESCALER_DIV_8 2 |
Definition at line 49 of file AT90PWM3.h.
| #define TIMER1_PRESCALER_DIV_FALL 6 |
Definition at line 53 of file AT90PWM3.h.
| #define TIMER1_PRESCALER_DIV_RISE 7 |
Definition at line 54 of file AT90PWM3.h.
| #define TIMER1_PRESCALER_REG_0 0 |
Definition at line 56 of file AT90PWM3.h.
| #define TIMER1_PRESCALER_REG_1 1 |
Definition at line 57 of file AT90PWM3.h.
| #define TIMER1_PRESCALER_REG_2 8 |
Definition at line 58 of file AT90PWM3.h.
| #define TIMER1_PRESCALER_REG_3 64 |
Definition at line 59 of file AT90PWM3.h.
| #define TIMER1_PRESCALER_REG_4 256 |
Definition at line 60 of file AT90PWM3.h.
| #define TIMER1_PRESCALER_REG_5 1024 |
Definition at line 61 of file AT90PWM3.h.
| #define TIMER1_PRESCALER_REG_6 -1 |
Definition at line 62 of file AT90PWM3.h.
| #define TIMER1_PRESCALER_REG_7 -2 |
Definition at line 63 of file AT90PWM3.h.
| #define TIMER1A_AVAILABLE |
Definition at line 70 of file AT90PWM3.h.
| #define TIMER1B_AVAILABLE |
Definition at line 71 of file AT90PWM3.h.
| #define TOIE0_REG TIMSK0 |
Definition at line 1178 of file AT90PWM3.h.
| #define TOIE1_REG TIMSK1 |
Definition at line 1183 of file AT90PWM3.h.
| #define TOV0_REG TIFR0 |
Definition at line 1287 of file AT90PWM3.h.
| #define TOV1_REG TIFR1 |
Definition at line 702 of file AT90PWM3.h.
| #define TSM_REG GTCCR |
Definition at line 710 of file AT90PWM3.h.
| #define TXB8_REG UCSRB |
Definition at line 208 of file AT90PWM3.h.
| #define TXC_REG UCSRA |
Definition at line 204 of file AT90PWM3.h.
| #define TXCIE_REG UCSRB |
Definition at line 214 of file AT90PWM3.h.
| #define TXD_BIT 3 |
Definition at line 1390 of file AT90PWM3.h.
| #define TXD_PORT PORTD |
Definition at line 1389 of file AT90PWM3.h.
| #define TXEN_REG UCSRB |
Definition at line 211 of file AT90PWM3.h.
| #define U2X_REG UCSRA |
Definition at line 199 of file AT90PWM3.h.
| #define UBRR0_REG UBRRL |
Definition at line 1080 of file AT90PWM3.h.
| #define UBRR10_REG UBRRH |
Definition at line 1066 of file AT90PWM3.h.
| #define UBRR11_REG UBRRH |
Definition at line 1067 of file AT90PWM3.h.
| #define UBRR1_REG UBRRL |
Definition at line 1081 of file AT90PWM3.h.
| #define UBRR2_REG UBRRL |
Definition at line 1082 of file AT90PWM3.h.
| #define UBRR3_REG UBRRL |
Definition at line 1083 of file AT90PWM3.h.
| #define UBRR4_REG UBRRL |
Definition at line 1084 of file AT90PWM3.h.
| #define UBRR5_REG UBRRL |
Definition at line 1085 of file AT90PWM3.h.
| #define UBRR6_REG UBRRL |
Definition at line 1086 of file AT90PWM3.h.
| #define UBRR7_REG UBRRL |
Definition at line 1087 of file AT90PWM3.h.
| #define UBRR8_REG UBRRH |
Definition at line 1064 of file AT90PWM3.h.
| #define UBRR9_REG UBRRH |
Definition at line 1065 of file AT90PWM3.h.
| #define UCPOL_REG UCSRC |
Definition at line 218 of file AT90PWM3.h.
| #define UCSZ0_REG UCSRC |
Definition at line 219 of file AT90PWM3.h.
| #define UCSZ1_REG UCSRC |
Definition at line 220 of file AT90PWM3.h.
| #define UCSZ2_REG UCSRB |
Definition at line 210 of file AT90PWM3.h.
| #define UDR0_REG UDR |
Definition at line 1197 of file AT90PWM3.h.
| #define UDR1_REG UDR |
Definition at line 1198 of file AT90PWM3.h.
| #define UDR2_REG UDR |
Definition at line 1199 of file AT90PWM3.h.
| #define UDR3_REG UDR |
Definition at line 1200 of file AT90PWM3.h.
| #define UDR4_REG UDR |
Definition at line 1201 of file AT90PWM3.h.
| #define UDR5_REG UDR |
Definition at line 1202 of file AT90PWM3.h.
| #define UDR6_REG UDR |
Definition at line 1203 of file AT90PWM3.h.
| #define UDR7_REG UDR |
Definition at line 1204 of file AT90PWM3.h.
| #define UDRE_REG UCSRA |
Definition at line 203 of file AT90PWM3.h.
| #define UDRIE_REG UCSRB |
Definition at line 213 of file AT90PWM3.h.
| #define UMSEL0_REG UCSRC |
Definition at line 224 of file AT90PWM3.h.
| #define UPE_REG UCSRA |
Definition at line 200 of file AT90PWM3.h.
| #define UPM0_REG UCSRC |
Definition at line 222 of file AT90PWM3.h.
| #define UPM1_REG UCSRC |
Definition at line 223 of file AT90PWM3.h.
| #define URxS0_REG EUCSRA |
Definition at line 640 of file AT90PWM3.h.
| #define URxS1_REG EUCSRA |
Definition at line 641 of file AT90PWM3.h.
| #define URxS2_REG EUCSRA |
Definition at line 642 of file AT90PWM3.h.
| #define URxS3_REG EUCSRA |
Definition at line 643 of file AT90PWM3.h.
| #define USBS_REG UCSRC |
Definition at line 221 of file AT90PWM3.h.
| #define UTxS0_REG EUCSRA |
Definition at line 644 of file AT90PWM3.h.
| #define UTxS1_REG EUCSRA |
Definition at line 645 of file AT90PWM3.h.
| #define UTxS2_REG EUCSRA |
Definition at line 646 of file AT90PWM3.h.
| #define UTxS3_REG EUCSRA |
Definition at line 647 of file AT90PWM3.h.
| #define V_REG SREG |
Definition at line 120 of file AT90PWM3.h.
| #define WCOL_REG SPSR |
Definition at line 184 of file AT90PWM3.h.
| #define WDCE_REG WDTCSR |
Definition at line 147 of file AT90PWM3.h.
| #define WDE_REG WDTCSR |
Definition at line 146 of file AT90PWM3.h.
| #define WDIE_REG WDTCSR |
Definition at line 149 of file AT90PWM3.h.
| #define WDIF_REG WDTCSR |
Definition at line 150 of file AT90PWM3.h.
| #define WDP0_REG WDTCSR |
Definition at line 143 of file AT90PWM3.h.
| #define WDP1_REG WDTCSR |
Definition at line 144 of file AT90PWM3.h.
| #define WDP2_REG WDTCSR |
Definition at line 145 of file AT90PWM3.h.
| #define WDP3_REG WDTCSR |
Definition at line 148 of file AT90PWM3.h.
| #define WDRF_REG MCUSR |
Definition at line 803 of file AT90PWM3.h.
| #define WGM00_REG TCCR0A |
Definition at line 602 of file AT90PWM3.h.
| #define WGM01_REG TCCR0A |
Definition at line 603 of file AT90PWM3.h.
| #define WGM02_REG TCCR0B |
Definition at line 597 of file AT90PWM3.h.
| #define WGM10_REG TCCR1A |
Definition at line 479 of file AT90PWM3.h.
| #define WGM11_REG TCCR1A |
Definition at line 480 of file AT90PWM3.h.
| #define WGM12_REG TCCR1B |
Definition at line 494 of file AT90PWM3.h.
| #define WGM13_REG TCCR1B |
Definition at line 495 of file AT90PWM3.h.
| #define XCK_BIT 0 |
Definition at line 1373 of file AT90PWM3.h.
| #define XCK_PORT PORTD |
Definition at line 1372 of file AT90PWM3.h.
| #define XTAL1_BIT 1 |
Definition at line 1434 of file AT90PWM3.h.
| #define XTAL1_PORT PORTE |
Definition at line 1433 of file AT90PWM3.h.
| #define XTAL2_BIT 2 |
Definition at line 1439 of file AT90PWM3.h.
| #define XTAL2_PORT PORTE |
Definition at line 1438 of file AT90PWM3.h.
| #define Z_REG SREG |
Definition at line 118 of file AT90PWM3.h.
1.5.6