00001 /* 00002 * Copyright Droids Corporation (2008) 00003 * 00004 * This program is free software; you can redistribute it and/or modify 00005 * it under the terms of the GNU General Public License as published by 00006 * the Free Software Foundation; either version 2 of the License, or 00007 * (at your option) any later version. 00008 * 00009 * This program is distributed in the hope that it will be useful, 00010 * but WITHOUT ANY WARRANTY; without even the implied warranty of 00011 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 00012 * GNU General Public License for more details. 00013 * 00014 * You should have received a copy of the GNU General Public License 00015 * along with this program; if not, write to the Free Software 00016 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 00017 * 00018 */ 00019 00020 /* 00021 * Author : Julien LE GUEN - jlg@jleguen.info 00022 */ 00023 00024 /* 00025 * -- INFO -- 00026 * This module enable the use of the SPI hardware 00027 * on some AVRs. For now, only MASTER mode is available. 00028 * You can have as many slaves as you want, as long as you 00029 * don't confuse them by trying to speak to several at the same time. 00030 * 00031 * BIG WARNING: If you use /SS as a slave selector, always 00032 * register it using spi_register_ss_line() *before* calling 00033 * spi_init(). Read carrefully the datasheet, especially the 00034 * paragraph "SS Pin Functionnality" in SPI section. In master 00035 * mode, the SS pin must be configured as an output OR driven 00036 * high by an external circuitry. 00037 * 00038 * -- USAGE -- 00039 * So you have one (or several) device(s) that want to speak to your 00040 * shiny AVR over SPI ? 00041 * This is fairly easy. First, summon this module with spi_init(). 00042 * You can configure 00043 * - the FORMAT of the link (sample on rising or falling edge, ...) 00044 * - the RATE of the connection (you set the prescaler dividing the CPU clock) 00045 * You can also set the data order (MSB or LSB first on the link) 00046 * 00047 * After that you can register your devices using spi_register_ss_line(); 00048 * This returns you a device identifier you can use with spi_slave_[de]select(); 00049 * 00050 * Remember to ALWAYS select your slave before talking to it, and deselect if 00051 * once your are done. 00052 */ 00053 00054 00055 00056 #ifndef _SPI_H_ 00057 #define _SPI_H_ 00058 00059 #include <stdint.h> 00060 00061 /* SPI modes */ 00062 typedef enum { 00063 SPI_MODE_UNINIT, /* not initialized */ 00064 SPI_MODE_MASTER /* for now, only master mode as 00065 * slave mode cannot be tested */ 00066 } spi_mode_t; 00067 00068 00069 /* SPI transfert format 00070 * This defines the SCK phase and polarity. 00071 * For instance in FORMAT_0, data lines are set on the falling edge 00072 * of SCK, and sampled on its rising edge. This determines the order 00073 * in which sampling and setting occurs. 00074 * For more information on SPI formats, please see your CPU datasheet. 00075 */ 00076 typedef enum { 00077 SPI_FORMAT_0 = 0x00, /* Sample rising Setup falling */ 00078 SPI_FORMAT_1 = _BV(CPHA), /* Setup rising Sample falling */ 00079 SPI_FORMAT_2 = _BV(CPOL), /* Sample falling Setup rising */ 00080 SPI_FORMAT_3 = _BV(CPHA) | _BV(CPOL), /* Setup falling Sample rising*/ 00081 } spi_format_t; 00082 00083 00084 /* SPI Clock Rate 00085 * This code the values for SPI2X (high nibble), SPR1 and SPR0 (low nibble) 00086 * f_sck = f_osc / SPI_CLK_RATE_xx 00087 */ 00088 typedef enum { 00089 SPI_CLK_RATE_2 = 0x10, 00090 SPI_CLK_RATE_4 = 0x00, 00091 SPI_CLK_RATE_8 = 0x11, 00092 SPI_CLK_RATE_16 = 0x01, 00093 SPI_CLK_RATE_32 = 0x12, 00094 SPI_CLK_RATE_64 = 0x02, 00095 SPI_CLK_RATE_128 = 0x03 00096 } spi_clk_rate_t; 00097 00098 00099 /* 00100 * Data order (bits order) 00101 * order is either SPI_LSB_FIRST or SPI_MSB_FIRST 00102 * Default is MSB first 00103 */ 00104 #define SPI_MSB_FIRST 0 00105 #define SPI_LSB_FIRST 1 00106 void spi_set_data_order(uint8_t order); 00107 00108 00109 00110 00111 /* Initialize the SPI 00112 * mode is SPI_MODE_MASTER (slave is not implemented) 00113 * format defines the transfert format (see above) 00114 * clk_rate defines the frequency of SCK line (f_sck = f_osc / clk_rate) 00115 */ 00116 void spi_init(spi_mode_t mode, spi_format_t format, spi_clk_rate_t clk_rate); 00117 00118 00119 /* 00120 * Returns the state of the SPI 00121 */ 00122 spi_mode_t spi_get_mode(void); 00123 00124 00125 /* 00126 * Register a pin as SS line 00127 * Returns a unique identifier, or -1 on error 00128 * There is always the physical SS line registered as 0 00129 */ 00130 int8_t spi_register_ss_line(volatile uint8_t *port, uint8_t bitnum); 00131 00132 00133 /* 00134 * Sends a byte (and receive one at the same time) 00135 * Returns the received byte 00136 * Wait for the end of transmission 00137 */ 00138 uint8_t spi_send_and_receive_byte(uint8_t byte); 00139 00140 00141 /* 00142 * Sends a byte, discards the received one. 00143 * Do NOT wait for the end of transmission 00144 */ 00145 void spi_send_byte(uint8_t byte); 00146 00147 /* 00148 * Receives a byte (sends a NULL) 00149 */ 00150 uint8_t spi_receive_byte(void); 00151 00152 /* 00153 * Select or Deselect the SS line 00154 * The SPI standard defines that only ONE slave can 00155 * be selected at any time. An internal mecanism prevents 00156 * the selection of several slaves at the same time, but 00157 * this is not completely foolproof. 00158 * 00159 * /!\ Behavior is NOT ASSURED if you mess with SS lines 00160 * outside of this module, so PLEASE use these setters. /!\ 00161 * 00162 * This function returns EBUSY if there is already a selected slave 00163 */ 00164 uint8_t spi_slave_select(uint8_t slave); 00165 00166 /* 00167 * Inconditionnaly releases the line. 00168 */ 00169 void spi_slave_deselect(uint8_t slave); 00170 00171 /* 00172 * Display SS lines 00173 */ 00174 void spi_display_ss_lines(void); 00175 00176 00177 #endif /* _SPI_H_ */ 00178